1 /* 2 * Copyright 2011, Marvell Semiconductor Inc. 3 * Lei Wen <leiwen@marvell.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 * 7 * Back ported to the 8xx platform (from the 8260 platform) by 8 * Murray.Jensen@cmst.csiro.au, 27-Jan-01. 9 */ 10 11 #include <common.h> 12 #include <command.h> 13 #include <config.h> 14 #include <net.h> 15 #include <malloc.h> 16 #include <asm/byteorder.h> 17 #include <asm/errno.h> 18 #include <asm/io.h> 19 #include <asm/unaligned.h> 20 #include <linux/types.h> 21 #include <linux/usb/ch9.h> 22 #include <linux/usb/gadget.h> 23 #include <usb/ci_udc.h> 24 #include "../host/ehci.h" 25 #include "ci_udc.h" 26 27 /* 28 * Check if the system has too long cachelines. If the cachelines are 29 * longer then 128b, the driver will not be able flush/invalidate data 30 * cache over separate QH entries. We use 128b because one QH entry is 31 * 64b long and there are always two QH list entries for each endpoint. 32 */ 33 #if ARCH_DMA_MINALIGN > 128 34 #error This driver can not work on systems with caches longer than 128b 35 #endif 36 37 #ifndef DEBUG 38 #define DBG(x...) do {} while (0) 39 #else 40 #define DBG(x...) printf(x) 41 static const char *reqname(unsigned r) 42 { 43 switch (r) { 44 case USB_REQ_GET_STATUS: return "GET_STATUS"; 45 case USB_REQ_CLEAR_FEATURE: return "CLEAR_FEATURE"; 46 case USB_REQ_SET_FEATURE: return "SET_FEATURE"; 47 case USB_REQ_SET_ADDRESS: return "SET_ADDRESS"; 48 case USB_REQ_GET_DESCRIPTOR: return "GET_DESCRIPTOR"; 49 case USB_REQ_SET_DESCRIPTOR: return "SET_DESCRIPTOR"; 50 case USB_REQ_GET_CONFIGURATION: return "GET_CONFIGURATION"; 51 case USB_REQ_SET_CONFIGURATION: return "SET_CONFIGURATION"; 52 case USB_REQ_GET_INTERFACE: return "GET_INTERFACE"; 53 case USB_REQ_SET_INTERFACE: return "SET_INTERFACE"; 54 default: return "*UNKNOWN*"; 55 } 56 } 57 #endif 58 59 static struct usb_endpoint_descriptor ep0_out_desc = { 60 .bLength = sizeof(struct usb_endpoint_descriptor), 61 .bDescriptorType = USB_DT_ENDPOINT, 62 .bEndpointAddress = 0, 63 .bmAttributes = USB_ENDPOINT_XFER_CONTROL, 64 }; 65 66 static struct usb_endpoint_descriptor ep0_in_desc = { 67 .bLength = sizeof(struct usb_endpoint_descriptor), 68 .bDescriptorType = USB_DT_ENDPOINT, 69 .bEndpointAddress = USB_DIR_IN, 70 .bmAttributes = USB_ENDPOINT_XFER_CONTROL, 71 }; 72 73 static int ci_pullup(struct usb_gadget *gadget, int is_on); 74 static int ci_ep_enable(struct usb_ep *ep, 75 const struct usb_endpoint_descriptor *desc); 76 static int ci_ep_disable(struct usb_ep *ep); 77 static int ci_ep_queue(struct usb_ep *ep, 78 struct usb_request *req, gfp_t gfp_flags); 79 static struct usb_request * 80 ci_ep_alloc_request(struct usb_ep *ep, unsigned int gfp_flags); 81 static void ci_ep_free_request(struct usb_ep *ep, struct usb_request *_req); 82 83 static struct usb_gadget_ops ci_udc_ops = { 84 .pullup = ci_pullup, 85 }; 86 87 static struct usb_ep_ops ci_ep_ops = { 88 .enable = ci_ep_enable, 89 .disable = ci_ep_disable, 90 .queue = ci_ep_queue, 91 .alloc_request = ci_ep_alloc_request, 92 .free_request = ci_ep_free_request, 93 }; 94 95 /* Init values for USB endpoints. */ 96 static const struct usb_ep ci_ep_init[2] = { 97 [0] = { /* EP 0 */ 98 .maxpacket = 64, 99 .name = "ep0", 100 .ops = &ci_ep_ops, 101 }, 102 [1] = { /* EP 1..n */ 103 .maxpacket = 512, 104 .name = "ep-", 105 .ops = &ci_ep_ops, 106 }, 107 }; 108 109 static struct ci_drv controller = { 110 .gadget = { 111 .name = "ci_udc", 112 .ops = &ci_udc_ops, 113 .is_dualspeed = 1, 114 }, 115 }; 116 117 /** 118 * ci_get_qh() - return queue head for endpoint 119 * @ep_num: Endpoint number 120 * @dir_in: Direction of the endpoint (IN = 1, OUT = 0) 121 * 122 * This function returns the QH associated with particular endpoint 123 * and it's direction. 124 */ 125 static struct ept_queue_head *ci_get_qh(int ep_num, int dir_in) 126 { 127 return &controller.epts[(ep_num * 2) + dir_in]; 128 } 129 130 /** 131 * ci_get_qtd() - return queue item for endpoint 132 * @ep_num: Endpoint number 133 * @dir_in: Direction of the endpoint (IN = 1, OUT = 0) 134 * 135 * This function returns the QH associated with particular endpoint 136 * and it's direction. 137 */ 138 static struct ept_queue_item *ci_get_qtd(int ep_num, int dir_in) 139 { 140 return controller.items[(ep_num * 2) + dir_in]; 141 } 142 143 /** 144 * ci_flush_qh - flush cache over queue head 145 * @ep_num: Endpoint number 146 * 147 * This function flushes cache over QH for particular endpoint. 148 */ 149 static void ci_flush_qh(int ep_num) 150 { 151 struct ept_queue_head *head = ci_get_qh(ep_num, 0); 152 const uint32_t start = (uint32_t)head; 153 const uint32_t end = start + 2 * sizeof(*head); 154 155 flush_dcache_range(start, end); 156 } 157 158 /** 159 * ci_invalidate_qh - invalidate cache over queue head 160 * @ep_num: Endpoint number 161 * 162 * This function invalidates cache over QH for particular endpoint. 163 */ 164 static void ci_invalidate_qh(int ep_num) 165 { 166 struct ept_queue_head *head = ci_get_qh(ep_num, 0); 167 uint32_t start = (uint32_t)head; 168 uint32_t end = start + 2 * sizeof(*head); 169 170 invalidate_dcache_range(start, end); 171 } 172 173 /** 174 * ci_flush_qtd - flush cache over queue item 175 * @ep_num: Endpoint number 176 * 177 * This function flushes cache over qTD pair for particular endpoint. 178 */ 179 static void ci_flush_qtd(int ep_num) 180 { 181 struct ept_queue_item *item = ci_get_qtd(ep_num, 0); 182 const uint32_t start = (uint32_t)item; 183 const uint32_t end_raw = start + 2 * sizeof(*item); 184 const uint32_t end = roundup(end_raw, ARCH_DMA_MINALIGN); 185 186 flush_dcache_range(start, end); 187 } 188 189 /** 190 * ci_invalidate_qtd - invalidate cache over queue item 191 * @ep_num: Endpoint number 192 * 193 * This function invalidates cache over qTD pair for particular endpoint. 194 */ 195 static void ci_invalidate_qtd(int ep_num) 196 { 197 struct ept_queue_item *item = ci_get_qtd(ep_num, 0); 198 const uint32_t start = (uint32_t)item; 199 const uint32_t end_raw = start + 2 * sizeof(*item); 200 const uint32_t end = roundup(end_raw, ARCH_DMA_MINALIGN); 201 202 invalidate_dcache_range(start, end); 203 } 204 205 static struct usb_request * 206 ci_ep_alloc_request(struct usb_ep *ep, unsigned int gfp_flags) 207 { 208 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep); 209 return &ci_ep->req; 210 } 211 212 static void ci_ep_free_request(struct usb_ep *ep, struct usb_request *_req) 213 { 214 return; 215 } 216 217 static void ep_enable(int num, int in, int maxpacket) 218 { 219 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; 220 unsigned n; 221 222 n = readl(&udc->epctrl[num]); 223 if (in) 224 n |= (CTRL_TXE | CTRL_TXR | CTRL_TXT_BULK); 225 else 226 n |= (CTRL_RXE | CTRL_RXR | CTRL_RXT_BULK); 227 228 if (num != 0) { 229 struct ept_queue_head *head = ci_get_qh(num, in); 230 231 head->config = CONFIG_MAX_PKT(maxpacket) | CONFIG_ZLT; 232 ci_flush_qh(num); 233 } 234 writel(n, &udc->epctrl[num]); 235 } 236 237 static int ci_ep_enable(struct usb_ep *ep, 238 const struct usb_endpoint_descriptor *desc) 239 { 240 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep); 241 int num, in; 242 num = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; 243 in = (desc->bEndpointAddress & USB_DIR_IN) != 0; 244 ci_ep->desc = desc; 245 246 if (num) { 247 int max = get_unaligned_le16(&desc->wMaxPacketSize); 248 249 if ((max > 64) && (controller.gadget.speed == USB_SPEED_FULL)) 250 max = 64; 251 if (ep->maxpacket != max) { 252 DBG("%s: from %d to %d\n", __func__, 253 ep->maxpacket, max); 254 ep->maxpacket = max; 255 } 256 } 257 ep_enable(num, in, ep->maxpacket); 258 DBG("%s: num=%d maxpacket=%d\n", __func__, num, ep->maxpacket); 259 return 0; 260 } 261 262 static int ci_ep_disable(struct usb_ep *ep) 263 { 264 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep); 265 266 ci_ep->desc = NULL; 267 return 0; 268 } 269 270 static int ci_bounce(struct ci_ep *ep, int in) 271 { 272 uint32_t addr = (uint32_t)ep->req.buf; 273 uint32_t ba; 274 275 /* Input buffer address is not aligned. */ 276 if (addr & (ARCH_DMA_MINALIGN - 1)) 277 goto align; 278 279 /* Input buffer length is not aligned. */ 280 if (ep->req.length & (ARCH_DMA_MINALIGN - 1)) 281 goto align; 282 283 /* The buffer is well aligned, only flush cache. */ 284 ep->b_len = ep->req.length; 285 ep->b_buf = ep->req.buf; 286 goto flush; 287 288 align: 289 /* Use internal buffer for small payloads. */ 290 if (ep->req.length <= 64) { 291 ep->b_len = 64; 292 ep->b_buf = ep->b_fast; 293 } else { 294 ep->b_len = roundup(ep->req.length, ARCH_DMA_MINALIGN); 295 ep->b_buf = memalign(ARCH_DMA_MINALIGN, ep->b_len); 296 if (!ep->b_buf) 297 return -ENOMEM; 298 } 299 if (in) 300 memcpy(ep->b_buf, ep->req.buf, ep->req.length); 301 302 flush: 303 ba = (uint32_t)ep->b_buf; 304 flush_dcache_range(ba, ba + ep->b_len); 305 306 return 0; 307 } 308 309 static void ci_debounce(struct ci_ep *ep, int in) 310 { 311 uint32_t addr = (uint32_t)ep->req.buf; 312 uint32_t ba = (uint32_t)ep->b_buf; 313 314 if (in) { 315 if (addr == ba) 316 return; /* not a bounce */ 317 goto free; 318 } 319 invalidate_dcache_range(ba, ba + ep->b_len); 320 321 if (addr == ba) 322 return; /* not a bounce */ 323 324 memcpy(ep->req.buf, ep->b_buf, ep->req.actual); 325 free: 326 /* Large payloads use allocated buffer, free it. */ 327 if (ep->b_buf != ep->b_fast) 328 free(ep->b_buf); 329 } 330 331 static int ci_ep_queue(struct usb_ep *ep, 332 struct usb_request *req, gfp_t gfp_flags) 333 { 334 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep); 335 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; 336 struct ept_queue_item *item; 337 struct ept_queue_head *head; 338 int bit, num, len, in, ret; 339 num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; 340 in = (ci_ep->desc->bEndpointAddress & USB_DIR_IN) != 0; 341 item = ci_get_qtd(num, in); 342 head = ci_get_qh(num, in); 343 len = req->length; 344 345 ret = ci_bounce(ci_ep, in); 346 if (ret) 347 return ret; 348 349 item->next = TERMINATE; 350 item->info = INFO_BYTES(len) | INFO_IOC | INFO_ACTIVE; 351 item->page0 = (uint32_t)ci_ep->b_buf; 352 item->page1 = ((uint32_t)ci_ep->b_buf & 0xfffff000) + 0x1000; 353 item->page2 = ((uint32_t)ci_ep->b_buf & 0xfffff000) + 0x2000; 354 item->page3 = ((uint32_t)ci_ep->b_buf & 0xfffff000) + 0x3000; 355 item->page4 = ((uint32_t)ci_ep->b_buf & 0xfffff000) + 0x4000; 356 ci_flush_qtd(num); 357 358 head->next = (unsigned) item; 359 head->info = 0; 360 361 DBG("ept%d %s queue len %x, buffer %p\n", 362 num, in ? "in" : "out", len, ci_ep->b_buf); 363 ci_flush_qh(num); 364 365 if (in) 366 bit = EPT_TX(num); 367 else 368 bit = EPT_RX(num); 369 370 writel(bit, &udc->epprime); 371 372 return 0; 373 } 374 375 static void handle_ep_complete(struct ci_ep *ep) 376 { 377 struct ept_queue_item *item; 378 int num, in, len; 379 num = ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; 380 in = (ep->desc->bEndpointAddress & USB_DIR_IN) != 0; 381 if (num == 0) 382 ep->desc = &ep0_out_desc; 383 item = ci_get_qtd(num, in); 384 ci_invalidate_qtd(num); 385 386 if (item->info & 0xff) 387 printf("EP%d/%s FAIL info=%x pg0=%x\n", 388 num, in ? "in" : "out", item->info, item->page0); 389 390 len = (item->info >> 16) & 0x7fff; 391 ep->req.actual = ep->req.length - len; 392 ci_debounce(ep, in); 393 394 DBG("ept%d %s complete %x\n", 395 num, in ? "in" : "out", len); 396 ep->req.complete(&ep->ep, &ep->req); 397 if (num == 0) { 398 ep->req.length = 0; 399 usb_ep_queue(&ep->ep, &ep->req, 0); 400 ep->desc = &ep0_in_desc; 401 } 402 } 403 404 #define SETUP(type, request) (((type) << 8) | (request)) 405 406 static void handle_setup(void) 407 { 408 struct usb_request *req = &controller.ep[0].req; 409 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; 410 struct ept_queue_head *head; 411 struct usb_ctrlrequest r; 412 int status = 0; 413 int num, in, _num, _in, i; 414 char *buf; 415 head = ci_get_qh(0, 0); /* EP0 OUT */ 416 417 ci_invalidate_qh(0); 418 memcpy(&r, head->setup_data, sizeof(struct usb_ctrlrequest)); 419 #ifdef CONFIG_CI_UDC_HAS_HOSTPC 420 writel(EPT_RX(0), &udc->epsetupstat); 421 #else 422 writel(EPT_RX(0), &udc->epstat); 423 #endif 424 DBG("handle setup %s, %x, %x index %x value %x\n", reqname(r.bRequest), 425 r.bRequestType, r.bRequest, r.wIndex, r.wValue); 426 427 switch (SETUP(r.bRequestType, r.bRequest)) { 428 case SETUP(USB_RECIP_ENDPOINT, USB_REQ_CLEAR_FEATURE): 429 _num = r.wIndex & 15; 430 _in = !!(r.wIndex & 0x80); 431 432 if ((r.wValue == 0) && (r.wLength == 0)) { 433 req->length = 0; 434 for (i = 0; i < NUM_ENDPOINTS; i++) { 435 struct ci_ep *ep = &controller.ep[i]; 436 437 if (!ep->desc) 438 continue; 439 num = ep->desc->bEndpointAddress 440 & USB_ENDPOINT_NUMBER_MASK; 441 in = (ep->desc->bEndpointAddress 442 & USB_DIR_IN) != 0; 443 if ((num == _num) && (in == _in)) { 444 ep_enable(num, in, ep->ep.maxpacket); 445 usb_ep_queue(controller.gadget.ep0, 446 req, 0); 447 break; 448 } 449 } 450 } 451 return; 452 453 case SETUP(USB_RECIP_DEVICE, USB_REQ_SET_ADDRESS): 454 /* 455 * write address delayed (will take effect 456 * after the next IN txn) 457 */ 458 writel((r.wValue << 25) | (1 << 24), &udc->devaddr); 459 req->length = 0; 460 usb_ep_queue(controller.gadget.ep0, req, 0); 461 return; 462 463 case SETUP(USB_DIR_IN | USB_RECIP_DEVICE, USB_REQ_GET_STATUS): 464 req->length = 2; 465 buf = (char *)req->buf; 466 buf[0] = 1 << USB_DEVICE_SELF_POWERED; 467 buf[1] = 0; 468 usb_ep_queue(controller.gadget.ep0, req, 0); 469 return; 470 } 471 /* pass request up to the gadget driver */ 472 if (controller.driver) 473 status = controller.driver->setup(&controller.gadget, &r); 474 else 475 status = -ENODEV; 476 477 if (!status) 478 return; 479 DBG("STALL reqname %s type %x value %x, index %x\n", 480 reqname(r.bRequest), r.bRequestType, r.wValue, r.wIndex); 481 writel((1<<16) | (1 << 0), &udc->epctrl[0]); 482 } 483 484 static void stop_activity(void) 485 { 486 int i, num, in; 487 struct ept_queue_head *head; 488 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; 489 writel(readl(&udc->epcomp), &udc->epcomp); 490 #ifdef CONFIG_CI_UDC_HAS_HOSTPC 491 writel(readl(&udc->epsetupstat), &udc->epsetupstat); 492 #endif 493 writel(readl(&udc->epstat), &udc->epstat); 494 writel(0xffffffff, &udc->epflush); 495 496 /* error out any pending reqs */ 497 for (i = 0; i < NUM_ENDPOINTS; i++) { 498 if (i != 0) 499 writel(0, &udc->epctrl[i]); 500 if (controller.ep[i].desc) { 501 num = controller.ep[i].desc->bEndpointAddress 502 & USB_ENDPOINT_NUMBER_MASK; 503 in = (controller.ep[i].desc->bEndpointAddress 504 & USB_DIR_IN) != 0; 505 head = ci_get_qh(num, in); 506 head->info = INFO_ACTIVE; 507 ci_flush_qh(num); 508 } 509 } 510 } 511 512 void udc_irq(void) 513 { 514 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; 515 unsigned n = readl(&udc->usbsts); 516 writel(n, &udc->usbsts); 517 int bit, i, num, in; 518 519 n &= (STS_SLI | STS_URI | STS_PCI | STS_UI | STS_UEI); 520 if (n == 0) 521 return; 522 523 if (n & STS_URI) { 524 DBG("-- reset --\n"); 525 stop_activity(); 526 } 527 if (n & STS_SLI) 528 DBG("-- suspend --\n"); 529 530 if (n & STS_PCI) { 531 int max = 64; 532 int speed = USB_SPEED_FULL; 533 534 #ifdef CONFIG_CI_UDC_HAS_HOSTPC 535 bit = (readl(&udc->hostpc1_devlc) >> 25) & 3; 536 #else 537 bit = (readl(&udc->portsc) >> 26) & 3; 538 #endif 539 DBG("-- portchange %x %s\n", bit, (bit == 2) ? "High" : "Full"); 540 if (bit == 2) { 541 speed = USB_SPEED_HIGH; 542 max = 512; 543 } 544 controller.gadget.speed = speed; 545 for (i = 1; i < NUM_ENDPOINTS; i++) { 546 if (controller.ep[i].ep.maxpacket > max) 547 controller.ep[i].ep.maxpacket = max; 548 } 549 } 550 551 if (n & STS_UEI) 552 printf("<UEI %x>\n", readl(&udc->epcomp)); 553 554 if ((n & STS_UI) || (n & STS_UEI)) { 555 #ifdef CONFIG_CI_UDC_HAS_HOSTPC 556 n = readl(&udc->epsetupstat); 557 #else 558 n = readl(&udc->epstat); 559 #endif 560 if (n & EPT_RX(0)) 561 handle_setup(); 562 563 n = readl(&udc->epcomp); 564 if (n != 0) 565 writel(n, &udc->epcomp); 566 567 for (i = 0; i < NUM_ENDPOINTS && n; i++) { 568 if (controller.ep[i].desc) { 569 num = controller.ep[i].desc->bEndpointAddress 570 & USB_ENDPOINT_NUMBER_MASK; 571 in = (controller.ep[i].desc->bEndpointAddress 572 & USB_DIR_IN) != 0; 573 bit = (in) ? EPT_TX(num) : EPT_RX(num); 574 if (n & bit) 575 handle_ep_complete(&controller.ep[i]); 576 } 577 } 578 } 579 } 580 581 int usb_gadget_handle_interrupts(void) 582 { 583 u32 value; 584 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; 585 586 value = readl(&udc->usbsts); 587 if (value) 588 udc_irq(); 589 590 return value; 591 } 592 593 static int ci_pullup(struct usb_gadget *gadget, int is_on) 594 { 595 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; 596 if (is_on) { 597 /* RESET */ 598 writel(USBCMD_ITC(MICRO_8FRAME) | USBCMD_RST, &udc->usbcmd); 599 udelay(200); 600 601 writel((unsigned)controller.epts, &udc->epinitaddr); 602 603 /* select DEVICE mode */ 604 writel(USBMODE_DEVICE, &udc->usbmode); 605 606 writel(0xffffffff, &udc->epflush); 607 608 /* Turn on the USB connection by enabling the pullup resistor */ 609 writel(USBCMD_ITC(MICRO_8FRAME) | USBCMD_RUN, &udc->usbcmd); 610 } else { 611 stop_activity(); 612 writel(USBCMD_FS2, &udc->usbcmd); 613 udelay(800); 614 if (controller.driver) 615 controller.driver->disconnect(gadget); 616 } 617 618 return 0; 619 } 620 621 void udc_disconnect(void) 622 { 623 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; 624 /* disable pullup */ 625 stop_activity(); 626 writel(USBCMD_FS2, &udc->usbcmd); 627 udelay(800); 628 if (controller.driver) 629 controller.driver->disconnect(&controller.gadget); 630 } 631 632 static int ci_udc_probe(void) 633 { 634 struct ept_queue_head *head; 635 uint8_t *imem; 636 int i; 637 638 const int num = 2 * NUM_ENDPOINTS; 639 640 const int eplist_min_align = 4096; 641 const int eplist_align = roundup(eplist_min_align, ARCH_DMA_MINALIGN); 642 const int eplist_raw_sz = num * sizeof(struct ept_queue_head); 643 const int eplist_sz = roundup(eplist_raw_sz, ARCH_DMA_MINALIGN); 644 645 const int ilist_align = roundup(ARCH_DMA_MINALIGN, 32); 646 const int ilist_ent_raw_sz = 2 * sizeof(struct ept_queue_item); 647 const int ilist_ent_sz = roundup(ilist_ent_raw_sz, ARCH_DMA_MINALIGN); 648 const int ilist_sz = NUM_ENDPOINTS * ilist_ent_sz; 649 650 /* The QH list must be aligned to 4096 bytes. */ 651 controller.epts = memalign(eplist_align, eplist_sz); 652 if (!controller.epts) 653 return -ENOMEM; 654 memset(controller.epts, 0, eplist_sz); 655 656 /* 657 * Each qTD item must be 32-byte aligned, each qTD touple must be 658 * cacheline aligned. There are two qTD items for each endpoint and 659 * only one of them is used for the endpoint at time, so we can group 660 * them together. 661 */ 662 controller.items_mem = memalign(ilist_align, ilist_sz); 663 if (!controller.items_mem) { 664 free(controller.epts); 665 return -ENOMEM; 666 } 667 memset(controller.items_mem, 0, ilist_sz); 668 669 for (i = 0; i < 2 * NUM_ENDPOINTS; i++) { 670 /* 671 * Configure QH for each endpoint. The structure of the QH list 672 * is such that each two subsequent fields, N and N+1 where N is 673 * even, in the QH list represent QH for one endpoint. The Nth 674 * entry represents OUT configuration and the N+1th entry does 675 * represent IN configuration of the endpoint. 676 */ 677 head = controller.epts + i; 678 if (i < 2) 679 head->config = CONFIG_MAX_PKT(EP0_MAX_PACKET_SIZE) 680 | CONFIG_ZLT | CONFIG_IOS; 681 else 682 head->config = CONFIG_MAX_PKT(EP_MAX_PACKET_SIZE) 683 | CONFIG_ZLT; 684 head->next = TERMINATE; 685 head->info = 0; 686 687 imem = controller.items_mem + ((i >> 1) * ilist_ent_sz); 688 if (i & 1) 689 imem += sizeof(struct ept_queue_item); 690 691 controller.items[i] = (struct ept_queue_item *)imem; 692 693 if (i & 1) { 694 ci_flush_qh(i - 1); 695 ci_flush_qtd(i - 1); 696 } 697 } 698 699 INIT_LIST_HEAD(&controller.gadget.ep_list); 700 701 /* Init EP 0 */ 702 memcpy(&controller.ep[0].ep, &ci_ep_init[0], sizeof(*ci_ep_init)); 703 controller.ep[0].desc = &ep0_in_desc; 704 controller.gadget.ep0 = &controller.ep[0].ep; 705 INIT_LIST_HEAD(&controller.gadget.ep0->ep_list); 706 707 /* Init EP 1..n */ 708 for (i = 1; i < NUM_ENDPOINTS; i++) { 709 memcpy(&controller.ep[i].ep, &ci_ep_init[1], 710 sizeof(*ci_ep_init)); 711 list_add_tail(&controller.ep[i].ep.ep_list, 712 &controller.gadget.ep_list); 713 } 714 715 return 0; 716 } 717 718 int usb_gadget_register_driver(struct usb_gadget_driver *driver) 719 { 720 int ret; 721 722 if (!driver) 723 return -EINVAL; 724 if (!driver->bind || !driver->setup || !driver->disconnect) 725 return -EINVAL; 726 if (driver->speed != USB_SPEED_FULL && driver->speed != USB_SPEED_HIGH) 727 return -EINVAL; 728 729 ret = usb_lowlevel_init(0, USB_INIT_DEVICE, (void **)&controller.ctrl); 730 if (ret) 731 return ret; 732 733 ret = ci_udc_probe(); 734 #if defined(CONFIG_USB_EHCI_MX6) || defined(CONFIG_USB_EHCI_MXS) 735 /* 736 * FIXME: usb_lowlevel_init()->ehci_hcd_init() should be doing all 737 * HW-specific initialization, e.g. ULPI-vs-UTMI PHY selection 738 */ 739 if (!ret) { 740 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; 741 742 /* select ULPI phy */ 743 writel(PTS(PTS_ENABLE) | PFSC, &udc->portsc); 744 } 745 #endif 746 747 ret = driver->bind(&controller.gadget); 748 if (ret) { 749 DBG("driver->bind() returned %d\n", ret); 750 return ret; 751 } 752 controller.driver = driver; 753 754 return 0; 755 } 756 757 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) 758 { 759 return 0; 760 } 761