1 /* 2 * Copyright 2011, Marvell Semiconductor Inc. 3 * Lei Wen <leiwen@marvell.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 * 7 * Back ported to the 8xx platform (from the 8260 platform) by 8 * Murray.Jensen@cmst.csiro.au, 27-Jan-01. 9 */ 10 11 #include <common.h> 12 #include <command.h> 13 #include <config.h> 14 #include <net.h> 15 #include <malloc.h> 16 #include <asm/byteorder.h> 17 #include <asm/errno.h> 18 #include <asm/io.h> 19 #include <asm/unaligned.h> 20 #include <linux/types.h> 21 #include <linux/usb/ch9.h> 22 #include <linux/usb/gadget.h> 23 #include <usb/ci_udc.h> 24 #include "../host/ehci.h" 25 #include "ci_udc.h" 26 27 /* 28 * Check if the system has too long cachelines. If the cachelines are 29 * longer then 128b, the driver will not be able flush/invalidate data 30 * cache over separate QH entries. We use 128b because one QH entry is 31 * 64b long and there are always two QH list entries for each endpoint. 32 */ 33 #if ARCH_DMA_MINALIGN > 128 34 #error This driver can not work on systems with caches longer than 128b 35 #endif 36 37 #ifndef DEBUG 38 #define DBG(x...) do {} while (0) 39 #else 40 #define DBG(x...) printf(x) 41 static const char *reqname(unsigned r) 42 { 43 switch (r) { 44 case USB_REQ_GET_STATUS: return "GET_STATUS"; 45 case USB_REQ_CLEAR_FEATURE: return "CLEAR_FEATURE"; 46 case USB_REQ_SET_FEATURE: return "SET_FEATURE"; 47 case USB_REQ_SET_ADDRESS: return "SET_ADDRESS"; 48 case USB_REQ_GET_DESCRIPTOR: return "GET_DESCRIPTOR"; 49 case USB_REQ_SET_DESCRIPTOR: return "SET_DESCRIPTOR"; 50 case USB_REQ_GET_CONFIGURATION: return "GET_CONFIGURATION"; 51 case USB_REQ_SET_CONFIGURATION: return "SET_CONFIGURATION"; 52 case USB_REQ_GET_INTERFACE: return "GET_INTERFACE"; 53 case USB_REQ_SET_INTERFACE: return "SET_INTERFACE"; 54 default: return "*UNKNOWN*"; 55 } 56 } 57 #endif 58 59 static struct usb_endpoint_descriptor ep0_desc = { 60 .bLength = sizeof(struct usb_endpoint_descriptor), 61 .bDescriptorType = USB_DT_ENDPOINT, 62 .bEndpointAddress = USB_DIR_IN, 63 .bmAttributes = USB_ENDPOINT_XFER_CONTROL, 64 }; 65 66 static int ci_pullup(struct usb_gadget *gadget, int is_on); 67 static int ci_ep_enable(struct usb_ep *ep, 68 const struct usb_endpoint_descriptor *desc); 69 static int ci_ep_disable(struct usb_ep *ep); 70 static int ci_ep_queue(struct usb_ep *ep, 71 struct usb_request *req, gfp_t gfp_flags); 72 static struct usb_request * 73 ci_ep_alloc_request(struct usb_ep *ep, unsigned int gfp_flags); 74 static void ci_ep_free_request(struct usb_ep *ep, struct usb_request *_req); 75 76 static struct usb_gadget_ops ci_udc_ops = { 77 .pullup = ci_pullup, 78 }; 79 80 static struct usb_ep_ops ci_ep_ops = { 81 .enable = ci_ep_enable, 82 .disable = ci_ep_disable, 83 .queue = ci_ep_queue, 84 .alloc_request = ci_ep_alloc_request, 85 .free_request = ci_ep_free_request, 86 }; 87 88 /* Init values for USB endpoints. */ 89 static const struct usb_ep ci_ep_init[2] = { 90 [0] = { /* EP 0 */ 91 .maxpacket = 64, 92 .name = "ep0", 93 .ops = &ci_ep_ops, 94 }, 95 [1] = { /* EP 1..n */ 96 .maxpacket = 512, 97 .name = "ep-", 98 .ops = &ci_ep_ops, 99 }, 100 }; 101 102 static struct ci_drv controller = { 103 .gadget = { 104 .name = "ci_udc", 105 .ops = &ci_udc_ops, 106 .is_dualspeed = 1, 107 }, 108 }; 109 110 /** 111 * ci_get_qh() - return queue head for endpoint 112 * @ep_num: Endpoint number 113 * @dir_in: Direction of the endpoint (IN = 1, OUT = 0) 114 * 115 * This function returns the QH associated with particular endpoint 116 * and it's direction. 117 */ 118 static struct ept_queue_head *ci_get_qh(int ep_num, int dir_in) 119 { 120 return &controller.epts[(ep_num * 2) + dir_in]; 121 } 122 123 /** 124 * ci_get_qtd() - return queue item for endpoint 125 * @ep_num: Endpoint number 126 * @dir_in: Direction of the endpoint (IN = 1, OUT = 0) 127 * 128 * This function returns the QH associated with particular endpoint 129 * and it's direction. 130 */ 131 static struct ept_queue_item *ci_get_qtd(int ep_num, int dir_in) 132 { 133 return controller.items[(ep_num * 2) + dir_in]; 134 } 135 136 /** 137 * ci_flush_qh - flush cache over queue head 138 * @ep_num: Endpoint number 139 * 140 * This function flushes cache over QH for particular endpoint. 141 */ 142 static void ci_flush_qh(int ep_num) 143 { 144 struct ept_queue_head *head = ci_get_qh(ep_num, 0); 145 const uint32_t start = (uint32_t)head; 146 const uint32_t end = start + 2 * sizeof(*head); 147 148 flush_dcache_range(start, end); 149 } 150 151 /** 152 * ci_invalidate_qh - invalidate cache over queue head 153 * @ep_num: Endpoint number 154 * 155 * This function invalidates cache over QH for particular endpoint. 156 */ 157 static void ci_invalidate_qh(int ep_num) 158 { 159 struct ept_queue_head *head = ci_get_qh(ep_num, 0); 160 uint32_t start = (uint32_t)head; 161 uint32_t end = start + 2 * sizeof(*head); 162 163 invalidate_dcache_range(start, end); 164 } 165 166 /** 167 * ci_flush_qtd - flush cache over queue item 168 * @ep_num: Endpoint number 169 * 170 * This function flushes cache over qTD pair for particular endpoint. 171 */ 172 static void ci_flush_qtd(int ep_num) 173 { 174 struct ept_queue_item *item = ci_get_qtd(ep_num, 0); 175 const uint32_t start = (uint32_t)item; 176 const uint32_t end_raw = start + 2 * sizeof(*item); 177 const uint32_t end = roundup(end_raw, ARCH_DMA_MINALIGN); 178 179 flush_dcache_range(start, end); 180 } 181 182 /** 183 * ci_invalidate_qtd - invalidate cache over queue item 184 * @ep_num: Endpoint number 185 * 186 * This function invalidates cache over qTD pair for particular endpoint. 187 */ 188 static void ci_invalidate_qtd(int ep_num) 189 { 190 struct ept_queue_item *item = ci_get_qtd(ep_num, 0); 191 const uint32_t start = (uint32_t)item; 192 const uint32_t end_raw = start + 2 * sizeof(*item); 193 const uint32_t end = roundup(end_raw, ARCH_DMA_MINALIGN); 194 195 invalidate_dcache_range(start, end); 196 } 197 198 static struct usb_request * 199 ci_ep_alloc_request(struct usb_ep *ep, unsigned int gfp_flags) 200 { 201 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep); 202 int num; 203 struct ci_req *ci_req; 204 205 num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; 206 if (num == 0 && controller.ep0_req) 207 return &controller.ep0_req->req; 208 209 ci_req = memalign(ARCH_DMA_MINALIGN, sizeof(*ci_req)); 210 if (!ci_req) 211 return NULL; 212 213 INIT_LIST_HEAD(&ci_req->queue); 214 ci_req->b_buf = 0; 215 216 if (num == 0) 217 controller.ep0_req = ci_req; 218 219 return &ci_req->req; 220 } 221 222 static void ci_ep_free_request(struct usb_ep *ep, struct usb_request *req) 223 { 224 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep); 225 struct ci_req *ci_req = container_of(req, struct ci_req, req); 226 int num; 227 228 num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; 229 if (num == 0) 230 controller.ep0_req = 0; 231 232 if (ci_req->b_buf) 233 free(ci_req->b_buf); 234 free(ci_req); 235 } 236 237 static void ep_enable(int num, int in, int maxpacket) 238 { 239 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; 240 unsigned n; 241 242 n = readl(&udc->epctrl[num]); 243 if (in) 244 n |= (CTRL_TXE | CTRL_TXR | CTRL_TXT_BULK); 245 else 246 n |= (CTRL_RXE | CTRL_RXR | CTRL_RXT_BULK); 247 248 if (num != 0) { 249 struct ept_queue_head *head = ci_get_qh(num, in); 250 251 head->config = CONFIG_MAX_PKT(maxpacket) | CONFIG_ZLT; 252 ci_flush_qh(num); 253 } 254 writel(n, &udc->epctrl[num]); 255 } 256 257 static int ci_ep_enable(struct usb_ep *ep, 258 const struct usb_endpoint_descriptor *desc) 259 { 260 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep); 261 int num, in; 262 num = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; 263 in = (desc->bEndpointAddress & USB_DIR_IN) != 0; 264 ci_ep->desc = desc; 265 266 if (num) { 267 int max = get_unaligned_le16(&desc->wMaxPacketSize); 268 269 if ((max > 64) && (controller.gadget.speed == USB_SPEED_FULL)) 270 max = 64; 271 if (ep->maxpacket != max) { 272 DBG("%s: from %d to %d\n", __func__, 273 ep->maxpacket, max); 274 ep->maxpacket = max; 275 } 276 } 277 ep_enable(num, in, ep->maxpacket); 278 DBG("%s: num=%d maxpacket=%d\n", __func__, num, ep->maxpacket); 279 return 0; 280 } 281 282 static int ci_ep_disable(struct usb_ep *ep) 283 { 284 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep); 285 286 ci_ep->desc = NULL; 287 return 0; 288 } 289 290 static int ci_bounce(struct ci_req *ci_req, int in) 291 { 292 struct usb_request *req = &ci_req->req; 293 uint32_t addr = (uint32_t)req->buf; 294 uint32_t hwaddr; 295 uint32_t aligned_used_len; 296 297 /* Input buffer address is not aligned. */ 298 if (addr & (ARCH_DMA_MINALIGN - 1)) 299 goto align; 300 301 /* Input buffer length is not aligned. */ 302 if (req->length & (ARCH_DMA_MINALIGN - 1)) 303 goto align; 304 305 /* The buffer is well aligned, only flush cache. */ 306 ci_req->hw_len = req->length; 307 ci_req->hw_buf = req->buf; 308 goto flush; 309 310 align: 311 if (ci_req->b_buf && req->length > ci_req->b_len) { 312 free(ci_req->b_buf); 313 ci_req->b_buf = 0; 314 } 315 if (!ci_req->b_buf) { 316 ci_req->b_len = roundup(req->length, ARCH_DMA_MINALIGN); 317 ci_req->b_buf = memalign(ARCH_DMA_MINALIGN, ci_req->b_len); 318 if (!ci_req->b_buf) 319 return -ENOMEM; 320 } 321 ci_req->hw_len = ci_req->b_len; 322 ci_req->hw_buf = ci_req->b_buf; 323 324 if (in) 325 memcpy(ci_req->hw_buf, req->buf, req->length); 326 327 flush: 328 hwaddr = (uint32_t)ci_req->hw_buf; 329 aligned_used_len = roundup(req->length, ARCH_DMA_MINALIGN); 330 flush_dcache_range(hwaddr, hwaddr + aligned_used_len); 331 332 return 0; 333 } 334 335 static void ci_debounce(struct ci_req *ci_req, int in) 336 { 337 struct usb_request *req = &ci_req->req; 338 uint32_t addr = (uint32_t)req->buf; 339 uint32_t hwaddr = (uint32_t)ci_req->hw_buf; 340 uint32_t aligned_used_len; 341 342 if (in) 343 return; 344 345 aligned_used_len = roundup(req->actual, ARCH_DMA_MINALIGN); 346 invalidate_dcache_range(hwaddr, hwaddr + aligned_used_len); 347 348 if (addr == hwaddr) 349 return; /* not a bounce */ 350 351 memcpy(req->buf, ci_req->hw_buf, req->actual); 352 } 353 354 static void ci_ep_submit_next_request(struct ci_ep *ci_ep) 355 { 356 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; 357 struct ept_queue_item *item; 358 struct ept_queue_head *head; 359 int bit, num, len, in; 360 struct ci_req *ci_req; 361 362 ci_ep->req_primed = true; 363 364 num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; 365 in = (ci_ep->desc->bEndpointAddress & USB_DIR_IN) != 0; 366 item = ci_get_qtd(num, in); 367 head = ci_get_qh(num, in); 368 369 ci_req = list_first_entry(&ci_ep->queue, struct ci_req, queue); 370 len = ci_req->req.length; 371 372 item->info = INFO_BYTES(len) | INFO_ACTIVE; 373 item->page0 = (uint32_t)ci_req->hw_buf; 374 item->page1 = ((uint32_t)ci_req->hw_buf & 0xfffff000) + 0x1000; 375 item->page2 = ((uint32_t)ci_req->hw_buf & 0xfffff000) + 0x2000; 376 item->page3 = ((uint32_t)ci_req->hw_buf & 0xfffff000) + 0x3000; 377 item->page4 = ((uint32_t)ci_req->hw_buf & 0xfffff000) + 0x4000; 378 379 head->next = (unsigned) item; 380 head->info = 0; 381 382 /* 383 * When sending the data for an IN transaction, the attached host 384 * knows that all data for the IN is sent when one of the following 385 * occurs: 386 * a) A zero-length packet is transmitted. 387 * b) A packet with length that isn't an exact multiple of the ep's 388 * maxpacket is transmitted. 389 * c) Enough data is sent to exactly fill the host's maximum expected 390 * IN transaction size. 391 * 392 * One of these conditions MUST apply at the end of an IN transaction, 393 * or the transaction will not be considered complete by the host. If 394 * none of (a)..(c) already applies, then we must force (a) to apply 395 * by explicitly sending an extra zero-length packet. 396 */ 397 /* IN !a !b !c */ 398 if (in && len && !(len % ci_ep->ep.maxpacket) && ci_req->req.zero) { 399 /* 400 * Each endpoint has 2 items allocated, even though typically 401 * only 1 is used at a time since either an IN or an OUT but 402 * not both is queued. For an IN transaction, item currently 403 * points at the second of these items, so we know that we 404 * can use (item - 1) to transmit the extra zero-length packet 405 */ 406 item->next = (unsigned)(item - 1); 407 item--; 408 item->info = INFO_ACTIVE; 409 } 410 411 item->next = TERMINATE; 412 item->info |= INFO_IOC; 413 414 ci_flush_qtd(num); 415 416 DBG("ept%d %s queue len %x, req %p, buffer %p\n", 417 num, in ? "in" : "out", len, ci_req, ci_req->hw_buf); 418 ci_flush_qh(num); 419 420 if (in) 421 bit = EPT_TX(num); 422 else 423 bit = EPT_RX(num); 424 425 writel(bit, &udc->epprime); 426 } 427 428 static int ci_ep_queue(struct usb_ep *ep, 429 struct usb_request *req, gfp_t gfp_flags) 430 { 431 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep); 432 struct ci_req *ci_req = container_of(req, struct ci_req, req); 433 int in, ret; 434 int __maybe_unused num; 435 436 num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; 437 in = (ci_ep->desc->bEndpointAddress & USB_DIR_IN) != 0; 438 439 if (!num && ci_ep->req_primed) { 440 /* 441 * The flipping of ep0 between IN and OUT relies on 442 * ci_ep_queue consuming the current IN/OUT setting 443 * immediately. If this is deferred to a later point when the 444 * req is pulled out of ci_req->queue, then the IN/OUT setting 445 * may have been changed since the req was queued, and state 446 * will get out of sync. This condition doesn't occur today, 447 * but could if bugs were introduced later, and this error 448 * check will save a lot of debugging time. 449 */ 450 printf("%s: ep0 transaction already in progress\n", __func__); 451 return -EPROTO; 452 } 453 454 ret = ci_bounce(ci_req, in); 455 if (ret) 456 return ret; 457 458 DBG("ept%d %s pre-queue req %p, buffer %p\n", 459 num, in ? "in" : "out", ci_req, ci_req->hw_buf); 460 list_add_tail(&ci_req->queue, &ci_ep->queue); 461 462 if (!ci_ep->req_primed) 463 ci_ep_submit_next_request(ci_ep); 464 465 return 0; 466 } 467 468 static void flip_ep0_direction(void) 469 { 470 if (ep0_desc.bEndpointAddress == USB_DIR_IN) { 471 DBG("%s: Flipping ep0 ot OUT\n", __func__); 472 ep0_desc.bEndpointAddress = 0; 473 } else { 474 DBG("%s: Flipping ep0 ot IN\n", __func__); 475 ep0_desc.bEndpointAddress = USB_DIR_IN; 476 } 477 } 478 479 static void handle_ep_complete(struct ci_ep *ep) 480 { 481 struct ept_queue_item *item; 482 int num, in, len; 483 struct ci_req *ci_req; 484 485 num = ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; 486 in = (ep->desc->bEndpointAddress & USB_DIR_IN) != 0; 487 item = ci_get_qtd(num, in); 488 ci_invalidate_qtd(num); 489 490 len = (item->info >> 16) & 0x7fff; 491 if (item->info & 0xff) 492 printf("EP%d/%s FAIL info=%x pg0=%x\n", 493 num, in ? "in" : "out", item->info, item->page0); 494 495 ci_req = list_first_entry(&ep->queue, struct ci_req, queue); 496 list_del_init(&ci_req->queue); 497 ep->req_primed = false; 498 499 if (!list_empty(&ep->queue)) 500 ci_ep_submit_next_request(ep); 501 502 ci_req->req.actual = ci_req->req.length - len; 503 ci_debounce(ci_req, in); 504 505 DBG("ept%d %s req %p, complete %x\n", 506 num, in ? "in" : "out", ci_req, len); 507 if (num != 0 || controller.ep0_data_phase) 508 ci_req->req.complete(&ep->ep, &ci_req->req); 509 if (num == 0 && controller.ep0_data_phase) { 510 /* 511 * Data Stage is complete, so flip ep0 dir for Status Stage, 512 * which always transfers a packet in the opposite direction. 513 */ 514 DBG("%s: flip ep0 dir for Status Stage\n", __func__); 515 flip_ep0_direction(); 516 controller.ep0_data_phase = false; 517 ci_req->req.length = 0; 518 usb_ep_queue(&ep->ep, &ci_req->req, 0); 519 } 520 } 521 522 #define SETUP(type, request) (((type) << 8) | (request)) 523 524 static void handle_setup(void) 525 { 526 struct ci_ep *ci_ep = &controller.ep[0]; 527 struct ci_req *ci_req; 528 struct usb_request *req; 529 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; 530 struct ept_queue_head *head; 531 struct usb_ctrlrequest r; 532 int status = 0; 533 int num, in, _num, _in, i; 534 char *buf; 535 536 ci_req = controller.ep0_req; 537 req = &ci_req->req; 538 head = ci_get_qh(0, 0); /* EP0 OUT */ 539 540 ci_invalidate_qh(0); 541 memcpy(&r, head->setup_data, sizeof(struct usb_ctrlrequest)); 542 #ifdef CONFIG_CI_UDC_HAS_HOSTPC 543 writel(EPT_RX(0), &udc->epsetupstat); 544 #else 545 writel(EPT_RX(0), &udc->epstat); 546 #endif 547 DBG("handle setup %s, %x, %x index %x value %x length %x\n", 548 reqname(r.bRequest), r.bRequestType, r.bRequest, r.wIndex, 549 r.wValue, r.wLength); 550 551 /* Set EP0 dir for Data Stage based on Setup Stage data */ 552 if (r.bRequestType & USB_DIR_IN) { 553 DBG("%s: Set ep0 to IN for Data Stage\n", __func__); 554 ep0_desc.bEndpointAddress = USB_DIR_IN; 555 } else { 556 DBG("%s: Set ep0 to OUT for Data Stage\n", __func__); 557 ep0_desc.bEndpointAddress = 0; 558 } 559 if (r.wLength) { 560 controller.ep0_data_phase = true; 561 } else { 562 /* 0 length -> no Data Stage. Flip dir for Status Stage */ 563 DBG("%s: 0 length: flip ep0 dir for Status Stage\n", __func__); 564 flip_ep0_direction(); 565 controller.ep0_data_phase = false; 566 } 567 568 list_del_init(&ci_req->queue); 569 ci_ep->req_primed = false; 570 571 switch (SETUP(r.bRequestType, r.bRequest)) { 572 case SETUP(USB_RECIP_ENDPOINT, USB_REQ_CLEAR_FEATURE): 573 _num = r.wIndex & 15; 574 _in = !!(r.wIndex & 0x80); 575 576 if ((r.wValue == 0) && (r.wLength == 0)) { 577 req->length = 0; 578 for (i = 0; i < NUM_ENDPOINTS; i++) { 579 struct ci_ep *ep = &controller.ep[i]; 580 581 if (!ep->desc) 582 continue; 583 num = ep->desc->bEndpointAddress 584 & USB_ENDPOINT_NUMBER_MASK; 585 in = (ep->desc->bEndpointAddress 586 & USB_DIR_IN) != 0; 587 if ((num == _num) && (in == _in)) { 588 ep_enable(num, in, ep->ep.maxpacket); 589 usb_ep_queue(controller.gadget.ep0, 590 req, 0); 591 break; 592 } 593 } 594 } 595 return; 596 597 case SETUP(USB_RECIP_DEVICE, USB_REQ_SET_ADDRESS): 598 /* 599 * write address delayed (will take effect 600 * after the next IN txn) 601 */ 602 writel((r.wValue << 25) | (1 << 24), &udc->devaddr); 603 req->length = 0; 604 usb_ep_queue(controller.gadget.ep0, req, 0); 605 return; 606 607 case SETUP(USB_DIR_IN | USB_RECIP_DEVICE, USB_REQ_GET_STATUS): 608 req->length = 2; 609 buf = (char *)req->buf; 610 buf[0] = 1 << USB_DEVICE_SELF_POWERED; 611 buf[1] = 0; 612 usb_ep_queue(controller.gadget.ep0, req, 0); 613 return; 614 } 615 /* pass request up to the gadget driver */ 616 if (controller.driver) 617 status = controller.driver->setup(&controller.gadget, &r); 618 else 619 status = -ENODEV; 620 621 if (!status) 622 return; 623 DBG("STALL reqname %s type %x value %x, index %x\n", 624 reqname(r.bRequest), r.bRequestType, r.wValue, r.wIndex); 625 writel((1<<16) | (1 << 0), &udc->epctrl[0]); 626 } 627 628 static void stop_activity(void) 629 { 630 int i, num, in; 631 struct ept_queue_head *head; 632 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; 633 writel(readl(&udc->epcomp), &udc->epcomp); 634 #ifdef CONFIG_CI_UDC_HAS_HOSTPC 635 writel(readl(&udc->epsetupstat), &udc->epsetupstat); 636 #endif 637 writel(readl(&udc->epstat), &udc->epstat); 638 writel(0xffffffff, &udc->epflush); 639 640 /* error out any pending reqs */ 641 for (i = 0; i < NUM_ENDPOINTS; i++) { 642 if (i != 0) 643 writel(0, &udc->epctrl[i]); 644 if (controller.ep[i].desc) { 645 num = controller.ep[i].desc->bEndpointAddress 646 & USB_ENDPOINT_NUMBER_MASK; 647 in = (controller.ep[i].desc->bEndpointAddress 648 & USB_DIR_IN) != 0; 649 head = ci_get_qh(num, in); 650 head->info = INFO_ACTIVE; 651 ci_flush_qh(num); 652 } 653 } 654 } 655 656 void udc_irq(void) 657 { 658 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; 659 unsigned n = readl(&udc->usbsts); 660 writel(n, &udc->usbsts); 661 int bit, i, num, in; 662 663 n &= (STS_SLI | STS_URI | STS_PCI | STS_UI | STS_UEI); 664 if (n == 0) 665 return; 666 667 if (n & STS_URI) { 668 DBG("-- reset --\n"); 669 stop_activity(); 670 } 671 if (n & STS_SLI) 672 DBG("-- suspend --\n"); 673 674 if (n & STS_PCI) { 675 int max = 64; 676 int speed = USB_SPEED_FULL; 677 678 #ifdef CONFIG_CI_UDC_HAS_HOSTPC 679 bit = (readl(&udc->hostpc1_devlc) >> 25) & 3; 680 #else 681 bit = (readl(&udc->portsc) >> 26) & 3; 682 #endif 683 DBG("-- portchange %x %s\n", bit, (bit == 2) ? "High" : "Full"); 684 if (bit == 2) { 685 speed = USB_SPEED_HIGH; 686 max = 512; 687 } 688 controller.gadget.speed = speed; 689 for (i = 1; i < NUM_ENDPOINTS; i++) { 690 if (controller.ep[i].ep.maxpacket > max) 691 controller.ep[i].ep.maxpacket = max; 692 } 693 } 694 695 if (n & STS_UEI) 696 printf("<UEI %x>\n", readl(&udc->epcomp)); 697 698 if ((n & STS_UI) || (n & STS_UEI)) { 699 #ifdef CONFIG_CI_UDC_HAS_HOSTPC 700 n = readl(&udc->epsetupstat); 701 #else 702 n = readl(&udc->epstat); 703 #endif 704 if (n & EPT_RX(0)) 705 handle_setup(); 706 707 n = readl(&udc->epcomp); 708 if (n != 0) 709 writel(n, &udc->epcomp); 710 711 for (i = 0; i < NUM_ENDPOINTS && n; i++) { 712 if (controller.ep[i].desc) { 713 num = controller.ep[i].desc->bEndpointAddress 714 & USB_ENDPOINT_NUMBER_MASK; 715 in = (controller.ep[i].desc->bEndpointAddress 716 & USB_DIR_IN) != 0; 717 bit = (in) ? EPT_TX(num) : EPT_RX(num); 718 if (n & bit) 719 handle_ep_complete(&controller.ep[i]); 720 } 721 } 722 } 723 } 724 725 int usb_gadget_handle_interrupts(void) 726 { 727 u32 value; 728 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; 729 730 value = readl(&udc->usbsts); 731 if (value) 732 udc_irq(); 733 734 return value; 735 } 736 737 void udc_disconnect(void) 738 { 739 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; 740 /* disable pullup */ 741 stop_activity(); 742 writel(USBCMD_FS2, &udc->usbcmd); 743 udelay(800); 744 if (controller.driver) 745 controller.driver->disconnect(&controller.gadget); 746 } 747 748 static int ci_pullup(struct usb_gadget *gadget, int is_on) 749 { 750 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; 751 if (is_on) { 752 /* RESET */ 753 writel(USBCMD_ITC(MICRO_8FRAME) | USBCMD_RST, &udc->usbcmd); 754 udelay(200); 755 756 writel((unsigned)controller.epts, &udc->epinitaddr); 757 758 /* select DEVICE mode */ 759 writel(USBMODE_DEVICE, &udc->usbmode); 760 761 writel(0xffffffff, &udc->epflush); 762 763 /* Turn on the USB connection by enabling the pullup resistor */ 764 writel(USBCMD_ITC(MICRO_8FRAME) | USBCMD_RUN, &udc->usbcmd); 765 } else { 766 udc_disconnect(); 767 } 768 769 return 0; 770 } 771 772 static int ci_udc_probe(void) 773 { 774 struct ept_queue_head *head; 775 uint8_t *imem; 776 int i; 777 778 const int num = 2 * NUM_ENDPOINTS; 779 780 const int eplist_min_align = 4096; 781 const int eplist_align = roundup(eplist_min_align, ARCH_DMA_MINALIGN); 782 const int eplist_raw_sz = num * sizeof(struct ept_queue_head); 783 const int eplist_sz = roundup(eplist_raw_sz, ARCH_DMA_MINALIGN); 784 785 const int ilist_align = roundup(ARCH_DMA_MINALIGN, 32); 786 const int ilist_ent_raw_sz = 2 * sizeof(struct ept_queue_item); 787 const int ilist_ent_sz = roundup(ilist_ent_raw_sz, ARCH_DMA_MINALIGN); 788 const int ilist_sz = NUM_ENDPOINTS * ilist_ent_sz; 789 790 /* The QH list must be aligned to 4096 bytes. */ 791 controller.epts = memalign(eplist_align, eplist_sz); 792 if (!controller.epts) 793 return -ENOMEM; 794 memset(controller.epts, 0, eplist_sz); 795 796 /* 797 * Each qTD item must be 32-byte aligned, each qTD touple must be 798 * cacheline aligned. There are two qTD items for each endpoint and 799 * only one of them is used for the endpoint at time, so we can group 800 * them together. 801 */ 802 controller.items_mem = memalign(ilist_align, ilist_sz); 803 if (!controller.items_mem) { 804 free(controller.epts); 805 return -ENOMEM; 806 } 807 memset(controller.items_mem, 0, ilist_sz); 808 809 for (i = 0; i < 2 * NUM_ENDPOINTS; i++) { 810 /* 811 * Configure QH for each endpoint. The structure of the QH list 812 * is such that each two subsequent fields, N and N+1 where N is 813 * even, in the QH list represent QH for one endpoint. The Nth 814 * entry represents OUT configuration and the N+1th entry does 815 * represent IN configuration of the endpoint. 816 */ 817 head = controller.epts + i; 818 if (i < 2) 819 head->config = CONFIG_MAX_PKT(EP0_MAX_PACKET_SIZE) 820 | CONFIG_ZLT | CONFIG_IOS; 821 else 822 head->config = CONFIG_MAX_PKT(EP_MAX_PACKET_SIZE) 823 | CONFIG_ZLT; 824 head->next = TERMINATE; 825 head->info = 0; 826 827 imem = controller.items_mem + ((i >> 1) * ilist_ent_sz); 828 if (i & 1) 829 imem += sizeof(struct ept_queue_item); 830 831 controller.items[i] = (struct ept_queue_item *)imem; 832 833 if (i & 1) { 834 ci_flush_qh(i - 1); 835 ci_flush_qtd(i - 1); 836 } 837 } 838 839 INIT_LIST_HEAD(&controller.gadget.ep_list); 840 841 /* Init EP 0 */ 842 memcpy(&controller.ep[0].ep, &ci_ep_init[0], sizeof(*ci_ep_init)); 843 controller.ep[0].desc = &ep0_desc; 844 INIT_LIST_HEAD(&controller.ep[0].queue); 845 controller.ep[0].req_primed = false; 846 controller.gadget.ep0 = &controller.ep[0].ep; 847 INIT_LIST_HEAD(&controller.gadget.ep0->ep_list); 848 849 /* Init EP 1..n */ 850 for (i = 1; i < NUM_ENDPOINTS; i++) { 851 memcpy(&controller.ep[i].ep, &ci_ep_init[1], 852 sizeof(*ci_ep_init)); 853 INIT_LIST_HEAD(&controller.ep[i].queue); 854 controller.ep[i].req_primed = false; 855 list_add_tail(&controller.ep[i].ep.ep_list, 856 &controller.gadget.ep_list); 857 } 858 859 ci_ep_alloc_request(&controller.ep[0].ep, 0); 860 if (!controller.ep0_req) { 861 free(controller.items_mem); 862 free(controller.epts); 863 return -ENOMEM; 864 } 865 866 return 0; 867 } 868 869 int usb_gadget_register_driver(struct usb_gadget_driver *driver) 870 { 871 int ret; 872 873 if (!driver) 874 return -EINVAL; 875 if (!driver->bind || !driver->setup || !driver->disconnect) 876 return -EINVAL; 877 if (driver->speed != USB_SPEED_FULL && driver->speed != USB_SPEED_HIGH) 878 return -EINVAL; 879 880 ret = usb_lowlevel_init(0, USB_INIT_DEVICE, (void **)&controller.ctrl); 881 if (ret) 882 return ret; 883 884 ret = ci_udc_probe(); 885 #if defined(CONFIG_USB_EHCI_MX6) || defined(CONFIG_USB_EHCI_MXS) 886 /* 887 * FIXME: usb_lowlevel_init()->ehci_hcd_init() should be doing all 888 * HW-specific initialization, e.g. ULPI-vs-UTMI PHY selection 889 */ 890 if (!ret) { 891 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; 892 893 /* select ULPI phy */ 894 writel(PTS(PTS_ENABLE) | PFSC, &udc->portsc); 895 } 896 #endif 897 898 ret = driver->bind(&controller.gadget); 899 if (ret) { 900 DBG("driver->bind() returned %d\n", ret); 901 return ret; 902 } 903 controller.driver = driver; 904 905 return 0; 906 } 907 908 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) 909 { 910 udc_disconnect(); 911 912 ci_ep_free_request(&controller.ep[0].ep, &controller.ep0_req->req); 913 free(controller.items_mem); 914 free(controller.epts); 915 916 return 0; 917 } 918