xref: /openbmc/u-boot/drivers/usb/gadget/at91_udc.h (revision 00a457b2)
1 /*
2  * Copyright (C) 2004 by Thomas Rathbone, HP Labs
3  * Copyright (C) 2005 by Ivan Kokshaysky
4  * Copyright (C) 2006 by SAN People
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  */
11 
12 #ifndef AT91_UDC_H
13 #define AT91_UDC_H
14 
15 /*
16  * USB Device Port (UDP) registers.
17  * Based on AT91RM9200 datasheet revision E.
18  */
19 
20 #define AT91_UDP_FRM_NUM	0x00		/* Frame Number Register */
21 #define     AT91_UDP_NUM	(0x7ff <<  0)	/* Frame Number */
22 #define     AT91_UDP_FRM_ERR	(1     << 16)	/* Frame Error */
23 #define     AT91_UDP_FRM_OK	(1     << 17)	/* Frame OK */
24 
25 #define AT91_UDP_GLB_STAT	0x04		/* Global State Register */
26 #define     AT91_UDP_FADDEN	(1 <<  0)	/* Function Address Enable */
27 #define     AT91_UDP_CONFG	(1 <<  1)	/* Configured */
28 #define     AT91_UDP_ESR	(1 <<  2)	/* Enable Send Resume */
29 #define     AT91_UDP_RSMINPR	(1 <<  3)	/* Resume has been sent */
30 #define     AT91_UDP_RMWUPE	(1 <<  4)	/* Remote Wake Up Enable */
31 
32 #define AT91_UDP_FADDR		0x08		/* Function Address Register */
33 #define     AT91_UDP_FADD	(0x7f << 0)	/* Function Address Value */
34 #define     AT91_UDP_FEN	(1    << 8)	/* Function Enable */
35 
36 #define AT91_UDP_IER		0x10		/* Interrupt Enable Register */
37 #define AT91_UDP_IDR		0x14		/* Interrupt Disable Register */
38 #define AT91_UDP_IMR		0x18		/* Interrupt Mask Register */
39 
40 #define AT91_UDP_ISR		0x1c		/* Interrupt Status Register */
41 #define     AT91_UDP_EP(n)	(1 << (n))	/* Endpoint Interrupt Status */
42 #define     AT91_UDP_RXSUSP	(1 <<  8) 	/* USB Suspend Interrupt Status */
43 #define     AT91_UDP_RXRSM	(1 <<  9)	/* USB Resume Interrupt Status */
44 #define     AT91_UDP_EXTRSM	(1 << 10)	/* External Resume Interrupt Status [AT91RM9200 only] */
45 #define     AT91_UDP_SOFINT	(1 << 11)	/* Start of Frame Interrupt Status */
46 #define     AT91_UDP_ENDBUSRES	(1 << 12)	/* End of Bus Reset Interrupt Status */
47 #define     AT91_UDP_WAKEUP	(1 << 13)	/* USB Wakeup Interrupt Status [AT91RM9200 only] */
48 
49 #define AT91_UDP_ICR		0x20		/* Interrupt Clear Register */
50 #define AT91_UDP_RST_EP		0x28		/* Reset Endpoint Register */
51 
52 #define AT91_UDP_CSR(n)		(0x30+((n)*4))	/* Endpoint Control/Status Registers 0-7 */
53 #define     AT91_UDP_TXCOMP	(1 <<  0)	/* Generates IN packet with data previously written in DPR */
54 #define     AT91_UDP_RX_DATA_BK0 (1 <<  1)	/* Receive Data Bank 0 */
55 #define     AT91_UDP_RXSETUP	(1 <<  2)	/* Send STALL to the host */
56 #define     AT91_UDP_STALLSENT	(1 <<  3)	/* Stall Sent / Isochronous error (Isochronous endpoints) */
57 #define     AT91_UDP_TXPKTRDY	(1 <<  4)	/* Transmit Packet Ready */
58 #define     AT91_UDP_FORCESTALL	(1 <<  5)	/* Force Stall */
59 #define     AT91_UDP_RX_DATA_BK1 (1 <<  6)	/* Receive Data Bank 1 */
60 #define     AT91_UDP_DIR	(1 <<  7)	/* Transfer Direction */
61 #define     AT91_UDP_EPTYPE	(7 <<  8)	/* Endpoint Type */
62 #define		AT91_UDP_EPTYPE_CTRL		(0 <<  8)
63 #define		AT91_UDP_EPTYPE_ISO_OUT		(1 <<  8)
64 #define		AT91_UDP_EPTYPE_BULK_OUT	(2 <<  8)
65 #define		AT91_UDP_EPTYPE_INT_OUT		(3 <<  8)
66 #define		AT91_UDP_EPTYPE_ISO_IN		(5 <<  8)
67 #define		AT91_UDP_EPTYPE_BULK_IN		(6 <<  8)
68 #define		AT91_UDP_EPTYPE_INT_IN		(7 <<  8)
69 #define     AT91_UDP_DTGLE	(1 << 11)	/* Data Toggle */
70 #define     AT91_UDP_EPEDS	(1 << 15)	/* Endpoint Enable/Disable */
71 #define     AT91_UDP_RXBYTECNT	(0x7ff << 16)	/* Number of bytes in FIFO */
72 
73 #define AT91_UDP_FDR(n)		(0x50+((n)*4))	/* Endpoint FIFO Data Registers 0-7 */
74 
75 #define AT91_UDP_TXVC		0x74		/* Transceiver Control Register */
76 #define     AT91_UDP_TXVC_TXVDIS (1 << 8)	/* Transceiver Disable */
77 #define     AT91_UDP_TXVC_PUON   (1 << 9)	/* PullUp On [AT91SAM9260 only] */
78 
79 /*-------------------------------------------------------------------------*/
80 
81 /*
82  * controller driver data structures
83  */
84 
85 #define	NUM_ENDPOINTS	6
86 
87 /*
88  * hardware won't disable bus reset, or resume while the controller
89  * is suspended ... watching suspend helps keep the logic symmetric.
90  */
91 #define	MINIMUS_INTERRUPTUS \
92 	(AT91_UDP_ENDBUSRES | AT91_UDP_RXRSM | AT91_UDP_RXSUSP)
93 
94 struct at91_ep {
95 	struct usb_ep			ep;
96 	struct list_head		queue;
97 	struct at91_udc			*udc;
98 	void __iomem			*creg;
99 
100 	unsigned			maxpacket:16;
101 	u8				int_mask;
102 	unsigned			is_pingpong:1;
103 
104 	unsigned			stopped:1;
105 	unsigned			is_in:1;
106 	unsigned			is_iso:1;
107 	unsigned			fifo_bank:1;
108 };
109 
110 struct at91_udc_caps {
111 	int (*init)(struct at91_udc *udc);
112 	void (*pullup)(struct at91_udc *udc, int is_on);
113 };
114 
115 /*
116  * driver is non-SMP, and just blocks IRQs whenever it needs
117  * access protection for chip registers or driver state
118  */
119 struct at91_udc {
120 	struct usb_gadget		gadget;
121 	struct at91_ep			ep[NUM_ENDPOINTS];
122 	struct usb_gadget_driver	*driver;
123 	const struct at91_udc_caps	*caps;
124 	unsigned			vbus:1;
125 	unsigned			enabled:1;
126 	unsigned			clocked:1;
127 	unsigned			suspended:1;
128 	unsigned			req_pending:1;
129 	unsigned			wait_for_addr_ack:1;
130 	unsigned			wait_for_config_ack:1;
131 	unsigned			selfpowered:1;
132 	unsigned			active_suspend:1;
133 	u8				addr;
134 	struct at91_udc_data		board;
135 	void __iomem			*udp_baseaddr;
136 	int				udp_irq;
137 	spinlock_t			lock;
138 	struct at91_matrix		*matrix;
139 };
140 
141 static inline struct at91_udc *to_udc(struct usb_gadget *g)
142 {
143 	return container_of(g, struct at91_udc, gadget);
144 }
145 
146 struct at91_request {
147 	struct usb_request		req;
148 	struct list_head		queue;
149 };
150 
151 /*-------------------------------------------------------------------------*/
152 
153 #ifdef VERBOSE_DEBUG
154 #    define VDBG		DBG
155 #else
156 #    define VDBG(stuff...)	do{}while(0)
157 #endif
158 
159 #ifdef PACKET_TRACE
160 #    define PACKET		VDBG
161 #else
162 #    define PACKET(stuff...)	do{}while(0)
163 #endif
164 
165 #define ERR(stuff...)		debug("udc: " stuff)
166 #define WARNING(stuff...)	debug("udc: " stuff)
167 #define INFO(stuff...)		debug("udc: " stuff)
168 #define DBG(stuff...)		debug("udc: " stuff)
169 
170 #endif
171 
172