1 /* 2 * from linux: 3 * c94e289f195e: usb: gadget: remove incorrect __init/__exit annotations 4 * 5 * at91_udc -- driver for at91-series USB peripheral controller 6 * 7 * Copyright (C) 2004 by Thomas Rathbone 8 * Copyright (C) 2005 by HP Labs 9 * Copyright (C) 2005 by David Brownell 10 * 11 * SPDX-License-Identifier: GPL-2.0+ 12 */ 13 14 #undef VERBOSE_DEBUG 15 #undef PACKET_TRACE 16 17 #include <common.h> 18 #include <asm/errno.h> 19 #include <asm/io.h> 20 #include <asm/gpio.h> 21 #include <asm/hardware.h> 22 #include <mach/at91_matrix.h> 23 #include <linux/list.h> 24 #include <linux/usb/ch9.h> 25 #include <linux/usb/gadget.h> 26 #include <linux/usb/at91_udc.h> 27 #include <malloc.h> 28 #include <usb/lin_gadget_compat.h> 29 30 #include "at91_udc.h" 31 32 /* 33 * This controller is simple and PIO-only. It's used in many AT91-series 34 * full speed USB controllers, including the at91rm9200 (arm920T, with MMU), 35 * at91sam926x (arm926ejs, with MMU), and several no-mmu versions. 36 * 37 * This driver expects the board has been wired with two GPIOs supporting 38 * a VBUS sensing IRQ, and a D+ pullup. (They may be omitted, but the 39 * testing hasn't covered such cases.) 40 * 41 * The pullup is most important (so it's integrated on sam926x parts). It 42 * provides software control over whether the host enumerates the device. 43 * 44 * The VBUS sensing helps during enumeration, and allows both USB clocks 45 * (and the transceiver) to stay gated off until they're necessary, saving 46 * power. During USB suspend, the 48 MHz clock is gated off in hardware; 47 * it may also be gated off by software during some Linux sleep states. 48 */ 49 50 #define DRIVER_VERSION "3 May 2006" 51 52 static const char driver_name [] = "at91_udc"; 53 static const char * const ep_names[] = { 54 "ep0", 55 "ep1", 56 "ep2", 57 "ep3-int", 58 "ep4", 59 "ep5", 60 }; 61 #define ep0name ep_names[0] 62 63 #define at91_udp_read(udc, reg) \ 64 __raw_readl((udc)->udp_baseaddr + (reg)) 65 #define at91_udp_write(udc, reg, val) \ 66 __raw_writel((val), (udc)->udp_baseaddr + (reg)) 67 68 static struct at91_udc *controller; 69 70 /*-------------------------------------------------------------------------*/ 71 72 static void done(struct at91_ep *ep, struct at91_request *req, int status) 73 { 74 unsigned stopped = ep->stopped; 75 struct at91_udc *udc = ep->udc; 76 77 list_del_init(&req->queue); 78 if (req->req.status == -EINPROGRESS) 79 req->req.status = status; 80 else 81 status = req->req.status; 82 if (status && status != -ESHUTDOWN) 83 VDBG("%s done %p, status %d\n", ep->ep.name, req, status); 84 85 ep->stopped = 1; 86 spin_unlock(&udc->lock); 87 req->req.complete(&ep->ep, &req->req); 88 spin_lock(&udc->lock); 89 ep->stopped = stopped; 90 91 /* ep0 is always ready; other endpoints need a non-empty queue */ 92 if (list_empty(&ep->queue) && ep->int_mask != (1 << 0)) 93 at91_udp_write(udc, AT91_UDP_IDR, ep->int_mask); 94 } 95 96 /*-------------------------------------------------------------------------*/ 97 98 /* bits indicating OUT fifo has data ready */ 99 #define RX_DATA_READY (AT91_UDP_RX_DATA_BK0 | AT91_UDP_RX_DATA_BK1) 100 101 /* 102 * Endpoint FIFO CSR bits have a mix of bits, making it unsafe to just write 103 * back most of the value you just read (because of side effects, including 104 * bits that may change after reading and before writing). 105 * 106 * Except when changing a specific bit, always write values which: 107 * - clear SET_FX bits (setting them could change something) 108 * - set CLR_FX bits (clearing them could change something) 109 * 110 * There are also state bits like FORCESTALL, EPEDS, DIR, and EPTYPE 111 * that shouldn't normally be changed. 112 * 113 * NOTE at91sam9260 docs mention synch between UDPCK and MCK clock domains, 114 * implying a need to wait for one write to complete (test relevant bits) 115 * before starting the next write. This shouldn't be an issue given how 116 * infrequently we write, except maybe for write-then-read idioms. 117 */ 118 #define SET_FX (AT91_UDP_TXPKTRDY) 119 #define CLR_FX (RX_DATA_READY | AT91_UDP_RXSETUP \ 120 | AT91_UDP_STALLSENT | AT91_UDP_TXCOMP) 121 122 /* pull OUT packet data from the endpoint's fifo */ 123 static int read_fifo (struct at91_ep *ep, struct at91_request *req) 124 { 125 u32 __iomem *creg = ep->creg; 126 u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0)); 127 u32 csr; 128 u8 *buf; 129 unsigned int count, bufferspace, is_done; 130 131 buf = req->req.buf + req->req.actual; 132 bufferspace = req->req.length - req->req.actual; 133 134 /* 135 * there might be nothing to read if ep_queue() calls us, 136 * or if we already emptied both pingpong buffers 137 */ 138 rescan: 139 csr = __raw_readl(creg); 140 if ((csr & RX_DATA_READY) == 0) 141 return 0; 142 143 count = (csr & AT91_UDP_RXBYTECNT) >> 16; 144 if (count > ep->ep.maxpacket) 145 count = ep->ep.maxpacket; 146 if (count > bufferspace) { 147 DBG("%s buffer overflow\n", ep->ep.name); 148 req->req.status = -EOVERFLOW; 149 count = bufferspace; 150 } 151 __raw_readsb((unsigned long)dreg, buf, count); 152 153 /* release and swap pingpong mem bank */ 154 csr |= CLR_FX; 155 if (ep->is_pingpong) { 156 if (ep->fifo_bank == 0) { 157 csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); 158 ep->fifo_bank = 1; 159 } else { 160 csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK1); 161 ep->fifo_bank = 0; 162 } 163 } else 164 csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); 165 __raw_writel(csr, creg); 166 167 req->req.actual += count; 168 is_done = (count < ep->ep.maxpacket); 169 if (count == bufferspace) 170 is_done = 1; 171 172 PACKET("%s %p out/%d%s\n", ep->ep.name, &req->req, count, 173 is_done ? " (done)" : ""); 174 175 /* 176 * avoid extra trips through IRQ logic for packets already in 177 * the fifo ... maybe preventing an extra (expensive) OUT-NAK 178 */ 179 if (is_done) 180 done(ep, req, 0); 181 else if (ep->is_pingpong) { 182 /* 183 * One dummy read to delay the code because of a HW glitch: 184 * CSR returns bad RXCOUNT when read too soon after updating 185 * RX_DATA_BK flags. 186 */ 187 csr = __raw_readl(creg); 188 189 bufferspace -= count; 190 buf += count; 191 goto rescan; 192 } 193 194 return is_done; 195 } 196 197 /* load fifo for an IN packet */ 198 static int write_fifo(struct at91_ep *ep, struct at91_request *req) 199 { 200 u32 __iomem *creg = ep->creg; 201 u32 csr = __raw_readl(creg); 202 u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0)); 203 unsigned total, count, is_last; 204 u8 *buf; 205 206 /* 207 * TODO: allow for writing two packets to the fifo ... that'll 208 * reduce the amount of IN-NAKing, but probably won't affect 209 * throughput much. (Unlike preventing OUT-NAKing!) 210 */ 211 212 /* 213 * If ep_queue() calls us, the queue is empty and possibly in 214 * odd states like TXCOMP not yet cleared (we do it, saving at 215 * least one IRQ) or the fifo not yet being free. Those aren't 216 * issues normally (IRQ handler fast path). 217 */ 218 if (unlikely(csr & (AT91_UDP_TXCOMP | AT91_UDP_TXPKTRDY))) { 219 if (csr & AT91_UDP_TXCOMP) { 220 csr |= CLR_FX; 221 csr &= ~(SET_FX | AT91_UDP_TXCOMP); 222 __raw_writel(csr, creg); 223 csr = __raw_readl(creg); 224 } 225 if (csr & AT91_UDP_TXPKTRDY) 226 return 0; 227 } 228 229 buf = req->req.buf + req->req.actual; 230 prefetch(buf); 231 total = req->req.length - req->req.actual; 232 if (ep->ep.maxpacket < total) { 233 count = ep->ep.maxpacket; 234 is_last = 0; 235 } else { 236 count = total; 237 is_last = (count < ep->ep.maxpacket) || !req->req.zero; 238 } 239 240 /* 241 * Write the packet, maybe it's a ZLP. 242 * 243 * NOTE: incrementing req->actual before we receive the ACK means 244 * gadget driver IN bytecounts can be wrong in fault cases. That's 245 * fixable with PIO drivers like this one (save "count" here, and 246 * do the increment later on TX irq), but not for most DMA hardware. 247 * 248 * So all gadget drivers must accept that potential error. Some 249 * hardware supports precise fifo status reporting, letting them 250 * recover when the actual bytecount matters (e.g. for USB Test 251 * and Measurement Class devices). 252 */ 253 __raw_writesb((unsigned long)dreg, buf, count); 254 csr &= ~SET_FX; 255 csr |= CLR_FX | AT91_UDP_TXPKTRDY; 256 __raw_writel(csr, creg); 257 req->req.actual += count; 258 259 PACKET("%s %p in/%d%s\n", ep->ep.name, &req->req, count, 260 is_last ? " (done)" : ""); 261 if (is_last) 262 done(ep, req, 0); 263 return is_last; 264 } 265 266 static void nuke(struct at91_ep *ep, int status) 267 { 268 struct at91_request *req; 269 270 /* terminate any request in the queue */ 271 ep->stopped = 1; 272 if (list_empty(&ep->queue)) 273 return; 274 275 VDBG("%s %s\n", __func__, ep->ep.name); 276 while (!list_empty(&ep->queue)) { 277 req = list_entry(ep->queue.next, struct at91_request, queue); 278 done(ep, req, status); 279 } 280 } 281 282 /*-------------------------------------------------------------------------*/ 283 284 static int at91_ep_enable(struct usb_ep *_ep, 285 const struct usb_endpoint_descriptor *desc) 286 { 287 struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); 288 struct at91_udc *udc; 289 u16 maxpacket; 290 u32 tmp; 291 unsigned long flags; 292 293 if (!_ep || !ep 294 || !desc || _ep->name == ep0name 295 || desc->bDescriptorType != USB_DT_ENDPOINT 296 || (maxpacket = usb_endpoint_maxp(desc)) == 0 297 || maxpacket > ep->maxpacket) { 298 DBG("bad ep or descriptor\n"); 299 return -EINVAL; 300 } 301 302 udc = ep->udc; 303 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) { 304 DBG("bogus device state\n"); 305 return -ESHUTDOWN; 306 } 307 308 tmp = usb_endpoint_type(desc); 309 switch (tmp) { 310 case USB_ENDPOINT_XFER_CONTROL: 311 DBG("only one control endpoint\n"); 312 return -EINVAL; 313 case USB_ENDPOINT_XFER_INT: 314 if (maxpacket > 64) 315 goto bogus_max; 316 break; 317 case USB_ENDPOINT_XFER_BULK: 318 switch (maxpacket) { 319 case 8: 320 case 16: 321 case 32: 322 case 64: 323 goto ok; 324 } 325 bogus_max: 326 DBG("bogus maxpacket %d\n", maxpacket); 327 return -EINVAL; 328 case USB_ENDPOINT_XFER_ISOC: 329 if (!ep->is_pingpong) { 330 DBG("iso requires double buffering\n"); 331 return -EINVAL; 332 } 333 break; 334 } 335 336 ok: 337 spin_lock_irqsave(&udc->lock, flags); 338 339 /* initialize endpoint to match this descriptor */ 340 ep->is_in = usb_endpoint_dir_in(desc); 341 ep->is_iso = (tmp == USB_ENDPOINT_XFER_ISOC); 342 ep->stopped = 0; 343 if (ep->is_in) 344 tmp |= 0x04; 345 tmp <<= 8; 346 tmp |= AT91_UDP_EPEDS; 347 __raw_writel(tmp, ep->creg); 348 349 ep->ep.maxpacket = maxpacket; 350 351 /* 352 * reset/init endpoint fifo. NOTE: leaves fifo_bank alone, 353 * since endpoint resets don't reset hw pingpong state. 354 */ 355 at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); 356 at91_udp_write(udc, AT91_UDP_RST_EP, 0); 357 358 spin_unlock_irqrestore(&udc->lock, flags); 359 return 0; 360 } 361 362 static int at91_ep_disable (struct usb_ep * _ep) 363 { 364 struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); 365 struct at91_udc *udc = ep->udc; 366 unsigned long flags; 367 368 if (ep == &ep->udc->ep[0]) 369 return -EINVAL; 370 371 spin_lock_irqsave(&udc->lock, flags); 372 373 nuke(ep, -ESHUTDOWN); 374 375 /* restore the endpoint's pristine config */ 376 ep->ep.desc = NULL; 377 ep->ep.maxpacket = ep->maxpacket; 378 379 /* reset fifos and endpoint */ 380 if (ep->udc->clocked) { 381 at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); 382 at91_udp_write(udc, AT91_UDP_RST_EP, 0); 383 __raw_writel(0, ep->creg); 384 } 385 386 spin_unlock_irqrestore(&udc->lock, flags); 387 return 0; 388 } 389 390 /* 391 * this is a PIO-only driver, so there's nothing 392 * interesting for request or buffer allocation. 393 */ 394 395 static struct usb_request * 396 at91_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags) 397 { 398 struct at91_request *req; 399 400 req = kzalloc(sizeof (struct at91_request), gfp_flags); 401 if (!req) 402 return NULL; 403 404 INIT_LIST_HEAD(&req->queue); 405 return &req->req; 406 } 407 408 static void at91_ep_free_request(struct usb_ep *_ep, struct usb_request *_req) 409 { 410 struct at91_request *req; 411 412 req = container_of(_req, struct at91_request, req); 413 BUG_ON(!list_empty(&req->queue)); 414 kfree(req); 415 } 416 417 static int at91_ep_queue(struct usb_ep *_ep, 418 struct usb_request *_req, gfp_t gfp_flags) 419 { 420 struct at91_request *req; 421 struct at91_ep *ep; 422 struct at91_udc *udc; 423 int status; 424 unsigned long flags; 425 426 req = container_of(_req, struct at91_request, req); 427 ep = container_of(_ep, struct at91_ep, ep); 428 429 if (!_req || !_req->complete 430 || !_req->buf || !list_empty(&req->queue)) { 431 DBG("invalid request\n"); 432 return -EINVAL; 433 } 434 435 if (!_ep || (!ep->ep.desc && ep->ep.name != ep0name)) { 436 DBG("invalid ep\n"); 437 return -EINVAL; 438 } 439 440 udc = ep->udc; 441 442 if (!udc || !udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) { 443 DBG("invalid device\n"); 444 return -EINVAL; 445 } 446 447 _req->status = -EINPROGRESS; 448 _req->actual = 0; 449 450 spin_lock_irqsave(&udc->lock, flags); 451 452 /* try to kickstart any empty and idle queue */ 453 if (list_empty(&ep->queue) && !ep->stopped) { 454 int is_ep0; 455 456 /* 457 * If this control request has a non-empty DATA stage, this 458 * will start that stage. It works just like a non-control 459 * request (until the status stage starts, maybe early). 460 * 461 * If the data stage is empty, then this starts a successful 462 * IN/STATUS stage. (Unsuccessful ones use set_halt.) 463 */ 464 is_ep0 = (ep->ep.name == ep0name); 465 if (is_ep0) { 466 u32 tmp; 467 468 if (!udc->req_pending) { 469 status = -EINVAL; 470 goto done; 471 } 472 473 /* 474 * defer changing CONFG until after the gadget driver 475 * reconfigures the endpoints. 476 */ 477 if (udc->wait_for_config_ack) { 478 tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); 479 tmp ^= AT91_UDP_CONFG; 480 VDBG("toggle config\n"); 481 at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); 482 } 483 if (req->req.length == 0) { 484 ep0_in_status: 485 PACKET("ep0 in/status\n"); 486 status = 0; 487 tmp = __raw_readl(ep->creg); 488 tmp &= ~SET_FX; 489 tmp |= CLR_FX | AT91_UDP_TXPKTRDY; 490 __raw_writel(tmp, ep->creg); 491 udc->req_pending = 0; 492 goto done; 493 } 494 } 495 496 if (ep->is_in) 497 status = write_fifo(ep, req); 498 else { 499 status = read_fifo(ep, req); 500 501 /* IN/STATUS stage is otherwise triggered by irq */ 502 if (status && is_ep0) 503 goto ep0_in_status; 504 } 505 } else 506 status = 0; 507 508 if (req && !status) { 509 list_add_tail (&req->queue, &ep->queue); 510 at91_udp_write(udc, AT91_UDP_IER, ep->int_mask); 511 } 512 done: 513 spin_unlock_irqrestore(&udc->lock, flags); 514 return (status < 0) ? status : 0; 515 } 516 517 static int at91_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) 518 { 519 struct at91_ep *ep; 520 struct at91_request *req; 521 unsigned long flags; 522 523 ep = container_of(_ep, struct at91_ep, ep); 524 if (!_ep || ep->ep.name == ep0name) 525 return -EINVAL; 526 527 spin_lock_irqsave(&udc->lock, flags); 528 529 /* make sure it's actually queued on this endpoint */ 530 list_for_each_entry (req, &ep->queue, queue) { 531 if (&req->req == _req) 532 break; 533 } 534 if (&req->req != _req) { 535 spin_unlock_irqrestore(&udc->lock, flags); 536 return -EINVAL; 537 } 538 539 done(ep, req, -ECONNRESET); 540 spin_unlock_irqrestore(&udc->lock, flags); 541 return 0; 542 } 543 544 static int at91_ep_set_halt(struct usb_ep *_ep, int value) 545 { 546 struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); 547 struct at91_udc *udc = ep->udc; 548 u32 __iomem *creg; 549 u32 csr; 550 unsigned long flags; 551 int status = 0; 552 553 if (!_ep || ep->is_iso || !ep->udc->clocked) 554 return -EINVAL; 555 556 creg = ep->creg; 557 spin_lock_irqsave(&udc->lock, flags); 558 559 csr = __raw_readl(creg); 560 561 /* 562 * fail with still-busy IN endpoints, ensuring correct sequencing 563 * of data tx then stall. note that the fifo rx bytecount isn't 564 * completely accurate as a tx bytecount. 565 */ 566 if (ep->is_in && (!list_empty(&ep->queue) || (csr >> 16) != 0)) 567 status = -EAGAIN; 568 else { 569 csr |= CLR_FX; 570 csr &= ~SET_FX; 571 if (value) { 572 csr |= AT91_UDP_FORCESTALL; 573 VDBG("halt %s\n", ep->ep.name); 574 } else { 575 at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); 576 at91_udp_write(udc, AT91_UDP_RST_EP, 0); 577 csr &= ~AT91_UDP_FORCESTALL; 578 } 579 __raw_writel(csr, creg); 580 } 581 582 spin_unlock_irqrestore(&udc->lock, flags); 583 return status; 584 } 585 586 static const struct usb_ep_ops at91_ep_ops = { 587 .enable = at91_ep_enable, 588 .disable = at91_ep_disable, 589 .alloc_request = at91_ep_alloc_request, 590 .free_request = at91_ep_free_request, 591 .queue = at91_ep_queue, 592 .dequeue = at91_ep_dequeue, 593 .set_halt = at91_ep_set_halt, 594 /* there's only imprecise fifo status reporting */ 595 }; 596 597 /*-------------------------------------------------------------------------*/ 598 599 static int at91_get_frame(struct usb_gadget *gadget) 600 { 601 struct at91_udc *udc = to_udc(gadget); 602 603 if (!to_udc(gadget)->clocked) 604 return -EINVAL; 605 return at91_udp_read(udc, AT91_UDP_FRM_NUM) & AT91_UDP_NUM; 606 } 607 608 static int at91_wakeup(struct usb_gadget *gadget) 609 { 610 struct at91_udc *udc = to_udc(gadget); 611 u32 glbstate; 612 int status = -EINVAL; 613 unsigned long flags; 614 615 DBG("%s\n", __func__ ); 616 spin_lock_irqsave(&udc->lock, flags); 617 618 if (!udc->clocked || !udc->suspended) 619 goto done; 620 621 /* NOTE: some "early versions" handle ESR differently ... */ 622 623 glbstate = at91_udp_read(udc, AT91_UDP_GLB_STAT); 624 if (!(glbstate & AT91_UDP_ESR)) 625 goto done; 626 glbstate |= AT91_UDP_ESR; 627 at91_udp_write(udc, AT91_UDP_GLB_STAT, glbstate); 628 629 done: 630 spin_unlock_irqrestore(&udc->lock, flags); 631 return status; 632 } 633 634 /* reinit == restore initial software state */ 635 static void udc_reinit(struct at91_udc *udc) 636 { 637 u32 i; 638 639 INIT_LIST_HEAD(&udc->gadget.ep_list); 640 INIT_LIST_HEAD(&udc->gadget.ep0->ep_list); 641 642 for (i = 0; i < NUM_ENDPOINTS; i++) { 643 struct at91_ep *ep = &udc->ep[i]; 644 645 if (i != 0) 646 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list); 647 ep->ep.desc = NULL; 648 ep->stopped = 0; 649 ep->fifo_bank = 0; 650 usb_ep_set_maxpacket_limit(&ep->ep, ep->maxpacket); 651 ep->creg = (void __iomem *) udc->udp_baseaddr + AT91_UDP_CSR(i); 652 /* initialize one queue per endpoint */ 653 INIT_LIST_HEAD(&ep->queue); 654 } 655 } 656 657 static void reset_gadget(struct at91_udc *udc) 658 { 659 struct usb_gadget_driver *driver = udc->driver; 660 int i; 661 662 if (udc->gadget.speed == USB_SPEED_UNKNOWN) 663 driver = NULL; 664 udc->gadget.speed = USB_SPEED_UNKNOWN; 665 udc->suspended = 0; 666 667 for (i = 0; i < NUM_ENDPOINTS; i++) { 668 struct at91_ep *ep = &udc->ep[i]; 669 670 ep->stopped = 1; 671 nuke(ep, -ESHUTDOWN); 672 } 673 if (driver) { 674 spin_unlock(&udc->lock); 675 udc->driver->disconnect(&udc->gadget); 676 spin_lock(&udc->lock); 677 } 678 679 udc_reinit(udc); 680 } 681 682 static void stop_activity(struct at91_udc *udc) 683 { 684 struct usb_gadget_driver *driver = udc->driver; 685 int i; 686 687 if (udc->gadget.speed == USB_SPEED_UNKNOWN) 688 driver = NULL; 689 udc->gadget.speed = USB_SPEED_UNKNOWN; 690 udc->suspended = 0; 691 692 for (i = 0; i < NUM_ENDPOINTS; i++) { 693 struct at91_ep *ep = &udc->ep[i]; 694 ep->stopped = 1; 695 nuke(ep, -ESHUTDOWN); 696 } 697 if (driver) { 698 spin_unlock(&udc->lock); 699 driver->disconnect(&udc->gadget); 700 spin_lock(&udc->lock); 701 } 702 703 udc_reinit(udc); 704 } 705 706 static void clk_on(struct at91_udc *udc) 707 { 708 if (udc->clocked) 709 return; 710 udc->clocked = 1; 711 } 712 713 static void clk_off(struct at91_udc *udc) 714 { 715 if (!udc->clocked) 716 return; 717 udc->clocked = 0; 718 udc->gadget.speed = USB_SPEED_UNKNOWN; 719 } 720 721 /* 722 * activate/deactivate link with host; minimize power usage for 723 * inactive links by cutting clocks and transceiver power. 724 */ 725 static void pullup(struct at91_udc *udc, int is_on) 726 { 727 if (!udc->enabled || !udc->vbus) 728 is_on = 0; 729 DBG("%sactive\n", is_on ? "" : "in"); 730 731 if (is_on) { 732 clk_on(udc); 733 at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXRSM); 734 at91_udp_write(udc, AT91_UDP_TXVC, 0); 735 } else { 736 stop_activity(udc); 737 at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXRSM); 738 at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS); 739 clk_off(udc); 740 } 741 742 if (udc->caps && udc->caps->pullup) 743 udc->caps->pullup(udc, is_on); 744 } 745 746 /* vbus is here! turn everything on that's ready */ 747 static int at91_vbus_session(struct usb_gadget *gadget, int is_active) 748 { 749 struct at91_udc *udc = to_udc(gadget); 750 unsigned long flags; 751 752 /* VDBG("vbus %s\n", is_active ? "on" : "off"); */ 753 spin_lock_irqsave(&udc->lock, flags); 754 udc->vbus = (is_active != 0); 755 if (udc->driver) 756 pullup(udc, is_active); 757 else 758 pullup(udc, 0); 759 spin_unlock_irqrestore(&udc->lock, flags); 760 return 0; 761 } 762 763 static int at91_pullup(struct usb_gadget *gadget, int is_on) 764 { 765 struct at91_udc *udc = to_udc(gadget); 766 unsigned long flags; 767 768 spin_lock_irqsave(&udc->lock, flags); 769 udc->enabled = is_on = !!is_on; 770 pullup(udc, is_on); 771 spin_unlock_irqrestore(&udc->lock, flags); 772 return 0; 773 } 774 775 static int at91_set_selfpowered(struct usb_gadget *gadget, int is_on) 776 { 777 struct at91_udc *udc = to_udc(gadget); 778 unsigned long flags; 779 780 spin_lock_irqsave(&udc->lock, flags); 781 udc->selfpowered = (is_on != 0); 782 spin_unlock_irqrestore(&udc->lock, flags); 783 return 0; 784 } 785 786 static int at91_start(struct usb_gadget *gadget, 787 struct usb_gadget_driver *driver); 788 static int at91_stop(struct usb_gadget *gadget); 789 790 static const struct usb_gadget_ops at91_udc_ops = { 791 .get_frame = at91_get_frame, 792 .wakeup = at91_wakeup, 793 .set_selfpowered = at91_set_selfpowered, 794 .vbus_session = at91_vbus_session, 795 .pullup = at91_pullup, 796 .udc_start = at91_start, 797 .udc_stop = at91_stop, 798 799 /* 800 * VBUS-powered devices may also also want to support bigger 801 * power budgets after an appropriate SET_CONFIGURATION. 802 */ 803 /* .vbus_power = at91_vbus_power, */ 804 }; 805 806 /*-------------------------------------------------------------------------*/ 807 808 static int handle_ep(struct at91_ep *ep) 809 { 810 struct at91_request *req; 811 u32 __iomem *creg = ep->creg; 812 u32 csr = __raw_readl(creg); 813 814 if (!list_empty(&ep->queue)) 815 req = list_entry(ep->queue.next, 816 struct at91_request, queue); 817 else 818 req = NULL; 819 820 if (ep->is_in) { 821 if (csr & (AT91_UDP_STALLSENT | AT91_UDP_TXCOMP)) { 822 csr |= CLR_FX; 823 csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_TXCOMP); 824 __raw_writel(csr, creg); 825 } 826 if (req) 827 return write_fifo(ep, req); 828 829 } else { 830 if (csr & AT91_UDP_STALLSENT) { 831 /* STALLSENT bit == ISOERR */ 832 if (ep->is_iso && req) 833 req->req.status = -EILSEQ; 834 csr |= CLR_FX; 835 csr &= ~(SET_FX | AT91_UDP_STALLSENT); 836 __raw_writel(csr, creg); 837 csr = __raw_readl(creg); 838 } 839 if (req && (csr & RX_DATA_READY)) 840 return read_fifo(ep, req); 841 } 842 return 0; 843 } 844 845 union setup { 846 u8 raw[8]; 847 struct usb_ctrlrequest r; 848 }; 849 850 static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr) 851 { 852 u32 __iomem *creg = ep->creg; 853 u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0)); 854 unsigned rxcount, i = 0; 855 u32 tmp; 856 union setup pkt; 857 int status = 0; 858 859 /* read and ack SETUP; hard-fail for bogus packets */ 860 rxcount = (csr & AT91_UDP_RXBYTECNT) >> 16; 861 if (likely(rxcount == 8)) { 862 while (rxcount--) 863 pkt.raw[i++] = __raw_readb(dreg); 864 if (pkt.r.bRequestType & USB_DIR_IN) { 865 csr |= AT91_UDP_DIR; 866 ep->is_in = 1; 867 } else { 868 csr &= ~AT91_UDP_DIR; 869 ep->is_in = 0; 870 } 871 } else { 872 /* REVISIT this happens sometimes under load; why?? */ 873 ERR("SETUP len %d, csr %08x\n", rxcount, csr); 874 status = -EINVAL; 875 } 876 csr |= CLR_FX; 877 csr &= ~(SET_FX | AT91_UDP_RXSETUP); 878 __raw_writel(csr, creg); 879 udc->wait_for_addr_ack = 0; 880 udc->wait_for_config_ack = 0; 881 ep->stopped = 0; 882 if (unlikely(status != 0)) 883 goto stall; 884 885 #define w_index le16_to_cpu(pkt.r.wIndex) 886 #define w_value le16_to_cpu(pkt.r.wValue) 887 #define w_length le16_to_cpu(pkt.r.wLength) 888 889 VDBG("SETUP %02x.%02x v%04x i%04x l%04x\n", 890 pkt.r.bRequestType, pkt.r.bRequest, 891 w_value, w_index, w_length); 892 893 /* 894 * A few standard requests get handled here, ones that touch 895 * hardware ... notably for device and endpoint features. 896 */ 897 udc->req_pending = 1; 898 csr = __raw_readl(creg); 899 csr |= CLR_FX; 900 csr &= ~SET_FX; 901 switch ((pkt.r.bRequestType << 8) | pkt.r.bRequest) { 902 903 case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) 904 | USB_REQ_SET_ADDRESS: 905 __raw_writel(csr | AT91_UDP_TXPKTRDY, creg); 906 udc->addr = w_value; 907 udc->wait_for_addr_ack = 1; 908 udc->req_pending = 0; 909 /* FADDR is set later, when we ack host STATUS */ 910 return; 911 912 case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) 913 | USB_REQ_SET_CONFIGURATION: 914 tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT) & AT91_UDP_CONFG; 915 if (pkt.r.wValue) 916 udc->wait_for_config_ack = (tmp == 0); 917 else 918 udc->wait_for_config_ack = (tmp != 0); 919 if (udc->wait_for_config_ack) 920 VDBG("wait for config\n"); 921 /* CONFG is toggled later, if gadget driver succeeds */ 922 break; 923 924 /* 925 * Hosts may set or clear remote wakeup status, and 926 * devices may report they're VBUS powered. 927 */ 928 case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) 929 | USB_REQ_GET_STATUS: 930 tmp = (udc->selfpowered << USB_DEVICE_SELF_POWERED); 931 if (at91_udp_read(udc, AT91_UDP_GLB_STAT) & AT91_UDP_ESR) 932 tmp |= (1 << USB_DEVICE_REMOTE_WAKEUP); 933 PACKET("get device status\n"); 934 __raw_writeb(tmp, dreg); 935 __raw_writeb(0, dreg); 936 goto write_in; 937 /* then STATUS starts later, automatically */ 938 case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) 939 | USB_REQ_SET_FEATURE: 940 if (w_value != USB_DEVICE_REMOTE_WAKEUP) 941 goto stall; 942 tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); 943 tmp |= AT91_UDP_ESR; 944 at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); 945 goto succeed; 946 case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) 947 | USB_REQ_CLEAR_FEATURE: 948 if (w_value != USB_DEVICE_REMOTE_WAKEUP) 949 goto stall; 950 tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); 951 tmp &= ~AT91_UDP_ESR; 952 at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); 953 goto succeed; 954 955 /* 956 * Interfaces have no feature settings; this is pretty useless. 957 * we won't even insist the interface exists... 958 */ 959 case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8) 960 | USB_REQ_GET_STATUS: 961 PACKET("get interface status\n"); 962 __raw_writeb(0, dreg); 963 __raw_writeb(0, dreg); 964 goto write_in; 965 /* then STATUS starts later, automatically */ 966 case ((USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8) 967 | USB_REQ_SET_FEATURE: 968 case ((USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8) 969 | USB_REQ_CLEAR_FEATURE: 970 goto stall; 971 972 /* 973 * Hosts may clear bulk/intr endpoint halt after the gadget 974 * driver sets it (not widely used); or set it (for testing) 975 */ 976 case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8) 977 | USB_REQ_GET_STATUS: 978 tmp = w_index & USB_ENDPOINT_NUMBER_MASK; 979 ep = &udc->ep[tmp]; 980 if (tmp >= NUM_ENDPOINTS || (tmp && !ep->ep.desc)) 981 goto stall; 982 983 if (tmp) { 984 if ((w_index & USB_DIR_IN)) { 985 if (!ep->is_in) 986 goto stall; 987 } else if (ep->is_in) 988 goto stall; 989 } 990 PACKET("get %s status\n", ep->ep.name); 991 if (__raw_readl(ep->creg) & AT91_UDP_FORCESTALL) 992 tmp = (1 << USB_ENDPOINT_HALT); 993 else 994 tmp = 0; 995 __raw_writeb(tmp, dreg); 996 __raw_writeb(0, dreg); 997 goto write_in; 998 /* then STATUS starts later, automatically */ 999 case ((USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8) 1000 | USB_REQ_SET_FEATURE: 1001 tmp = w_index & USB_ENDPOINT_NUMBER_MASK; 1002 ep = &udc->ep[tmp]; 1003 if (w_value != USB_ENDPOINT_HALT || tmp >= NUM_ENDPOINTS) 1004 goto stall; 1005 if (!ep->ep.desc || ep->is_iso) 1006 goto stall; 1007 if ((w_index & USB_DIR_IN)) { 1008 if (!ep->is_in) 1009 goto stall; 1010 } else if (ep->is_in) 1011 goto stall; 1012 1013 tmp = __raw_readl(ep->creg); 1014 tmp &= ~SET_FX; 1015 tmp |= CLR_FX | AT91_UDP_FORCESTALL; 1016 __raw_writel(tmp, ep->creg); 1017 goto succeed; 1018 case ((USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8) 1019 | USB_REQ_CLEAR_FEATURE: 1020 tmp = w_index & USB_ENDPOINT_NUMBER_MASK; 1021 ep = &udc->ep[tmp]; 1022 if (w_value != USB_ENDPOINT_HALT || tmp >= NUM_ENDPOINTS) 1023 goto stall; 1024 if (tmp == 0) 1025 goto succeed; 1026 if (!ep->ep.desc || ep->is_iso) 1027 goto stall; 1028 if ((w_index & USB_DIR_IN)) { 1029 if (!ep->is_in) 1030 goto stall; 1031 } else if (ep->is_in) 1032 goto stall; 1033 1034 at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); 1035 at91_udp_write(udc, AT91_UDP_RST_EP, 0); 1036 tmp = __raw_readl(ep->creg); 1037 tmp |= CLR_FX; 1038 tmp &= ~(SET_FX | AT91_UDP_FORCESTALL); 1039 __raw_writel(tmp, ep->creg); 1040 if (!list_empty(&ep->queue)) 1041 handle_ep(ep); 1042 goto succeed; 1043 } 1044 1045 #undef w_value 1046 #undef w_index 1047 #undef w_length 1048 1049 /* pass request up to the gadget driver */ 1050 if (udc->driver) { 1051 spin_unlock(&udc->lock); 1052 status = udc->driver->setup(&udc->gadget, &pkt.r); 1053 spin_lock(&udc->lock); 1054 } 1055 else 1056 status = -ENODEV; 1057 if (status < 0) { 1058 stall: 1059 VDBG("req %02x.%02x protocol STALL; stat %d\n", 1060 pkt.r.bRequestType, pkt.r.bRequest, status); 1061 csr |= AT91_UDP_FORCESTALL; 1062 __raw_writel(csr, creg); 1063 udc->req_pending = 0; 1064 } 1065 return; 1066 1067 succeed: 1068 /* immediate successful (IN) STATUS after zero length DATA */ 1069 PACKET("ep0 in/status\n"); 1070 write_in: 1071 csr |= AT91_UDP_TXPKTRDY; 1072 __raw_writel(csr, creg); 1073 udc->req_pending = 0; 1074 } 1075 1076 static void handle_ep0(struct at91_udc *udc) 1077 { 1078 struct at91_ep *ep0 = &udc->ep[0]; 1079 u32 __iomem *creg = ep0->creg; 1080 u32 csr = __raw_readl(creg); 1081 struct at91_request *req; 1082 1083 if (unlikely(csr & AT91_UDP_STALLSENT)) { 1084 nuke(ep0, -EPROTO); 1085 udc->req_pending = 0; 1086 csr |= CLR_FX; 1087 csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_FORCESTALL); 1088 __raw_writel(csr, creg); 1089 VDBG("ep0 stalled\n"); 1090 csr = __raw_readl(creg); 1091 } 1092 if (csr & AT91_UDP_RXSETUP) { 1093 nuke(ep0, 0); 1094 udc->req_pending = 0; 1095 handle_setup(udc, ep0, csr); 1096 return; 1097 } 1098 1099 if (list_empty(&ep0->queue)) 1100 req = NULL; 1101 else 1102 req = list_entry(ep0->queue.next, struct at91_request, queue); 1103 1104 /* host ACKed an IN packet that we sent */ 1105 if (csr & AT91_UDP_TXCOMP) { 1106 csr |= CLR_FX; 1107 csr &= ~(SET_FX | AT91_UDP_TXCOMP); 1108 1109 /* write more IN DATA? */ 1110 if (req && ep0->is_in) { 1111 if (handle_ep(ep0)) 1112 udc->req_pending = 0; 1113 1114 /* 1115 * Ack after: 1116 * - last IN DATA packet (including GET_STATUS) 1117 * - IN/STATUS for OUT DATA 1118 * - IN/STATUS for any zero-length DATA stage 1119 * except for the IN DATA case, the host should send 1120 * an OUT status later, which we'll ack. 1121 */ 1122 } else { 1123 udc->req_pending = 0; 1124 __raw_writel(csr, creg); 1125 1126 /* 1127 * SET_ADDRESS takes effect only after the STATUS 1128 * (to the original address) gets acked. 1129 */ 1130 if (udc->wait_for_addr_ack) { 1131 u32 tmp; 1132 1133 at91_udp_write(udc, AT91_UDP_FADDR, 1134 AT91_UDP_FEN | udc->addr); 1135 tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); 1136 tmp &= ~AT91_UDP_FADDEN; 1137 if (udc->addr) 1138 tmp |= AT91_UDP_FADDEN; 1139 at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); 1140 1141 udc->wait_for_addr_ack = 0; 1142 VDBG("address %d\n", udc->addr); 1143 } 1144 } 1145 } 1146 1147 /* OUT packet arrived ... */ 1148 else if (csr & AT91_UDP_RX_DATA_BK0) { 1149 csr |= CLR_FX; 1150 csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); 1151 1152 /* OUT DATA stage */ 1153 if (!ep0->is_in) { 1154 if (req) { 1155 if (handle_ep(ep0)) { 1156 /* send IN/STATUS */ 1157 PACKET("ep0 in/status\n"); 1158 csr = __raw_readl(creg); 1159 csr &= ~SET_FX; 1160 csr |= CLR_FX | AT91_UDP_TXPKTRDY; 1161 __raw_writel(csr, creg); 1162 udc->req_pending = 0; 1163 } 1164 } else if (udc->req_pending) { 1165 /* 1166 * AT91 hardware has a hard time with this 1167 * "deferred response" mode for control-OUT 1168 * transfers. (For control-IN it's fine.) 1169 * 1170 * The normal solution leaves OUT data in the 1171 * fifo until the gadget driver is ready. 1172 * We couldn't do that here without disabling 1173 * the IRQ that tells about SETUP packets, 1174 * e.g. when the host gets impatient... 1175 * 1176 * Working around it by copying into a buffer 1177 * would almost be a non-deferred response, 1178 * except that it wouldn't permit reliable 1179 * stalling of the request. Instead, demand 1180 * that gadget drivers not use this mode. 1181 */ 1182 DBG("no control-OUT deferred responses!\n"); 1183 __raw_writel(csr | AT91_UDP_FORCESTALL, creg); 1184 udc->req_pending = 0; 1185 } 1186 1187 /* STATUS stage for control-IN; ack. */ 1188 } else { 1189 PACKET("ep0 out/status ACK\n"); 1190 __raw_writel(csr, creg); 1191 1192 /* "early" status stage */ 1193 if (req) 1194 done(ep0, req, 0); 1195 } 1196 } 1197 } 1198 1199 static irqreturn_t at91_udc_irq(struct at91_udc *udc) 1200 { 1201 u32 rescans = 5; 1202 int disable_clock = 0; 1203 unsigned long flags; 1204 1205 spin_lock_irqsave(&udc->lock, flags); 1206 1207 if (!udc->clocked) { 1208 clk_on(udc); 1209 disable_clock = 1; 1210 } 1211 1212 while (rescans--) { 1213 u32 status; 1214 1215 status = at91_udp_read(udc, AT91_UDP_ISR) 1216 & at91_udp_read(udc, AT91_UDP_IMR); 1217 if (!status) 1218 break; 1219 1220 /* USB reset irq: not maskable */ 1221 if (status & AT91_UDP_ENDBUSRES) { 1222 at91_udp_write(udc, AT91_UDP_IDR, ~MINIMUS_INTERRUPTUS); 1223 at91_udp_write(udc, AT91_UDP_IER, MINIMUS_INTERRUPTUS); 1224 /* Atmel code clears this irq twice */ 1225 at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_ENDBUSRES); 1226 at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_ENDBUSRES); 1227 VDBG("end bus reset\n"); 1228 udc->addr = 0; 1229 reset_gadget(udc); 1230 1231 /* enable ep0 */ 1232 at91_udp_write(udc, AT91_UDP_CSR(0), 1233 AT91_UDP_EPEDS | AT91_UDP_EPTYPE_CTRL); 1234 udc->gadget.speed = USB_SPEED_FULL; 1235 udc->suspended = 0; 1236 at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_EP(0)); 1237 1238 /* 1239 * NOTE: this driver keeps clocks off unless the 1240 * USB host is present. That saves power, but for 1241 * boards that don't support VBUS detection, both 1242 * clocks need to be active most of the time. 1243 */ 1244 1245 /* host initiated suspend (3+ms bus idle) */ 1246 } else if (status & AT91_UDP_RXSUSP) { 1247 at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXSUSP); 1248 at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_RXRSM); 1249 at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXSUSP); 1250 /* VDBG("bus suspend\n"); */ 1251 if (udc->suspended) 1252 continue; 1253 udc->suspended = 1; 1254 1255 /* 1256 * NOTE: when suspending a VBUS-powered device, the 1257 * gadget driver should switch into slow clock mode 1258 * and then into standby to avoid drawing more than 1259 * 500uA power (2500uA for some high-power configs). 1260 */ 1261 if (udc->driver && udc->driver->suspend) { 1262 spin_unlock(&udc->lock); 1263 udc->driver->suspend(&udc->gadget); 1264 spin_lock(&udc->lock); 1265 } 1266 1267 /* host initiated resume */ 1268 } else if (status & AT91_UDP_RXRSM) { 1269 at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXRSM); 1270 at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_RXSUSP); 1271 at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXRSM); 1272 /* VDBG("bus resume\n"); */ 1273 if (!udc->suspended) 1274 continue; 1275 udc->suspended = 0; 1276 1277 /* 1278 * NOTE: for a VBUS-powered device, the gadget driver 1279 * would normally want to switch out of slow clock 1280 * mode into normal mode. 1281 */ 1282 if (udc->driver && udc->driver->resume) { 1283 spin_unlock(&udc->lock); 1284 udc->driver->resume(&udc->gadget); 1285 spin_lock(&udc->lock); 1286 } 1287 1288 /* endpoint IRQs are cleared by handling them */ 1289 } else { 1290 int i; 1291 unsigned mask = 1; 1292 struct at91_ep *ep = &udc->ep[1]; 1293 1294 if (status & mask) 1295 handle_ep0(udc); 1296 for (i = 1; i < NUM_ENDPOINTS; i++) { 1297 mask <<= 1; 1298 if (status & mask) 1299 handle_ep(ep); 1300 ep++; 1301 } 1302 } 1303 } 1304 1305 if (disable_clock) 1306 clk_off(udc); 1307 1308 spin_unlock_irqrestore(&udc->lock, flags); 1309 1310 return IRQ_HANDLED; 1311 } 1312 1313 /*-------------------------------------------------------------------------*/ 1314 1315 static int at91_start(struct usb_gadget *gadget, 1316 struct usb_gadget_driver *driver) 1317 { 1318 struct at91_udc *udc = controller; 1319 1320 udc->driver = driver; 1321 udc->enabled = 1; 1322 udc->selfpowered = 1; 1323 1324 return 0; 1325 } 1326 1327 static int at91_stop(struct usb_gadget *gadget) 1328 { 1329 struct at91_udc *udc = controller; 1330 unsigned long flags; 1331 1332 spin_lock_irqsave(&udc->lock, flags); 1333 udc->enabled = 0; 1334 at91_udp_write(udc, AT91_UDP_IDR, ~0); 1335 spin_unlock_irqrestore(&udc->lock, flags); 1336 1337 udc->driver = NULL; 1338 1339 return 0; 1340 } 1341 1342 /*-------------------------------------------------------------------------*/ 1343 1344 static int at91rm9200_udc_init(struct at91_udc *udc) 1345 { 1346 struct at91_ep *ep; 1347 int ret; 1348 int i; 1349 1350 for (i = 0; i < NUM_ENDPOINTS; i++) { 1351 ep = &udc->ep[i]; 1352 1353 switch (i) { 1354 case 0: 1355 case 3: 1356 ep->maxpacket = 8; 1357 break; 1358 case 1 ... 2: 1359 ep->maxpacket = 64; 1360 break; 1361 case 4 ... 5: 1362 ep->maxpacket = 256; 1363 break; 1364 } 1365 } 1366 1367 ret = gpio_request(udc->board.pullup_pin, "udc_pullup"); 1368 if (ret) { 1369 DBG("D+ pullup is busy\n"); 1370 return ret; 1371 } 1372 1373 gpio_direction_output(udc->board.pullup_pin, 1374 udc->board.pullup_active_low); 1375 1376 return 0; 1377 } 1378 1379 static void at91rm9200_udc_pullup(struct at91_udc *udc, int is_on) 1380 { 1381 int active = !udc->board.pullup_active_low; 1382 1383 if (is_on) 1384 gpio_set_value(udc->board.pullup_pin, active); 1385 else 1386 gpio_set_value(udc->board.pullup_pin, !active); 1387 } 1388 1389 static const struct at91_udc_caps at91rm9200_udc_caps = { 1390 .init = at91rm9200_udc_init, 1391 .pullup = at91rm9200_udc_pullup, 1392 }; 1393 1394 static int at91sam9260_udc_init(struct at91_udc *udc) 1395 { 1396 struct at91_ep *ep; 1397 int i; 1398 1399 for (i = 0; i < NUM_ENDPOINTS; i++) { 1400 ep = &udc->ep[i]; 1401 1402 switch (i) { 1403 case 0 ... 3: 1404 ep->maxpacket = 64; 1405 break; 1406 case 4 ... 5: 1407 ep->maxpacket = 512; 1408 break; 1409 } 1410 } 1411 1412 return 0; 1413 } 1414 1415 #if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20) 1416 static void at91sam9260_udc_pullup(struct at91_udc *udc, int is_on) 1417 { 1418 u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC); 1419 1420 if (is_on) 1421 txvc |= AT91_UDP_TXVC_PUON; 1422 else 1423 txvc &= ~AT91_UDP_TXVC_PUON; 1424 1425 at91_udp_write(udc, AT91_UDP_TXVC, txvc); 1426 } 1427 1428 static const struct at91_udc_caps at91sam9260_udc_caps = { 1429 .init = at91sam9260_udc_init, 1430 .pullup = at91sam9260_udc_pullup, 1431 }; 1432 #endif 1433 1434 #if defined(CONFIG_AT91SAM9261) 1435 static int at91sam9261_udc_init(struct at91_udc *udc) 1436 { 1437 struct at91_ep *ep; 1438 int i; 1439 1440 for (i = 0; i < NUM_ENDPOINTS; i++) { 1441 ep = &udc->ep[i]; 1442 1443 switch (i) { 1444 case 0: 1445 ep->maxpacket = 8; 1446 break; 1447 case 1 ... 3: 1448 ep->maxpacket = 64; 1449 break; 1450 case 4 ... 5: 1451 ep->maxpacket = 256; 1452 break; 1453 } 1454 } 1455 1456 udc->matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; 1457 1458 if (IS_ERR(udc->matrix)) 1459 return PTR_ERR(udc->matrix); 1460 1461 return 0; 1462 } 1463 1464 static void at91sam9261_udc_pullup(struct at91_udc *udc, int is_on) 1465 { 1466 u32 usbpucr = 0; 1467 1468 usbpucr = readl(&udc->matrix->pucr); 1469 if (is_on) 1470 usbpucr |= AT91_MATRIX_USBPUCR_PUON; 1471 1472 writel(usbpucr, &udc->matrix->pucr); 1473 } 1474 1475 static const struct at91_udc_caps at91sam9261_udc_caps = { 1476 .init = at91sam9261_udc_init, 1477 .pullup = at91sam9261_udc_pullup, 1478 }; 1479 #endif 1480 1481 static int at91sam9263_udc_init(struct at91_udc *udc) 1482 { 1483 struct at91_ep *ep; 1484 int i; 1485 1486 for (i = 0; i < NUM_ENDPOINTS; i++) { 1487 ep = &udc->ep[i]; 1488 1489 switch (i) { 1490 case 0: 1491 case 1: 1492 case 2: 1493 case 3: 1494 ep->maxpacket = 64; 1495 break; 1496 case 4: 1497 case 5: 1498 ep->maxpacket = 256; 1499 break; 1500 } 1501 } 1502 1503 return 0; 1504 } 1505 1506 static const struct at91_udc_caps at91sam9263_udc_caps = { 1507 .init = at91sam9263_udc_init, 1508 .pullup = at91sam9260_udc_pullup, 1509 }; 1510 1511 int usb_gadget_handle_interrupts(int index) 1512 { 1513 struct at91_udc *udc = controller; 1514 1515 return at91_udc_irq(udc); 1516 } 1517 1518 int usb_gadget_register_driver(struct usb_gadget_driver *driver) 1519 { 1520 struct at91_udc *udc = controller; 1521 int ret; 1522 1523 if (!driver || !driver->bind || !driver->setup) { 1524 printf("bad paramter\n"); 1525 return -EINVAL; 1526 } 1527 1528 if (udc->driver) { 1529 printf("UDC already has a gadget driver\n"); 1530 return -EBUSY; 1531 } 1532 1533 at91_start(&udc->gadget, driver); 1534 1535 udc->driver = driver; 1536 1537 ret = driver->bind(&udc->gadget); 1538 if (ret) { 1539 error("driver->bind() returned %d\n", ret); 1540 udc->driver = NULL; 1541 } 1542 1543 return ret; 1544 } 1545 1546 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) 1547 { 1548 struct at91_udc *udc = controller; 1549 1550 if (!driver || !driver->unbind || !driver->disconnect) { 1551 error("bad paramter\n"); 1552 return -EINVAL; 1553 } 1554 1555 driver->disconnect(&udc->gadget); 1556 driver->unbind(&udc->gadget); 1557 udc->driver = NULL; 1558 1559 at91_stop(&udc->gadget); 1560 1561 return 0; 1562 } 1563 1564 int at91_udc_probe(struct at91_udc_data *pdata) 1565 { 1566 struct at91_udc *udc; 1567 int retval; 1568 struct at91_ep *ep; 1569 int i; 1570 1571 udc = kzalloc(sizeof(*udc), GFP_KERNEL); 1572 if (!udc) 1573 return -ENOMEM; 1574 1575 controller = udc; 1576 memcpy(&udc->board, pdata, sizeof(struct at91_udc_data)); 1577 if (udc->board.vbus_pin) { 1578 printf("%s: gpio vbus pin not supported yet.\n", __func__); 1579 return -ENXIO; 1580 } else { 1581 DBG("no VBUS detection, assuming always-on\n"); 1582 udc->vbus = 1; 1583 } 1584 1585 #if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20) 1586 udc->caps = &at91sam9260_udc_caps; 1587 #endif 1588 1589 udc->enabled = 0; 1590 spin_lock_init(&udc->lock); 1591 1592 udc->gadget.ops = &at91_udc_ops; 1593 udc->gadget.ep0 = &udc->ep[0].ep; 1594 udc->gadget.name = driver_name; 1595 1596 for (i = 0; i < NUM_ENDPOINTS; i++) { 1597 ep = &udc->ep[i]; 1598 ep->ep.name = ep_names[i]; 1599 ep->ep.ops = &at91_ep_ops; 1600 ep->udc = udc; 1601 ep->int_mask = (1 << i); 1602 if (i != 0 && i != 3) 1603 ep->is_pingpong = 1; 1604 } 1605 1606 udc->udp_baseaddr = (void *)udc->board.baseaddr; 1607 if (IS_ERR(udc->udp_baseaddr)) 1608 return PTR_ERR(udc->udp_baseaddr); 1609 1610 if (udc->caps && udc->caps->init) { 1611 retval = udc->caps->init(udc); 1612 if (retval) 1613 return retval; 1614 } 1615 1616 udc_reinit(udc); 1617 1618 at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS); 1619 at91_udp_write(udc, AT91_UDP_IDR, 0xffffffff); 1620 /* Clear all pending interrupts - UDP may be used by bootloader. */ 1621 at91_udp_write(udc, AT91_UDP_ICR, 0xffffffff); 1622 1623 INFO("%s version %s\n", driver_name, DRIVER_VERSION); 1624 return 0; 1625 } 1626