1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * from linux: 4 * c94e289f195e: usb: gadget: remove incorrect __init/__exit annotations 5 * 6 * at91_udc -- driver for at91-series USB peripheral controller 7 * 8 * Copyright (C) 2004 by Thomas Rathbone 9 * Copyright (C) 2005 by HP Labs 10 * Copyright (C) 2005 by David Brownell 11 */ 12 13 #undef VERBOSE_DEBUG 14 #undef PACKET_TRACE 15 16 #include <common.h> 17 #include <linux/errno.h> 18 #include <asm/io.h> 19 #include <asm/gpio.h> 20 #include <asm/hardware.h> 21 #include <mach/at91_matrix.h> 22 #include <linux/list.h> 23 #include <linux/usb/ch9.h> 24 #include <linux/usb/gadget.h> 25 #include <linux/usb/at91_udc.h> 26 #include <malloc.h> 27 28 #include "at91_udc.h" 29 30 /* 31 * This controller is simple and PIO-only. It's used in many AT91-series 32 * full speed USB controllers, including the at91rm9200 (arm920T, with MMU), 33 * at91sam926x (arm926ejs, with MMU), and several no-mmu versions. 34 * 35 * This driver expects the board has been wired with two GPIOs supporting 36 * a VBUS sensing IRQ, and a D+ pullup. (They may be omitted, but the 37 * testing hasn't covered such cases.) 38 * 39 * The pullup is most important (so it's integrated on sam926x parts). It 40 * provides software control over whether the host enumerates the device. 41 * 42 * The VBUS sensing helps during enumeration, and allows both USB clocks 43 * (and the transceiver) to stay gated off until they're necessary, saving 44 * power. During USB suspend, the 48 MHz clock is gated off in hardware; 45 * it may also be gated off by software during some Linux sleep states. 46 */ 47 48 #define DRIVER_VERSION "3 May 2006" 49 50 static const char driver_name [] = "at91_udc"; 51 static const char * const ep_names[] = { 52 "ep0", 53 "ep1", 54 "ep2", 55 "ep3-int", 56 "ep4", 57 "ep5", 58 }; 59 #define ep0name ep_names[0] 60 61 #define at91_udp_read(udc, reg) \ 62 __raw_readl((udc)->udp_baseaddr + (reg)) 63 #define at91_udp_write(udc, reg, val) \ 64 __raw_writel((val), (udc)->udp_baseaddr + (reg)) 65 66 static struct at91_udc *controller; 67 68 /*-------------------------------------------------------------------------*/ 69 70 static void done(struct at91_ep *ep, struct at91_request *req, int status) 71 { 72 unsigned stopped = ep->stopped; 73 struct at91_udc *udc = ep->udc; 74 75 list_del_init(&req->queue); 76 if (req->req.status == -EINPROGRESS) 77 req->req.status = status; 78 else 79 status = req->req.status; 80 if (status && status != -ESHUTDOWN) 81 VDBG("%s done %p, status %d\n", ep->ep.name, req, status); 82 83 ep->stopped = 1; 84 spin_unlock(&udc->lock); 85 req->req.complete(&ep->ep, &req->req); 86 spin_lock(&udc->lock); 87 ep->stopped = stopped; 88 89 /* ep0 is always ready; other endpoints need a non-empty queue */ 90 if (list_empty(&ep->queue) && ep->int_mask != (1 << 0)) 91 at91_udp_write(udc, AT91_UDP_IDR, ep->int_mask); 92 } 93 94 /*-------------------------------------------------------------------------*/ 95 96 /* bits indicating OUT fifo has data ready */ 97 #define RX_DATA_READY (AT91_UDP_RX_DATA_BK0 | AT91_UDP_RX_DATA_BK1) 98 99 /* 100 * Endpoint FIFO CSR bits have a mix of bits, making it unsafe to just write 101 * back most of the value you just read (because of side effects, including 102 * bits that may change after reading and before writing). 103 * 104 * Except when changing a specific bit, always write values which: 105 * - clear SET_FX bits (setting them could change something) 106 * - set CLR_FX bits (clearing them could change something) 107 * 108 * There are also state bits like FORCESTALL, EPEDS, DIR, and EPTYPE 109 * that shouldn't normally be changed. 110 * 111 * NOTE at91sam9260 docs mention synch between UDPCK and MCK clock domains, 112 * implying a need to wait for one write to complete (test relevant bits) 113 * before starting the next write. This shouldn't be an issue given how 114 * infrequently we write, except maybe for write-then-read idioms. 115 */ 116 #define SET_FX (AT91_UDP_TXPKTRDY) 117 #define CLR_FX (RX_DATA_READY | AT91_UDP_RXSETUP \ 118 | AT91_UDP_STALLSENT | AT91_UDP_TXCOMP) 119 120 /* pull OUT packet data from the endpoint's fifo */ 121 static int read_fifo (struct at91_ep *ep, struct at91_request *req) 122 { 123 u32 __iomem *creg = ep->creg; 124 u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0)); 125 u32 csr; 126 u8 *buf; 127 unsigned int count, bufferspace, is_done; 128 129 buf = req->req.buf + req->req.actual; 130 bufferspace = req->req.length - req->req.actual; 131 132 /* 133 * there might be nothing to read if ep_queue() calls us, 134 * or if we already emptied both pingpong buffers 135 */ 136 rescan: 137 csr = __raw_readl(creg); 138 if ((csr & RX_DATA_READY) == 0) 139 return 0; 140 141 count = (csr & AT91_UDP_RXBYTECNT) >> 16; 142 if (count > ep->ep.maxpacket) 143 count = ep->ep.maxpacket; 144 if (count > bufferspace) { 145 DBG("%s buffer overflow\n", ep->ep.name); 146 req->req.status = -EOVERFLOW; 147 count = bufferspace; 148 } 149 __raw_readsb((unsigned long)dreg, buf, count); 150 151 /* release and swap pingpong mem bank */ 152 csr |= CLR_FX; 153 if (ep->is_pingpong) { 154 if (ep->fifo_bank == 0) { 155 csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); 156 ep->fifo_bank = 1; 157 } else { 158 csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK1); 159 ep->fifo_bank = 0; 160 } 161 } else 162 csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); 163 __raw_writel(csr, creg); 164 165 req->req.actual += count; 166 is_done = (count < ep->ep.maxpacket); 167 if (count == bufferspace) 168 is_done = 1; 169 170 PACKET("%s %p out/%d%s\n", ep->ep.name, &req->req, count, 171 is_done ? " (done)" : ""); 172 173 /* 174 * avoid extra trips through IRQ logic for packets already in 175 * the fifo ... maybe preventing an extra (expensive) OUT-NAK 176 */ 177 if (is_done) 178 done(ep, req, 0); 179 else if (ep->is_pingpong) { 180 /* 181 * One dummy read to delay the code because of a HW glitch: 182 * CSR returns bad RXCOUNT when read too soon after updating 183 * RX_DATA_BK flags. 184 */ 185 csr = __raw_readl(creg); 186 187 bufferspace -= count; 188 buf += count; 189 goto rescan; 190 } 191 192 return is_done; 193 } 194 195 /* load fifo for an IN packet */ 196 static int write_fifo(struct at91_ep *ep, struct at91_request *req) 197 { 198 u32 __iomem *creg = ep->creg; 199 u32 csr = __raw_readl(creg); 200 u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0)); 201 unsigned total, count, is_last; 202 u8 *buf; 203 204 /* 205 * TODO: allow for writing two packets to the fifo ... that'll 206 * reduce the amount of IN-NAKing, but probably won't affect 207 * throughput much. (Unlike preventing OUT-NAKing!) 208 */ 209 210 /* 211 * If ep_queue() calls us, the queue is empty and possibly in 212 * odd states like TXCOMP not yet cleared (we do it, saving at 213 * least one IRQ) or the fifo not yet being free. Those aren't 214 * issues normally (IRQ handler fast path). 215 */ 216 if (unlikely(csr & (AT91_UDP_TXCOMP | AT91_UDP_TXPKTRDY))) { 217 if (csr & AT91_UDP_TXCOMP) { 218 csr |= CLR_FX; 219 csr &= ~(SET_FX | AT91_UDP_TXCOMP); 220 __raw_writel(csr, creg); 221 csr = __raw_readl(creg); 222 } 223 if (csr & AT91_UDP_TXPKTRDY) 224 return 0; 225 } 226 227 buf = req->req.buf + req->req.actual; 228 prefetch(buf); 229 total = req->req.length - req->req.actual; 230 if (ep->ep.maxpacket < total) { 231 count = ep->ep.maxpacket; 232 is_last = 0; 233 } else { 234 count = total; 235 is_last = (count < ep->ep.maxpacket) || !req->req.zero; 236 } 237 238 /* 239 * Write the packet, maybe it's a ZLP. 240 * 241 * NOTE: incrementing req->actual before we receive the ACK means 242 * gadget driver IN bytecounts can be wrong in fault cases. That's 243 * fixable with PIO drivers like this one (save "count" here, and 244 * do the increment later on TX irq), but not for most DMA hardware. 245 * 246 * So all gadget drivers must accept that potential error. Some 247 * hardware supports precise fifo status reporting, letting them 248 * recover when the actual bytecount matters (e.g. for USB Test 249 * and Measurement Class devices). 250 */ 251 __raw_writesb((unsigned long)dreg, buf, count); 252 csr &= ~SET_FX; 253 csr |= CLR_FX | AT91_UDP_TXPKTRDY; 254 __raw_writel(csr, creg); 255 req->req.actual += count; 256 257 PACKET("%s %p in/%d%s\n", ep->ep.name, &req->req, count, 258 is_last ? " (done)" : ""); 259 if (is_last) 260 done(ep, req, 0); 261 return is_last; 262 } 263 264 static void nuke(struct at91_ep *ep, int status) 265 { 266 struct at91_request *req; 267 268 /* terminate any request in the queue */ 269 ep->stopped = 1; 270 if (list_empty(&ep->queue)) 271 return; 272 273 VDBG("%s %s\n", __func__, ep->ep.name); 274 while (!list_empty(&ep->queue)) { 275 req = list_entry(ep->queue.next, struct at91_request, queue); 276 done(ep, req, status); 277 } 278 } 279 280 /*-------------------------------------------------------------------------*/ 281 282 static int at91_ep_enable(struct usb_ep *_ep, 283 const struct usb_endpoint_descriptor *desc) 284 { 285 struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); 286 struct at91_udc *udc; 287 u16 maxpacket; 288 u32 tmp; 289 unsigned long flags; 290 291 if (!_ep || !ep 292 || !desc || _ep->name == ep0name 293 || desc->bDescriptorType != USB_DT_ENDPOINT 294 || (maxpacket = usb_endpoint_maxp(desc)) == 0 295 || maxpacket > ep->maxpacket) { 296 DBG("bad ep or descriptor\n"); 297 return -EINVAL; 298 } 299 300 udc = ep->udc; 301 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) { 302 DBG("bogus device state\n"); 303 return -ESHUTDOWN; 304 } 305 306 tmp = usb_endpoint_type(desc); 307 switch (tmp) { 308 case USB_ENDPOINT_XFER_CONTROL: 309 DBG("only one control endpoint\n"); 310 return -EINVAL; 311 case USB_ENDPOINT_XFER_INT: 312 if (maxpacket > 64) 313 goto bogus_max; 314 break; 315 case USB_ENDPOINT_XFER_BULK: 316 switch (maxpacket) { 317 case 8: 318 case 16: 319 case 32: 320 case 64: 321 goto ok; 322 } 323 bogus_max: 324 DBG("bogus maxpacket %d\n", maxpacket); 325 return -EINVAL; 326 case USB_ENDPOINT_XFER_ISOC: 327 if (!ep->is_pingpong) { 328 DBG("iso requires double buffering\n"); 329 return -EINVAL; 330 } 331 break; 332 } 333 334 ok: 335 spin_lock_irqsave(&udc->lock, flags); 336 337 /* initialize endpoint to match this descriptor */ 338 ep->is_in = usb_endpoint_dir_in(desc); 339 ep->is_iso = (tmp == USB_ENDPOINT_XFER_ISOC); 340 ep->stopped = 0; 341 if (ep->is_in) 342 tmp |= 0x04; 343 tmp <<= 8; 344 tmp |= AT91_UDP_EPEDS; 345 __raw_writel(tmp, ep->creg); 346 347 ep->ep.maxpacket = maxpacket; 348 349 /* 350 * reset/init endpoint fifo. NOTE: leaves fifo_bank alone, 351 * since endpoint resets don't reset hw pingpong state. 352 */ 353 at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); 354 at91_udp_write(udc, AT91_UDP_RST_EP, 0); 355 356 spin_unlock_irqrestore(&udc->lock, flags); 357 return 0; 358 } 359 360 static int at91_ep_disable (struct usb_ep * _ep) 361 { 362 struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); 363 struct at91_udc *udc = ep->udc; 364 unsigned long flags; 365 366 if (ep == &ep->udc->ep[0]) 367 return -EINVAL; 368 369 spin_lock_irqsave(&udc->lock, flags); 370 371 nuke(ep, -ESHUTDOWN); 372 373 /* restore the endpoint's pristine config */ 374 ep->ep.desc = NULL; 375 ep->ep.maxpacket = ep->maxpacket; 376 377 /* reset fifos and endpoint */ 378 if (ep->udc->clocked) { 379 at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); 380 at91_udp_write(udc, AT91_UDP_RST_EP, 0); 381 __raw_writel(0, ep->creg); 382 } 383 384 spin_unlock_irqrestore(&udc->lock, flags); 385 return 0; 386 } 387 388 /* 389 * this is a PIO-only driver, so there's nothing 390 * interesting for request or buffer allocation. 391 */ 392 393 static struct usb_request * 394 at91_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags) 395 { 396 struct at91_request *req; 397 398 req = kzalloc(sizeof (struct at91_request), gfp_flags); 399 if (!req) 400 return NULL; 401 402 INIT_LIST_HEAD(&req->queue); 403 return &req->req; 404 } 405 406 static void at91_ep_free_request(struct usb_ep *_ep, struct usb_request *_req) 407 { 408 struct at91_request *req; 409 410 req = container_of(_req, struct at91_request, req); 411 BUG_ON(!list_empty(&req->queue)); 412 kfree(req); 413 } 414 415 static int at91_ep_queue(struct usb_ep *_ep, 416 struct usb_request *_req, gfp_t gfp_flags) 417 { 418 struct at91_request *req; 419 struct at91_ep *ep; 420 struct at91_udc *udc; 421 int status; 422 unsigned long flags; 423 424 req = container_of(_req, struct at91_request, req); 425 ep = container_of(_ep, struct at91_ep, ep); 426 427 if (!_req || !_req->complete 428 || !_req->buf || !list_empty(&req->queue)) { 429 DBG("invalid request\n"); 430 return -EINVAL; 431 } 432 433 if (!_ep || (!ep->ep.desc && ep->ep.name != ep0name)) { 434 DBG("invalid ep\n"); 435 return -EINVAL; 436 } 437 438 udc = ep->udc; 439 440 if (!udc || !udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) { 441 DBG("invalid device\n"); 442 return -EINVAL; 443 } 444 445 _req->status = -EINPROGRESS; 446 _req->actual = 0; 447 448 spin_lock_irqsave(&udc->lock, flags); 449 450 /* try to kickstart any empty and idle queue */ 451 if (list_empty(&ep->queue) && !ep->stopped) { 452 int is_ep0; 453 454 /* 455 * If this control request has a non-empty DATA stage, this 456 * will start that stage. It works just like a non-control 457 * request (until the status stage starts, maybe early). 458 * 459 * If the data stage is empty, then this starts a successful 460 * IN/STATUS stage. (Unsuccessful ones use set_halt.) 461 */ 462 is_ep0 = (ep->ep.name == ep0name); 463 if (is_ep0) { 464 u32 tmp; 465 466 if (!udc->req_pending) { 467 status = -EINVAL; 468 goto done; 469 } 470 471 /* 472 * defer changing CONFG until after the gadget driver 473 * reconfigures the endpoints. 474 */ 475 if (udc->wait_for_config_ack) { 476 tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); 477 tmp ^= AT91_UDP_CONFG; 478 VDBG("toggle config\n"); 479 at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); 480 } 481 if (req->req.length == 0) { 482 ep0_in_status: 483 PACKET("ep0 in/status\n"); 484 status = 0; 485 tmp = __raw_readl(ep->creg); 486 tmp &= ~SET_FX; 487 tmp |= CLR_FX | AT91_UDP_TXPKTRDY; 488 __raw_writel(tmp, ep->creg); 489 udc->req_pending = 0; 490 goto done; 491 } 492 } 493 494 if (ep->is_in) 495 status = write_fifo(ep, req); 496 else { 497 status = read_fifo(ep, req); 498 499 /* IN/STATUS stage is otherwise triggered by irq */ 500 if (status && is_ep0) 501 goto ep0_in_status; 502 } 503 } else 504 status = 0; 505 506 if (req && !status) { 507 list_add_tail (&req->queue, &ep->queue); 508 at91_udp_write(udc, AT91_UDP_IER, ep->int_mask); 509 } 510 done: 511 spin_unlock_irqrestore(&udc->lock, flags); 512 return (status < 0) ? status : 0; 513 } 514 515 static int at91_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) 516 { 517 struct at91_ep *ep; 518 struct at91_request *req; 519 unsigned long flags; 520 521 ep = container_of(_ep, struct at91_ep, ep); 522 if (!_ep || ep->ep.name == ep0name) 523 return -EINVAL; 524 525 spin_lock_irqsave(&udc->lock, flags); 526 527 /* make sure it's actually queued on this endpoint */ 528 list_for_each_entry (req, &ep->queue, queue) { 529 if (&req->req == _req) 530 break; 531 } 532 if (&req->req != _req) { 533 spin_unlock_irqrestore(&udc->lock, flags); 534 return -EINVAL; 535 } 536 537 done(ep, req, -ECONNRESET); 538 spin_unlock_irqrestore(&udc->lock, flags); 539 return 0; 540 } 541 542 static int at91_ep_set_halt(struct usb_ep *_ep, int value) 543 { 544 struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); 545 struct at91_udc *udc = ep->udc; 546 u32 __iomem *creg; 547 u32 csr; 548 unsigned long flags; 549 int status = 0; 550 551 if (!_ep || ep->is_iso || !ep->udc->clocked) 552 return -EINVAL; 553 554 creg = ep->creg; 555 spin_lock_irqsave(&udc->lock, flags); 556 557 csr = __raw_readl(creg); 558 559 /* 560 * fail with still-busy IN endpoints, ensuring correct sequencing 561 * of data tx then stall. note that the fifo rx bytecount isn't 562 * completely accurate as a tx bytecount. 563 */ 564 if (ep->is_in && (!list_empty(&ep->queue) || (csr >> 16) != 0)) 565 status = -EAGAIN; 566 else { 567 csr |= CLR_FX; 568 csr &= ~SET_FX; 569 if (value) { 570 csr |= AT91_UDP_FORCESTALL; 571 VDBG("halt %s\n", ep->ep.name); 572 } else { 573 at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); 574 at91_udp_write(udc, AT91_UDP_RST_EP, 0); 575 csr &= ~AT91_UDP_FORCESTALL; 576 } 577 __raw_writel(csr, creg); 578 } 579 580 spin_unlock_irqrestore(&udc->lock, flags); 581 return status; 582 } 583 584 static const struct usb_ep_ops at91_ep_ops = { 585 .enable = at91_ep_enable, 586 .disable = at91_ep_disable, 587 .alloc_request = at91_ep_alloc_request, 588 .free_request = at91_ep_free_request, 589 .queue = at91_ep_queue, 590 .dequeue = at91_ep_dequeue, 591 .set_halt = at91_ep_set_halt, 592 /* there's only imprecise fifo status reporting */ 593 }; 594 595 /*-------------------------------------------------------------------------*/ 596 597 static int at91_get_frame(struct usb_gadget *gadget) 598 { 599 struct at91_udc *udc = to_udc(gadget); 600 601 if (!to_udc(gadget)->clocked) 602 return -EINVAL; 603 return at91_udp_read(udc, AT91_UDP_FRM_NUM) & AT91_UDP_NUM; 604 } 605 606 static int at91_wakeup(struct usb_gadget *gadget) 607 { 608 struct at91_udc *udc = to_udc(gadget); 609 u32 glbstate; 610 int status = -EINVAL; 611 unsigned long flags; 612 613 DBG("%s\n", __func__ ); 614 spin_lock_irqsave(&udc->lock, flags); 615 616 if (!udc->clocked || !udc->suspended) 617 goto done; 618 619 /* NOTE: some "early versions" handle ESR differently ... */ 620 621 glbstate = at91_udp_read(udc, AT91_UDP_GLB_STAT); 622 if (!(glbstate & AT91_UDP_ESR)) 623 goto done; 624 glbstate |= AT91_UDP_ESR; 625 at91_udp_write(udc, AT91_UDP_GLB_STAT, glbstate); 626 627 done: 628 spin_unlock_irqrestore(&udc->lock, flags); 629 return status; 630 } 631 632 /* reinit == restore initial software state */ 633 static void udc_reinit(struct at91_udc *udc) 634 { 635 u32 i; 636 637 INIT_LIST_HEAD(&udc->gadget.ep_list); 638 INIT_LIST_HEAD(&udc->gadget.ep0->ep_list); 639 640 for (i = 0; i < NUM_ENDPOINTS; i++) { 641 struct at91_ep *ep = &udc->ep[i]; 642 643 if (i != 0) 644 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list); 645 ep->ep.desc = NULL; 646 ep->stopped = 0; 647 ep->fifo_bank = 0; 648 usb_ep_set_maxpacket_limit(&ep->ep, ep->maxpacket); 649 ep->creg = (void __iomem *) udc->udp_baseaddr + AT91_UDP_CSR(i); 650 /* initialize one queue per endpoint */ 651 INIT_LIST_HEAD(&ep->queue); 652 } 653 } 654 655 static void reset_gadget(struct at91_udc *udc) 656 { 657 struct usb_gadget_driver *driver = udc->driver; 658 int i; 659 660 if (udc->gadget.speed == USB_SPEED_UNKNOWN) 661 driver = NULL; 662 udc->gadget.speed = USB_SPEED_UNKNOWN; 663 udc->suspended = 0; 664 665 for (i = 0; i < NUM_ENDPOINTS; i++) { 666 struct at91_ep *ep = &udc->ep[i]; 667 668 ep->stopped = 1; 669 nuke(ep, -ESHUTDOWN); 670 } 671 if (driver) { 672 spin_unlock(&udc->lock); 673 udc->driver->disconnect(&udc->gadget); 674 spin_lock(&udc->lock); 675 } 676 677 udc_reinit(udc); 678 } 679 680 static void stop_activity(struct at91_udc *udc) 681 { 682 struct usb_gadget_driver *driver = udc->driver; 683 int i; 684 685 if (udc->gadget.speed == USB_SPEED_UNKNOWN) 686 driver = NULL; 687 udc->gadget.speed = USB_SPEED_UNKNOWN; 688 udc->suspended = 0; 689 690 for (i = 0; i < NUM_ENDPOINTS; i++) { 691 struct at91_ep *ep = &udc->ep[i]; 692 ep->stopped = 1; 693 nuke(ep, -ESHUTDOWN); 694 } 695 if (driver) { 696 spin_unlock(&udc->lock); 697 driver->disconnect(&udc->gadget); 698 spin_lock(&udc->lock); 699 } 700 701 udc_reinit(udc); 702 } 703 704 static void clk_on(struct at91_udc *udc) 705 { 706 if (udc->clocked) 707 return; 708 udc->clocked = 1; 709 } 710 711 static void clk_off(struct at91_udc *udc) 712 { 713 if (!udc->clocked) 714 return; 715 udc->clocked = 0; 716 udc->gadget.speed = USB_SPEED_UNKNOWN; 717 } 718 719 /* 720 * activate/deactivate link with host; minimize power usage for 721 * inactive links by cutting clocks and transceiver power. 722 */ 723 static void pullup(struct at91_udc *udc, int is_on) 724 { 725 if (!udc->enabled || !udc->vbus) 726 is_on = 0; 727 DBG("%sactive\n", is_on ? "" : "in"); 728 729 if (is_on) { 730 clk_on(udc); 731 at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXRSM); 732 at91_udp_write(udc, AT91_UDP_TXVC, 0); 733 } else { 734 stop_activity(udc); 735 at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXRSM); 736 at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS); 737 clk_off(udc); 738 } 739 740 if (udc->caps && udc->caps->pullup) 741 udc->caps->pullup(udc, is_on); 742 } 743 744 /* vbus is here! turn everything on that's ready */ 745 static int at91_vbus_session(struct usb_gadget *gadget, int is_active) 746 { 747 struct at91_udc *udc = to_udc(gadget); 748 unsigned long flags; 749 750 /* VDBG("vbus %s\n", is_active ? "on" : "off"); */ 751 spin_lock_irqsave(&udc->lock, flags); 752 udc->vbus = (is_active != 0); 753 if (udc->driver) 754 pullup(udc, is_active); 755 else 756 pullup(udc, 0); 757 spin_unlock_irqrestore(&udc->lock, flags); 758 return 0; 759 } 760 761 static int at91_pullup(struct usb_gadget *gadget, int is_on) 762 { 763 struct at91_udc *udc = to_udc(gadget); 764 unsigned long flags; 765 766 spin_lock_irqsave(&udc->lock, flags); 767 udc->enabled = is_on = !!is_on; 768 pullup(udc, is_on); 769 spin_unlock_irqrestore(&udc->lock, flags); 770 return 0; 771 } 772 773 static int at91_set_selfpowered(struct usb_gadget *gadget, int is_on) 774 { 775 struct at91_udc *udc = to_udc(gadget); 776 unsigned long flags; 777 778 spin_lock_irqsave(&udc->lock, flags); 779 udc->selfpowered = (is_on != 0); 780 spin_unlock_irqrestore(&udc->lock, flags); 781 return 0; 782 } 783 784 static int at91_start(struct usb_gadget *gadget, 785 struct usb_gadget_driver *driver); 786 static int at91_stop(struct usb_gadget *gadget); 787 788 static const struct usb_gadget_ops at91_udc_ops = { 789 .get_frame = at91_get_frame, 790 .wakeup = at91_wakeup, 791 .set_selfpowered = at91_set_selfpowered, 792 .vbus_session = at91_vbus_session, 793 .pullup = at91_pullup, 794 .udc_start = at91_start, 795 .udc_stop = at91_stop, 796 797 /* 798 * VBUS-powered devices may also also want to support bigger 799 * power budgets after an appropriate SET_CONFIGURATION. 800 */ 801 /* .vbus_power = at91_vbus_power, */ 802 }; 803 804 /*-------------------------------------------------------------------------*/ 805 806 static int handle_ep(struct at91_ep *ep) 807 { 808 struct at91_request *req; 809 u32 __iomem *creg = ep->creg; 810 u32 csr = __raw_readl(creg); 811 812 if (!list_empty(&ep->queue)) 813 req = list_entry(ep->queue.next, 814 struct at91_request, queue); 815 else 816 req = NULL; 817 818 if (ep->is_in) { 819 if (csr & (AT91_UDP_STALLSENT | AT91_UDP_TXCOMP)) { 820 csr |= CLR_FX; 821 csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_TXCOMP); 822 __raw_writel(csr, creg); 823 } 824 if (req) 825 return write_fifo(ep, req); 826 827 } else { 828 if (csr & AT91_UDP_STALLSENT) { 829 /* STALLSENT bit == ISOERR */ 830 if (ep->is_iso && req) 831 req->req.status = -EILSEQ; 832 csr |= CLR_FX; 833 csr &= ~(SET_FX | AT91_UDP_STALLSENT); 834 __raw_writel(csr, creg); 835 csr = __raw_readl(creg); 836 } 837 if (req && (csr & RX_DATA_READY)) 838 return read_fifo(ep, req); 839 } 840 return 0; 841 } 842 843 union setup { 844 u8 raw[8]; 845 struct usb_ctrlrequest r; 846 }; 847 848 static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr) 849 { 850 u32 __iomem *creg = ep->creg; 851 u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0)); 852 unsigned rxcount, i = 0; 853 u32 tmp; 854 union setup pkt; 855 int status = 0; 856 857 /* read and ack SETUP; hard-fail for bogus packets */ 858 rxcount = (csr & AT91_UDP_RXBYTECNT) >> 16; 859 if (likely(rxcount == 8)) { 860 while (rxcount--) 861 pkt.raw[i++] = __raw_readb(dreg); 862 if (pkt.r.bRequestType & USB_DIR_IN) { 863 csr |= AT91_UDP_DIR; 864 ep->is_in = 1; 865 } else { 866 csr &= ~AT91_UDP_DIR; 867 ep->is_in = 0; 868 } 869 } else { 870 /* REVISIT this happens sometimes under load; why?? */ 871 ERR("SETUP len %d, csr %08x\n", rxcount, csr); 872 status = -EINVAL; 873 } 874 csr |= CLR_FX; 875 csr &= ~(SET_FX | AT91_UDP_RXSETUP); 876 __raw_writel(csr, creg); 877 udc->wait_for_addr_ack = 0; 878 udc->wait_for_config_ack = 0; 879 ep->stopped = 0; 880 if (unlikely(status != 0)) 881 goto stall; 882 883 #define w_index le16_to_cpu(pkt.r.wIndex) 884 #define w_value le16_to_cpu(pkt.r.wValue) 885 #define w_length le16_to_cpu(pkt.r.wLength) 886 887 VDBG("SETUP %02x.%02x v%04x i%04x l%04x\n", 888 pkt.r.bRequestType, pkt.r.bRequest, 889 w_value, w_index, w_length); 890 891 /* 892 * A few standard requests get handled here, ones that touch 893 * hardware ... notably for device and endpoint features. 894 */ 895 udc->req_pending = 1; 896 csr = __raw_readl(creg); 897 csr |= CLR_FX; 898 csr &= ~SET_FX; 899 switch ((pkt.r.bRequestType << 8) | pkt.r.bRequest) { 900 901 case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) 902 | USB_REQ_SET_ADDRESS: 903 __raw_writel(csr | AT91_UDP_TXPKTRDY, creg); 904 udc->addr = w_value; 905 udc->wait_for_addr_ack = 1; 906 udc->req_pending = 0; 907 /* FADDR is set later, when we ack host STATUS */ 908 return; 909 910 case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) 911 | USB_REQ_SET_CONFIGURATION: 912 tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT) & AT91_UDP_CONFG; 913 if (pkt.r.wValue) 914 udc->wait_for_config_ack = (tmp == 0); 915 else 916 udc->wait_for_config_ack = (tmp != 0); 917 if (udc->wait_for_config_ack) 918 VDBG("wait for config\n"); 919 /* CONFG is toggled later, if gadget driver succeeds */ 920 break; 921 922 /* 923 * Hosts may set or clear remote wakeup status, and 924 * devices may report they're VBUS powered. 925 */ 926 case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) 927 | USB_REQ_GET_STATUS: 928 tmp = (udc->selfpowered << USB_DEVICE_SELF_POWERED); 929 if (at91_udp_read(udc, AT91_UDP_GLB_STAT) & AT91_UDP_ESR) 930 tmp |= (1 << USB_DEVICE_REMOTE_WAKEUP); 931 PACKET("get device status\n"); 932 __raw_writeb(tmp, dreg); 933 __raw_writeb(0, dreg); 934 goto write_in; 935 /* then STATUS starts later, automatically */ 936 case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) 937 | USB_REQ_SET_FEATURE: 938 if (w_value != USB_DEVICE_REMOTE_WAKEUP) 939 goto stall; 940 tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); 941 tmp |= AT91_UDP_ESR; 942 at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); 943 goto succeed; 944 case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) 945 | USB_REQ_CLEAR_FEATURE: 946 if (w_value != USB_DEVICE_REMOTE_WAKEUP) 947 goto stall; 948 tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); 949 tmp &= ~AT91_UDP_ESR; 950 at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); 951 goto succeed; 952 953 /* 954 * Interfaces have no feature settings; this is pretty useless. 955 * we won't even insist the interface exists... 956 */ 957 case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8) 958 | USB_REQ_GET_STATUS: 959 PACKET("get interface status\n"); 960 __raw_writeb(0, dreg); 961 __raw_writeb(0, dreg); 962 goto write_in; 963 /* then STATUS starts later, automatically */ 964 case ((USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8) 965 | USB_REQ_SET_FEATURE: 966 case ((USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8) 967 | USB_REQ_CLEAR_FEATURE: 968 goto stall; 969 970 /* 971 * Hosts may clear bulk/intr endpoint halt after the gadget 972 * driver sets it (not widely used); or set it (for testing) 973 */ 974 case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8) 975 | USB_REQ_GET_STATUS: 976 tmp = w_index & USB_ENDPOINT_NUMBER_MASK; 977 ep = &udc->ep[tmp]; 978 if (tmp >= NUM_ENDPOINTS || (tmp && !ep->ep.desc)) 979 goto stall; 980 981 if (tmp) { 982 if ((w_index & USB_DIR_IN)) { 983 if (!ep->is_in) 984 goto stall; 985 } else if (ep->is_in) 986 goto stall; 987 } 988 PACKET("get %s status\n", ep->ep.name); 989 if (__raw_readl(ep->creg) & AT91_UDP_FORCESTALL) 990 tmp = (1 << USB_ENDPOINT_HALT); 991 else 992 tmp = 0; 993 __raw_writeb(tmp, dreg); 994 __raw_writeb(0, dreg); 995 goto write_in; 996 /* then STATUS starts later, automatically */ 997 case ((USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8) 998 | USB_REQ_SET_FEATURE: 999 tmp = w_index & USB_ENDPOINT_NUMBER_MASK; 1000 ep = &udc->ep[tmp]; 1001 if (w_value != USB_ENDPOINT_HALT || tmp >= NUM_ENDPOINTS) 1002 goto stall; 1003 if (!ep->ep.desc || ep->is_iso) 1004 goto stall; 1005 if ((w_index & USB_DIR_IN)) { 1006 if (!ep->is_in) 1007 goto stall; 1008 } else if (ep->is_in) 1009 goto stall; 1010 1011 tmp = __raw_readl(ep->creg); 1012 tmp &= ~SET_FX; 1013 tmp |= CLR_FX | AT91_UDP_FORCESTALL; 1014 __raw_writel(tmp, ep->creg); 1015 goto succeed; 1016 case ((USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8) 1017 | USB_REQ_CLEAR_FEATURE: 1018 tmp = w_index & USB_ENDPOINT_NUMBER_MASK; 1019 ep = &udc->ep[tmp]; 1020 if (w_value != USB_ENDPOINT_HALT || tmp >= NUM_ENDPOINTS) 1021 goto stall; 1022 if (tmp == 0) 1023 goto succeed; 1024 if (!ep->ep.desc || ep->is_iso) 1025 goto stall; 1026 if ((w_index & USB_DIR_IN)) { 1027 if (!ep->is_in) 1028 goto stall; 1029 } else if (ep->is_in) 1030 goto stall; 1031 1032 at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); 1033 at91_udp_write(udc, AT91_UDP_RST_EP, 0); 1034 tmp = __raw_readl(ep->creg); 1035 tmp |= CLR_FX; 1036 tmp &= ~(SET_FX | AT91_UDP_FORCESTALL); 1037 __raw_writel(tmp, ep->creg); 1038 if (!list_empty(&ep->queue)) 1039 handle_ep(ep); 1040 goto succeed; 1041 } 1042 1043 #undef w_value 1044 #undef w_index 1045 #undef w_length 1046 1047 /* pass request up to the gadget driver */ 1048 if (udc->driver) { 1049 spin_unlock(&udc->lock); 1050 status = udc->driver->setup(&udc->gadget, &pkt.r); 1051 spin_lock(&udc->lock); 1052 } 1053 else 1054 status = -ENODEV; 1055 if (status < 0) { 1056 stall: 1057 VDBG("req %02x.%02x protocol STALL; stat %d\n", 1058 pkt.r.bRequestType, pkt.r.bRequest, status); 1059 csr |= AT91_UDP_FORCESTALL; 1060 __raw_writel(csr, creg); 1061 udc->req_pending = 0; 1062 } 1063 return; 1064 1065 succeed: 1066 /* immediate successful (IN) STATUS after zero length DATA */ 1067 PACKET("ep0 in/status\n"); 1068 write_in: 1069 csr |= AT91_UDP_TXPKTRDY; 1070 __raw_writel(csr, creg); 1071 udc->req_pending = 0; 1072 } 1073 1074 static void handle_ep0(struct at91_udc *udc) 1075 { 1076 struct at91_ep *ep0 = &udc->ep[0]; 1077 u32 __iomem *creg = ep0->creg; 1078 u32 csr = __raw_readl(creg); 1079 struct at91_request *req; 1080 1081 if (unlikely(csr & AT91_UDP_STALLSENT)) { 1082 nuke(ep0, -EPROTO); 1083 udc->req_pending = 0; 1084 csr |= CLR_FX; 1085 csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_FORCESTALL); 1086 __raw_writel(csr, creg); 1087 VDBG("ep0 stalled\n"); 1088 csr = __raw_readl(creg); 1089 } 1090 if (csr & AT91_UDP_RXSETUP) { 1091 nuke(ep0, 0); 1092 udc->req_pending = 0; 1093 handle_setup(udc, ep0, csr); 1094 return; 1095 } 1096 1097 if (list_empty(&ep0->queue)) 1098 req = NULL; 1099 else 1100 req = list_entry(ep0->queue.next, struct at91_request, queue); 1101 1102 /* host ACKed an IN packet that we sent */ 1103 if (csr & AT91_UDP_TXCOMP) { 1104 csr |= CLR_FX; 1105 csr &= ~(SET_FX | AT91_UDP_TXCOMP); 1106 1107 /* write more IN DATA? */ 1108 if (req && ep0->is_in) { 1109 if (handle_ep(ep0)) 1110 udc->req_pending = 0; 1111 1112 /* 1113 * Ack after: 1114 * - last IN DATA packet (including GET_STATUS) 1115 * - IN/STATUS for OUT DATA 1116 * - IN/STATUS for any zero-length DATA stage 1117 * except for the IN DATA case, the host should send 1118 * an OUT status later, which we'll ack. 1119 */ 1120 } else { 1121 udc->req_pending = 0; 1122 __raw_writel(csr, creg); 1123 1124 /* 1125 * SET_ADDRESS takes effect only after the STATUS 1126 * (to the original address) gets acked. 1127 */ 1128 if (udc->wait_for_addr_ack) { 1129 u32 tmp; 1130 1131 at91_udp_write(udc, AT91_UDP_FADDR, 1132 AT91_UDP_FEN | udc->addr); 1133 tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); 1134 tmp &= ~AT91_UDP_FADDEN; 1135 if (udc->addr) 1136 tmp |= AT91_UDP_FADDEN; 1137 at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); 1138 1139 udc->wait_for_addr_ack = 0; 1140 VDBG("address %d\n", udc->addr); 1141 } 1142 } 1143 } 1144 1145 /* OUT packet arrived ... */ 1146 else if (csr & AT91_UDP_RX_DATA_BK0) { 1147 csr |= CLR_FX; 1148 csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); 1149 1150 /* OUT DATA stage */ 1151 if (!ep0->is_in) { 1152 if (req) { 1153 if (handle_ep(ep0)) { 1154 /* send IN/STATUS */ 1155 PACKET("ep0 in/status\n"); 1156 csr = __raw_readl(creg); 1157 csr &= ~SET_FX; 1158 csr |= CLR_FX | AT91_UDP_TXPKTRDY; 1159 __raw_writel(csr, creg); 1160 udc->req_pending = 0; 1161 } 1162 } else if (udc->req_pending) { 1163 /* 1164 * AT91 hardware has a hard time with this 1165 * "deferred response" mode for control-OUT 1166 * transfers. (For control-IN it's fine.) 1167 * 1168 * The normal solution leaves OUT data in the 1169 * fifo until the gadget driver is ready. 1170 * We couldn't do that here without disabling 1171 * the IRQ that tells about SETUP packets, 1172 * e.g. when the host gets impatient... 1173 * 1174 * Working around it by copying into a buffer 1175 * would almost be a non-deferred response, 1176 * except that it wouldn't permit reliable 1177 * stalling of the request. Instead, demand 1178 * that gadget drivers not use this mode. 1179 */ 1180 DBG("no control-OUT deferred responses!\n"); 1181 __raw_writel(csr | AT91_UDP_FORCESTALL, creg); 1182 udc->req_pending = 0; 1183 } 1184 1185 /* STATUS stage for control-IN; ack. */ 1186 } else { 1187 PACKET("ep0 out/status ACK\n"); 1188 __raw_writel(csr, creg); 1189 1190 /* "early" status stage */ 1191 if (req) 1192 done(ep0, req, 0); 1193 } 1194 } 1195 } 1196 1197 static irqreturn_t at91_udc_irq(struct at91_udc *udc) 1198 { 1199 u32 rescans = 5; 1200 int disable_clock = 0; 1201 unsigned long flags; 1202 1203 spin_lock_irqsave(&udc->lock, flags); 1204 1205 if (!udc->clocked) { 1206 clk_on(udc); 1207 disable_clock = 1; 1208 } 1209 1210 while (rescans--) { 1211 u32 status; 1212 1213 status = at91_udp_read(udc, AT91_UDP_ISR) 1214 & at91_udp_read(udc, AT91_UDP_IMR); 1215 if (!status) 1216 break; 1217 1218 /* USB reset irq: not maskable */ 1219 if (status & AT91_UDP_ENDBUSRES) { 1220 at91_udp_write(udc, AT91_UDP_IDR, ~MINIMUS_INTERRUPTUS); 1221 at91_udp_write(udc, AT91_UDP_IER, MINIMUS_INTERRUPTUS); 1222 /* Atmel code clears this irq twice */ 1223 at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_ENDBUSRES); 1224 at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_ENDBUSRES); 1225 VDBG("end bus reset\n"); 1226 udc->addr = 0; 1227 reset_gadget(udc); 1228 1229 /* enable ep0 */ 1230 at91_udp_write(udc, AT91_UDP_CSR(0), 1231 AT91_UDP_EPEDS | AT91_UDP_EPTYPE_CTRL); 1232 udc->gadget.speed = USB_SPEED_FULL; 1233 udc->suspended = 0; 1234 at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_EP(0)); 1235 1236 /* 1237 * NOTE: this driver keeps clocks off unless the 1238 * USB host is present. That saves power, but for 1239 * boards that don't support VBUS detection, both 1240 * clocks need to be active most of the time. 1241 */ 1242 1243 /* host initiated suspend (3+ms bus idle) */ 1244 } else if (status & AT91_UDP_RXSUSP) { 1245 at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXSUSP); 1246 at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_RXRSM); 1247 at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXSUSP); 1248 /* VDBG("bus suspend\n"); */ 1249 if (udc->suspended) 1250 continue; 1251 udc->suspended = 1; 1252 1253 /* 1254 * NOTE: when suspending a VBUS-powered device, the 1255 * gadget driver should switch into slow clock mode 1256 * and then into standby to avoid drawing more than 1257 * 500uA power (2500uA for some high-power configs). 1258 */ 1259 if (udc->driver && udc->driver->suspend) { 1260 spin_unlock(&udc->lock); 1261 udc->driver->suspend(&udc->gadget); 1262 spin_lock(&udc->lock); 1263 } 1264 1265 /* host initiated resume */ 1266 } else if (status & AT91_UDP_RXRSM) { 1267 at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXRSM); 1268 at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_RXSUSP); 1269 at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXRSM); 1270 /* VDBG("bus resume\n"); */ 1271 if (!udc->suspended) 1272 continue; 1273 udc->suspended = 0; 1274 1275 /* 1276 * NOTE: for a VBUS-powered device, the gadget driver 1277 * would normally want to switch out of slow clock 1278 * mode into normal mode. 1279 */ 1280 if (udc->driver && udc->driver->resume) { 1281 spin_unlock(&udc->lock); 1282 udc->driver->resume(&udc->gadget); 1283 spin_lock(&udc->lock); 1284 } 1285 1286 /* endpoint IRQs are cleared by handling them */ 1287 } else { 1288 int i; 1289 unsigned mask = 1; 1290 struct at91_ep *ep = &udc->ep[1]; 1291 1292 if (status & mask) 1293 handle_ep0(udc); 1294 for (i = 1; i < NUM_ENDPOINTS; i++) { 1295 mask <<= 1; 1296 if (status & mask) 1297 handle_ep(ep); 1298 ep++; 1299 } 1300 } 1301 } 1302 1303 if (disable_clock) 1304 clk_off(udc); 1305 1306 spin_unlock_irqrestore(&udc->lock, flags); 1307 1308 return IRQ_HANDLED; 1309 } 1310 1311 /*-------------------------------------------------------------------------*/ 1312 1313 static int at91_start(struct usb_gadget *gadget, 1314 struct usb_gadget_driver *driver) 1315 { 1316 struct at91_udc *udc = controller; 1317 1318 udc->driver = driver; 1319 udc->enabled = 1; 1320 udc->selfpowered = 1; 1321 1322 return 0; 1323 } 1324 1325 static int at91_stop(struct usb_gadget *gadget) 1326 { 1327 struct at91_udc *udc = controller; 1328 unsigned long flags; 1329 1330 spin_lock_irqsave(&udc->lock, flags); 1331 udc->enabled = 0; 1332 at91_udp_write(udc, AT91_UDP_IDR, ~0); 1333 spin_unlock_irqrestore(&udc->lock, flags); 1334 1335 udc->driver = NULL; 1336 1337 return 0; 1338 } 1339 1340 /*-------------------------------------------------------------------------*/ 1341 1342 #if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20) 1343 static int at91sam9260_udc_init(struct at91_udc *udc) 1344 { 1345 struct at91_ep *ep; 1346 int i; 1347 1348 for (i = 0; i < NUM_ENDPOINTS; i++) { 1349 ep = &udc->ep[i]; 1350 1351 switch (i) { 1352 case 0 ... 3: 1353 ep->maxpacket = 64; 1354 break; 1355 case 4 ... 5: 1356 ep->maxpacket = 512; 1357 break; 1358 } 1359 } 1360 1361 return 0; 1362 } 1363 1364 static void at91sam9260_udc_pullup(struct at91_udc *udc, int is_on) 1365 { 1366 u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC); 1367 1368 if (is_on) 1369 txvc |= AT91_UDP_TXVC_PUON; 1370 else 1371 txvc &= ~AT91_UDP_TXVC_PUON; 1372 1373 at91_udp_write(udc, AT91_UDP_TXVC, txvc); 1374 } 1375 1376 static const struct at91_udc_caps at91sam9260_udc_caps = { 1377 .init = at91sam9260_udc_init, 1378 .pullup = at91sam9260_udc_pullup, 1379 }; 1380 #endif 1381 1382 #if defined(CONFIG_AT91SAM9261) 1383 static int at91sam9261_udc_init(struct at91_udc *udc) 1384 { 1385 struct at91_ep *ep; 1386 int i; 1387 1388 for (i = 0; i < NUM_ENDPOINTS; i++) { 1389 ep = &udc->ep[i]; 1390 1391 switch (i) { 1392 case 0: 1393 ep->maxpacket = 8; 1394 break; 1395 case 1 ... 3: 1396 ep->maxpacket = 64; 1397 break; 1398 case 4 ... 5: 1399 ep->maxpacket = 256; 1400 break; 1401 } 1402 } 1403 1404 udc->matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; 1405 1406 if (IS_ERR(udc->matrix)) 1407 return PTR_ERR(udc->matrix); 1408 1409 return 0; 1410 } 1411 1412 static void at91sam9261_udc_pullup(struct at91_udc *udc, int is_on) 1413 { 1414 u32 usbpucr = 0; 1415 1416 usbpucr = readl(&udc->matrix->pucr); 1417 if (is_on) 1418 usbpucr |= AT91_MATRIX_USBPUCR_PUON; 1419 1420 writel(usbpucr, &udc->matrix->pucr); 1421 } 1422 1423 static const struct at91_udc_caps at91sam9261_udc_caps = { 1424 .init = at91sam9261_udc_init, 1425 .pullup = at91sam9261_udc_pullup, 1426 }; 1427 #endif 1428 1429 int usb_gadget_handle_interrupts(int index) 1430 { 1431 struct at91_udc *udc = controller; 1432 1433 return at91_udc_irq(udc); 1434 } 1435 1436 int usb_gadget_register_driver(struct usb_gadget_driver *driver) 1437 { 1438 struct at91_udc *udc = controller; 1439 int ret; 1440 1441 if (!driver || !driver->bind || !driver->setup) { 1442 printf("bad paramter\n"); 1443 return -EINVAL; 1444 } 1445 1446 if (udc->driver) { 1447 printf("UDC already has a gadget driver\n"); 1448 return -EBUSY; 1449 } 1450 1451 at91_start(&udc->gadget, driver); 1452 1453 udc->driver = driver; 1454 1455 ret = driver->bind(&udc->gadget); 1456 if (ret) { 1457 pr_err("driver->bind() returned %d\n", ret); 1458 udc->driver = NULL; 1459 } 1460 1461 return ret; 1462 } 1463 1464 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) 1465 { 1466 struct at91_udc *udc = controller; 1467 1468 if (!driver || !driver->unbind || !driver->disconnect) { 1469 pr_err("bad paramter\n"); 1470 return -EINVAL; 1471 } 1472 1473 driver->disconnect(&udc->gadget); 1474 driver->unbind(&udc->gadget); 1475 udc->driver = NULL; 1476 1477 at91_stop(&udc->gadget); 1478 1479 return 0; 1480 } 1481 1482 int at91_udc_probe(struct at91_udc_data *pdata) 1483 { 1484 struct at91_udc *udc; 1485 int retval; 1486 struct at91_ep *ep; 1487 int i; 1488 1489 udc = kzalloc(sizeof(*udc), GFP_KERNEL); 1490 if (!udc) 1491 return -ENOMEM; 1492 1493 controller = udc; 1494 memcpy(&udc->board, pdata, sizeof(struct at91_udc_data)); 1495 if (udc->board.vbus_pin) { 1496 printf("%s: gpio vbus pin not supported yet.\n", __func__); 1497 return -ENXIO; 1498 } else { 1499 DBG("no VBUS detection, assuming always-on\n"); 1500 udc->vbus = 1; 1501 } 1502 1503 #if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20) 1504 udc->caps = &at91sam9260_udc_caps; 1505 #endif 1506 1507 udc->enabled = 0; 1508 spin_lock_init(&udc->lock); 1509 1510 udc->gadget.ops = &at91_udc_ops; 1511 udc->gadget.ep0 = &udc->ep[0].ep; 1512 udc->gadget.name = driver_name; 1513 1514 for (i = 0; i < NUM_ENDPOINTS; i++) { 1515 ep = &udc->ep[i]; 1516 ep->ep.name = ep_names[i]; 1517 ep->ep.ops = &at91_ep_ops; 1518 ep->udc = udc; 1519 ep->int_mask = (1 << i); 1520 if (i != 0 && i != 3) 1521 ep->is_pingpong = 1; 1522 } 1523 1524 udc->udp_baseaddr = (void *)udc->board.baseaddr; 1525 if (IS_ERR(udc->udp_baseaddr)) 1526 return PTR_ERR(udc->udp_baseaddr); 1527 1528 if (udc->caps && udc->caps->init) { 1529 retval = udc->caps->init(udc); 1530 if (retval) 1531 return retval; 1532 } 1533 1534 udc_reinit(udc); 1535 1536 at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS); 1537 at91_udp_write(udc, AT91_UDP_IDR, 0xffffffff); 1538 /* Clear all pending interrupts - UDP may be used by bootloader. */ 1539 at91_udp_write(udc, AT91_UDP_ICR, 0xffffffff); 1540 1541 INFO("%s version %s\n", driver_name, DRIVER_VERSION); 1542 return 0; 1543 } 1544