xref: /openbmc/u-boot/drivers/usb/eth/smsc95xx.c (revision 7aba0f2c2ce80406661ea2dc79ea1892cc93a26f)
1 /*
2  * Copyright (c) 2015 Google, Inc
3  * Copyright (c) 2011 The Chromium OS Authors.
4  * Copyright (C) 2009 NVIDIA, Corporation
5  * Copyright (C) 2007-2008 SMSC (Steve Glendinning)
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #include <common.h>
11 #include <dm.h>
12 #include <errno.h>
13 #include <malloc.h>
14 #include <memalign.h>
15 #include <usb.h>
16 #include <asm/unaligned.h>
17 #include <linux/mii.h>
18 #include "usb_ether.h"
19 
20 /* SMSC LAN95xx based USB 2.0 Ethernet Devices */
21 
22 /* LED defines */
23 #define LED_GPIO_CFG			(0x24)
24 #define LED_GPIO_CFG_SPD_LED		(0x01000000)
25 #define LED_GPIO_CFG_LNK_LED		(0x00100000)
26 #define LED_GPIO_CFG_FDX_LED		(0x00010000)
27 
28 /* Tx command words */
29 #define TX_CMD_A_FIRST_SEG_		0x00002000
30 #define TX_CMD_A_LAST_SEG_		0x00001000
31 
32 /* Rx status word */
33 #define RX_STS_FL_			0x3FFF0000	/* Frame Length */
34 #define RX_STS_ES_			0x00008000	/* Error Summary */
35 
36 /* SCSRs */
37 #define ID_REV				0x00
38 
39 #define INT_STS				0x08
40 
41 #define TX_CFG				0x10
42 #define TX_CFG_ON_			0x00000004
43 
44 #define HW_CFG				0x14
45 #define HW_CFG_BIR_			0x00001000
46 #define HW_CFG_RXDOFF_			0x00000600
47 #define HW_CFG_MEF_			0x00000020
48 #define HW_CFG_BCE_			0x00000002
49 #define HW_CFG_LRST_			0x00000008
50 
51 #define PM_CTRL				0x20
52 #define PM_CTL_PHY_RST_			0x00000010
53 
54 #define AFC_CFG				0x2C
55 
56 /*
57  * Hi watermark = 15.5Kb (~10 mtu pkts)
58  * low watermark = 3k (~2 mtu pkts)
59  * backpressure duration = ~ 350us
60  * Apply FC on any frame.
61  */
62 #define AFC_CFG_DEFAULT			0x00F830A1
63 
64 #define E2P_CMD				0x30
65 #define E2P_CMD_BUSY_			0x80000000
66 #define E2P_CMD_READ_			0x00000000
67 #define E2P_CMD_TIMEOUT_		0x00000400
68 #define E2P_CMD_LOADED_			0x00000200
69 #define E2P_CMD_ADDR_			0x000001FF
70 
71 #define E2P_DATA			0x34
72 
73 #define BURST_CAP			0x38
74 
75 #define INT_EP_CTL			0x68
76 #define INT_EP_CTL_PHY_INT_		0x00008000
77 
78 #define BULK_IN_DLY			0x6C
79 
80 /* MAC CSRs */
81 #define MAC_CR				0x100
82 #define MAC_CR_MCPAS_			0x00080000
83 #define MAC_CR_PRMS_			0x00040000
84 #define MAC_CR_HPFILT_			0x00002000
85 #define MAC_CR_TXEN_			0x00000008
86 #define MAC_CR_RXEN_			0x00000004
87 
88 #define ADDRH				0x104
89 
90 #define ADDRL				0x108
91 
92 #define MII_ADDR			0x114
93 #define MII_WRITE_			0x02
94 #define MII_BUSY_			0x01
95 #define MII_READ_			0x00 /* ~of MII Write bit */
96 
97 #define MII_DATA			0x118
98 
99 #define FLOW				0x11C
100 
101 #define VLAN1				0x120
102 
103 #define COE_CR				0x130
104 #define Tx_COE_EN_			0x00010000
105 #define Rx_COE_EN_			0x00000001
106 
107 /* Vendor-specific PHY Definitions */
108 #define PHY_INT_SRC			29
109 
110 #define PHY_INT_MASK			30
111 #define PHY_INT_MASK_ANEG_COMP_		((u16)0x0040)
112 #define PHY_INT_MASK_LINK_DOWN_		((u16)0x0010)
113 #define PHY_INT_MASK_DEFAULT_		(PHY_INT_MASK_ANEG_COMP_ | \
114 					 PHY_INT_MASK_LINK_DOWN_)
115 
116 /* USB Vendor Requests */
117 #define USB_VENDOR_REQUEST_WRITE_REGISTER	0xA0
118 #define USB_VENDOR_REQUEST_READ_REGISTER	0xA1
119 
120 /* Some extra defines */
121 #define HS_USB_PKT_SIZE			512
122 #define FS_USB_PKT_SIZE			64
123 /* 5/33 is lower limit for BURST_CAP to work */
124 #define DEFAULT_HS_BURST_CAP_SIZE	(5 * HS_USB_PKT_SIZE)
125 #define DEFAULT_FS_BURST_CAP_SIZE	(33 * FS_USB_PKT_SIZE)
126 #define DEFAULT_BULK_IN_DELAY		0x00002000
127 #define MAX_SINGLE_PACKET_SIZE		2048
128 #define EEPROM_MAC_OFFSET		0x01
129 #define SMSC95XX_INTERNAL_PHY_ID	1
130 #define ETH_P_8021Q	0x8100          /* 802.1Q VLAN Extended Header  */
131 
132 /* local defines */
133 #define SMSC95XX_BASE_NAME "sms"
134 #define USB_CTRL_SET_TIMEOUT 5000
135 #define USB_CTRL_GET_TIMEOUT 5000
136 #define USB_BULK_SEND_TIMEOUT 5000
137 #define USB_BULK_RECV_TIMEOUT 5000
138 
139 #define RX_URB_SIZE DEFAULT_HS_BURST_CAP_SIZE
140 #define PHY_CONNECT_TIMEOUT 5000
141 
142 #define TURBO_MODE
143 
144 #ifndef CONFIG_DM_ETH
145 /* local vars */
146 static int curr_eth_dev; /* index for name of next device detected */
147 #endif
148 
149 /* driver private */
150 struct smsc95xx_private {
151 #ifdef CONFIG_DM_ETH
152 	struct ueth_data ueth;
153 #endif
154 	size_t rx_urb_size;  /* maximum USB URB size */
155 	u32 mac_cr;  /* MAC control register value */
156 	int have_hwaddr;  /* 1 if we have a hardware MAC address */
157 };
158 
159 /*
160  * Smsc95xx infrastructure commands
161  */
162 static int smsc95xx_write_reg(struct usb_device *udev, u32 index, u32 data)
163 {
164 	int len;
165 	ALLOC_CACHE_ALIGN_BUFFER(u32, tmpbuf, 1);
166 
167 	cpu_to_le32s(&data);
168 	tmpbuf[0] = data;
169 
170 	len = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
171 			      USB_VENDOR_REQUEST_WRITE_REGISTER,
172 			      USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
173 			      0, index, tmpbuf, sizeof(data),
174 			      USB_CTRL_SET_TIMEOUT);
175 	if (len != sizeof(data)) {
176 		debug("smsc95xx_write_reg failed: index=%d, data=%d, len=%d",
177 		      index, data, len);
178 		return -EIO;
179 	}
180 	return 0;
181 }
182 
183 static int smsc95xx_read_reg(struct usb_device *udev, u32 index, u32 *data)
184 {
185 	int len;
186 	ALLOC_CACHE_ALIGN_BUFFER(u32, tmpbuf, 1);
187 
188 	len = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
189 			      USB_VENDOR_REQUEST_READ_REGISTER,
190 			      USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
191 			      0, index, tmpbuf, sizeof(data),
192 			      USB_CTRL_GET_TIMEOUT);
193 	*data = tmpbuf[0];
194 	if (len != sizeof(data)) {
195 		debug("smsc95xx_read_reg failed: index=%d, len=%d",
196 		      index, len);
197 		return -EIO;
198 	}
199 
200 	le32_to_cpus(data);
201 	return 0;
202 }
203 
204 /* Loop until the read is completed with timeout */
205 static int smsc95xx_phy_wait_not_busy(struct usb_device *udev)
206 {
207 	unsigned long start_time = get_timer(0);
208 	u32 val;
209 
210 	do {
211 		smsc95xx_read_reg(udev, MII_ADDR, &val);
212 		if (!(val & MII_BUSY_))
213 			return 0;
214 	} while (get_timer(start_time) < 1000);
215 
216 	return -ETIMEDOUT;
217 }
218 
219 static int smsc95xx_mdio_read(struct usb_device *udev, int phy_id, int idx)
220 {
221 	u32 val, addr;
222 
223 	/* confirm MII not busy */
224 	if (smsc95xx_phy_wait_not_busy(udev)) {
225 		debug("MII is busy in smsc95xx_mdio_read\n");
226 		return -ETIMEDOUT;
227 	}
228 
229 	/* set the address, index & direction (read from PHY) */
230 	addr = (phy_id << 11) | (idx << 6) | MII_READ_;
231 	smsc95xx_write_reg(udev, MII_ADDR, addr);
232 
233 	if (smsc95xx_phy_wait_not_busy(udev)) {
234 		debug("Timed out reading MII reg %02X\n", idx);
235 		return -ETIMEDOUT;
236 	}
237 
238 	smsc95xx_read_reg(udev, MII_DATA, &val);
239 
240 	return (u16)(val & 0xFFFF);
241 }
242 
243 static void smsc95xx_mdio_write(struct usb_device *udev, int phy_id, int idx,
244 				int regval)
245 {
246 	u32 val, addr;
247 
248 	/* confirm MII not busy */
249 	if (smsc95xx_phy_wait_not_busy(udev)) {
250 		debug("MII is busy in smsc95xx_mdio_write\n");
251 		return;
252 	}
253 
254 	val = regval;
255 	smsc95xx_write_reg(udev, MII_DATA, val);
256 
257 	/* set the address, index & direction (write to PHY) */
258 	addr = (phy_id << 11) | (idx << 6) | MII_WRITE_;
259 	smsc95xx_write_reg(udev, MII_ADDR, addr);
260 
261 	if (smsc95xx_phy_wait_not_busy(udev))
262 		debug("Timed out writing MII reg %02X\n", idx);
263 }
264 
265 static int smsc95xx_eeprom_confirm_not_busy(struct usb_device *udev)
266 {
267 	unsigned long start_time = get_timer(0);
268 	u32 val;
269 
270 	do {
271 		smsc95xx_read_reg(udev, E2P_CMD, &val);
272 		if (!(val & E2P_CMD_BUSY_))
273 			return 0;
274 		udelay(40);
275 	} while (get_timer(start_time) < 1 * 1000 * 1000);
276 
277 	debug("EEPROM is busy\n");
278 	return -ETIMEDOUT;
279 }
280 
281 static int smsc95xx_wait_eeprom(struct usb_device *udev)
282 {
283 	unsigned long start_time = get_timer(0);
284 	u32 val;
285 
286 	do {
287 		smsc95xx_read_reg(udev, E2P_CMD, &val);
288 		if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
289 			break;
290 		udelay(40);
291 	} while (get_timer(start_time) < 1 * 1000 * 1000);
292 
293 	if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
294 		debug("EEPROM read operation timeout\n");
295 		return -ETIMEDOUT;
296 	}
297 	return 0;
298 }
299 
300 static int smsc95xx_read_eeprom(struct usb_device *udev, u32 offset, u32 length,
301 				u8 *data)
302 {
303 	u32 val;
304 	int i, ret;
305 
306 	ret = smsc95xx_eeprom_confirm_not_busy(udev);
307 	if (ret)
308 		return ret;
309 
310 	for (i = 0; i < length; i++) {
311 		val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
312 		smsc95xx_write_reg(udev, E2P_CMD, val);
313 
314 		ret = smsc95xx_wait_eeprom(udev);
315 		if (ret < 0)
316 			return ret;
317 
318 		smsc95xx_read_reg(udev, E2P_DATA, &val);
319 		data[i] = val & 0xFF;
320 		offset++;
321 	}
322 	return 0;
323 }
324 
325 /*
326  * mii_nway_restart - restart NWay (autonegotiation) for this interface
327  *
328  * Returns 0 on success, negative on error.
329  */
330 static int mii_nway_restart(struct usb_device *udev, struct ueth_data *dev)
331 {
332 	int bmcr;
333 	int r = -1;
334 
335 	/* if autoneg is off, it's an error */
336 	bmcr = smsc95xx_mdio_read(udev, dev->phy_id, MII_BMCR);
337 
338 	if (bmcr & BMCR_ANENABLE) {
339 		bmcr |= BMCR_ANRESTART;
340 		smsc95xx_mdio_write(udev, dev->phy_id, MII_BMCR, bmcr);
341 		r = 0;
342 	}
343 	return r;
344 }
345 
346 static int smsc95xx_phy_initialize(struct usb_device *udev,
347 				   struct ueth_data *dev)
348 {
349 	smsc95xx_mdio_write(udev, dev->phy_id, MII_BMCR, BMCR_RESET);
350 	smsc95xx_mdio_write(udev, dev->phy_id, MII_ADVERTISE,
351 			    ADVERTISE_ALL | ADVERTISE_CSMA |
352 			    ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
353 
354 	/* read to clear */
355 	smsc95xx_mdio_read(udev, dev->phy_id, PHY_INT_SRC);
356 
357 	smsc95xx_mdio_write(udev, dev->phy_id, PHY_INT_MASK,
358 			    PHY_INT_MASK_DEFAULT_);
359 	mii_nway_restart(udev, dev);
360 
361 	debug("phy initialised succesfully\n");
362 	return 0;
363 }
364 
365 static int smsc95xx_init_mac_address(unsigned char *enetaddr,
366 				     struct usb_device *udev)
367 {
368 	int ret;
369 
370 	/* try reading mac address from EEPROM */
371 	ret = smsc95xx_read_eeprom(udev, EEPROM_MAC_OFFSET, ETH_ALEN, enetaddr);
372 	if (ret)
373 		return ret;
374 
375 	if (is_valid_ethaddr(enetaddr)) {
376 		/* eeprom values are valid so use them */
377 		debug("MAC address read from EEPROM\n");
378 		return 0;
379 	}
380 
381 	/*
382 	 * No eeprom, or eeprom values are invalid. Generating a random MAC
383 	 * address is not safe. Just return an error.
384 	 */
385 	debug("Invalid MAC address read from EEPROM\n");
386 
387 	return -ENXIO;
388 }
389 
390 static int smsc95xx_write_hwaddr_common(struct usb_device *udev,
391 					struct smsc95xx_private *priv,
392 					unsigned char *enetaddr)
393 {
394 	u32 addr_lo = __get_unaligned_le32(&enetaddr[0]);
395 	u32 addr_hi = __get_unaligned_le16(&enetaddr[4]);
396 	int ret;
397 
398 	/* set hardware address */
399 	debug("** %s()\n", __func__);
400 	ret = smsc95xx_write_reg(udev, ADDRL, addr_lo);
401 	if (ret < 0)
402 		return ret;
403 
404 	ret = smsc95xx_write_reg(udev, ADDRH, addr_hi);
405 	if (ret < 0)
406 		return ret;
407 
408 	debug("MAC %pM\n", enetaddr);
409 	priv->have_hwaddr = 1;
410 
411 	return 0;
412 }
413 
414 /* Enable or disable Tx & Rx checksum offload engines */
415 static int smsc95xx_set_csums(struct usb_device *udev, int use_tx_csum,
416 			      int use_rx_csum)
417 {
418 	u32 read_buf;
419 	int ret = smsc95xx_read_reg(udev, COE_CR, &read_buf);
420 	if (ret < 0)
421 		return ret;
422 
423 	if (use_tx_csum)
424 		read_buf |= Tx_COE_EN_;
425 	else
426 		read_buf &= ~Tx_COE_EN_;
427 
428 	if (use_rx_csum)
429 		read_buf |= Rx_COE_EN_;
430 	else
431 		read_buf &= ~Rx_COE_EN_;
432 
433 	ret = smsc95xx_write_reg(udev, COE_CR, read_buf);
434 	if (ret < 0)
435 		return ret;
436 
437 	debug("COE_CR = 0x%08x\n", read_buf);
438 	return 0;
439 }
440 
441 static void smsc95xx_set_multicast(struct smsc95xx_private *priv)
442 {
443 	/* No multicast in u-boot */
444 	priv->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
445 }
446 
447 /* starts the TX path */
448 static void smsc95xx_start_tx_path(struct usb_device *udev,
449 				   struct smsc95xx_private *priv)
450 {
451 	u32 reg_val;
452 
453 	/* Enable Tx at MAC */
454 	priv->mac_cr |= MAC_CR_TXEN_;
455 
456 	smsc95xx_write_reg(udev, MAC_CR, priv->mac_cr);
457 
458 	/* Enable Tx at SCSRs */
459 	reg_val = TX_CFG_ON_;
460 	smsc95xx_write_reg(udev, TX_CFG, reg_val);
461 }
462 
463 /* Starts the Receive path */
464 static void smsc95xx_start_rx_path(struct usb_device *udev,
465 				   struct smsc95xx_private *priv)
466 {
467 	priv->mac_cr |= MAC_CR_RXEN_;
468 	smsc95xx_write_reg(udev, MAC_CR, priv->mac_cr);
469 }
470 
471 static int smsc95xx_init_common(struct usb_device *udev, struct ueth_data *dev,
472 				struct smsc95xx_private *priv,
473 				unsigned char *enetaddr)
474 {
475 	int ret;
476 	u32 write_buf;
477 	u32 read_buf;
478 	u32 burst_cap;
479 	int timeout;
480 #define TIMEOUT_RESOLUTION 50	/* ms */
481 	int link_detected;
482 
483 	debug("** %s()\n", __func__);
484 	dev->phy_id = SMSC95XX_INTERNAL_PHY_ID; /* fixed phy id */
485 
486 	write_buf = HW_CFG_LRST_;
487 	ret = smsc95xx_write_reg(udev, HW_CFG, write_buf);
488 	if (ret < 0)
489 		return ret;
490 
491 	timeout = 0;
492 	do {
493 		ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf);
494 		if (ret < 0)
495 			return ret;
496 		udelay(10 * 1000);
497 		timeout++;
498 	} while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
499 
500 	if (timeout >= 100) {
501 		debug("timeout waiting for completion of Lite Reset\n");
502 		return -ETIMEDOUT;
503 	}
504 
505 	write_buf = PM_CTL_PHY_RST_;
506 	ret = smsc95xx_write_reg(udev, PM_CTRL, write_buf);
507 	if (ret < 0)
508 		return ret;
509 
510 	timeout = 0;
511 	do {
512 		ret = smsc95xx_read_reg(udev, PM_CTRL, &read_buf);
513 		if (ret < 0)
514 			return ret;
515 		udelay(10 * 1000);
516 		timeout++;
517 	} while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
518 	if (timeout >= 100) {
519 		debug("timeout waiting for PHY Reset\n");
520 		return -ETIMEDOUT;
521 	}
522 	if (!priv->have_hwaddr && smsc95xx_init_mac_address(enetaddr, udev) ==
523 			0)
524 		priv->have_hwaddr = 1;
525 	if (!priv->have_hwaddr) {
526 		puts("Error: SMSC95xx: No MAC address set - set usbethaddr\n");
527 		return -EADDRNOTAVAIL;
528 	}
529 	ret = smsc95xx_write_hwaddr_common(udev, priv, enetaddr);
530 	if (ret < 0)
531 		return ret;
532 
533 	ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf);
534 	if (ret < 0)
535 		return ret;
536 	debug("Read Value from HW_CFG : 0x%08x\n", read_buf);
537 
538 	read_buf |= HW_CFG_BIR_;
539 	ret = smsc95xx_write_reg(udev, HW_CFG, read_buf);
540 	if (ret < 0)
541 		return ret;
542 
543 	ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf);
544 	if (ret < 0)
545 		return ret;
546 	debug("Read Value from HW_CFG after writing "
547 		"HW_CFG_BIR_: 0x%08x\n", read_buf);
548 
549 #ifdef TURBO_MODE
550 	if (dev->pusb_dev->speed == USB_SPEED_HIGH) {
551 		burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
552 		priv->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
553 	} else {
554 		burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
555 		priv->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
556 	}
557 #else
558 	burst_cap = 0;
559 	priv->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
560 #endif
561 	debug("rx_urb_size=%ld\n", (ulong)priv->rx_urb_size);
562 
563 	ret = smsc95xx_write_reg(udev, BURST_CAP, burst_cap);
564 	if (ret < 0)
565 		return ret;
566 
567 	ret = smsc95xx_read_reg(udev, BURST_CAP, &read_buf);
568 	if (ret < 0)
569 		return ret;
570 	debug("Read Value from BURST_CAP after writing: 0x%08x\n", read_buf);
571 
572 	read_buf = DEFAULT_BULK_IN_DELAY;
573 	ret = smsc95xx_write_reg(udev, BULK_IN_DLY, read_buf);
574 	if (ret < 0)
575 		return ret;
576 
577 	ret = smsc95xx_read_reg(udev, BULK_IN_DLY, &read_buf);
578 	if (ret < 0)
579 		return ret;
580 	debug("Read Value from BULK_IN_DLY after writing: "
581 			"0x%08x\n", read_buf);
582 
583 	ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf);
584 	if (ret < 0)
585 		return ret;
586 	debug("Read Value from HW_CFG: 0x%08x\n", read_buf);
587 
588 #ifdef TURBO_MODE
589 	read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
590 #endif
591 	read_buf &= ~HW_CFG_RXDOFF_;
592 
593 #define NET_IP_ALIGN 0
594 	read_buf |= NET_IP_ALIGN << 9;
595 
596 	ret = smsc95xx_write_reg(udev, HW_CFG, read_buf);
597 	if (ret < 0)
598 		return ret;
599 
600 	ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf);
601 	if (ret < 0)
602 		return ret;
603 	debug("Read Value from HW_CFG after writing: 0x%08x\n", read_buf);
604 
605 	write_buf = 0xFFFFFFFF;
606 	ret = smsc95xx_write_reg(udev, INT_STS, write_buf);
607 	if (ret < 0)
608 		return ret;
609 
610 	ret = smsc95xx_read_reg(udev, ID_REV, &read_buf);
611 	if (ret < 0)
612 		return ret;
613 	debug("ID_REV = 0x%08x\n", read_buf);
614 
615 	/* Configure GPIO pins as LED outputs */
616 	write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
617 		LED_GPIO_CFG_FDX_LED;
618 	ret = smsc95xx_write_reg(udev, LED_GPIO_CFG, write_buf);
619 	if (ret < 0)
620 		return ret;
621 	debug("LED_GPIO_CFG set\n");
622 
623 	/* Init Tx */
624 	write_buf = 0;
625 	ret = smsc95xx_write_reg(udev, FLOW, write_buf);
626 	if (ret < 0)
627 		return ret;
628 
629 	read_buf = AFC_CFG_DEFAULT;
630 	ret = smsc95xx_write_reg(udev, AFC_CFG, read_buf);
631 	if (ret < 0)
632 		return ret;
633 
634 	ret = smsc95xx_read_reg(udev, MAC_CR, &priv->mac_cr);
635 	if (ret < 0)
636 		return ret;
637 
638 	/* Init Rx. Set Vlan */
639 	write_buf = (u32)ETH_P_8021Q;
640 	ret = smsc95xx_write_reg(udev, VLAN1, write_buf);
641 	if (ret < 0)
642 		return ret;
643 
644 	/* Disable checksum offload engines */
645 	ret = smsc95xx_set_csums(udev, 0, 0);
646 	if (ret < 0) {
647 		debug("Failed to set csum offload: %d\n", ret);
648 		return ret;
649 	}
650 	smsc95xx_set_multicast(priv);
651 
652 	ret = smsc95xx_phy_initialize(udev, dev);
653 	if (ret < 0)
654 		return ret;
655 	ret = smsc95xx_read_reg(udev, INT_EP_CTL, &read_buf);
656 	if (ret < 0)
657 		return ret;
658 
659 	/* enable PHY interrupts */
660 	read_buf |= INT_EP_CTL_PHY_INT_;
661 
662 	ret = smsc95xx_write_reg(udev, INT_EP_CTL, read_buf);
663 	if (ret < 0)
664 		return ret;
665 
666 	smsc95xx_start_tx_path(udev, priv);
667 	smsc95xx_start_rx_path(udev, priv);
668 
669 	timeout = 0;
670 	do {
671 		link_detected = smsc95xx_mdio_read(udev, dev->phy_id, MII_BMSR)
672 			& BMSR_LSTATUS;
673 		if (!link_detected) {
674 			if (timeout == 0)
675 				printf("Waiting for Ethernet connection... ");
676 			udelay(TIMEOUT_RESOLUTION * 1000);
677 			timeout += TIMEOUT_RESOLUTION;
678 		}
679 	} while (!link_detected && timeout < PHY_CONNECT_TIMEOUT);
680 	if (link_detected) {
681 		if (timeout != 0)
682 			printf("done.\n");
683 	} else {
684 		printf("unable to connect.\n");
685 		return -EIO;
686 	}
687 	return 0;
688 }
689 
690 static int smsc95xx_send_common(struct ueth_data *dev, void *packet, int length)
691 {
692 	int err;
693 	int actual_len;
694 	u32 tx_cmd_a;
695 	u32 tx_cmd_b;
696 	ALLOC_CACHE_ALIGN_BUFFER(unsigned char, msg,
697 				 PKTSIZE + sizeof(tx_cmd_a) + sizeof(tx_cmd_b));
698 
699 	debug("** %s(), len %d, buf %#x\n", __func__, length, (int)msg);
700 	if (length > PKTSIZE)
701 		return -ENOSPC;
702 
703 	tx_cmd_a = (u32)length | TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
704 	tx_cmd_b = (u32)length;
705 	cpu_to_le32s(&tx_cmd_a);
706 	cpu_to_le32s(&tx_cmd_b);
707 
708 	/* prepend cmd_a and cmd_b */
709 	memcpy(msg, &tx_cmd_a, sizeof(tx_cmd_a));
710 	memcpy(msg + sizeof(tx_cmd_a), &tx_cmd_b, sizeof(tx_cmd_b));
711 	memcpy(msg + sizeof(tx_cmd_a) + sizeof(tx_cmd_b), (void *)packet,
712 	       length);
713 	err = usb_bulk_msg(dev->pusb_dev,
714 				usb_sndbulkpipe(dev->pusb_dev, dev->ep_out),
715 				(void *)msg,
716 				length + sizeof(tx_cmd_a) + sizeof(tx_cmd_b),
717 				&actual_len,
718 				USB_BULK_SEND_TIMEOUT);
719 	debug("Tx: len = %u, actual = %u, err = %d\n",
720 	      length + sizeof(tx_cmd_a) + sizeof(tx_cmd_b),
721 	      actual_len, err);
722 
723 	return err;
724 }
725 
726 #ifndef CONFIG_DM_ETH
727 /*
728  * Smsc95xx callbacks
729  */
730 static int smsc95xx_init(struct eth_device *eth, bd_t *bd)
731 {
732 	struct ueth_data *dev = (struct ueth_data *)eth->priv;
733 	struct usb_device *udev = dev->pusb_dev;
734 	struct smsc95xx_private *priv =
735 		(struct smsc95xx_private *)dev->dev_priv;
736 
737 	return smsc95xx_init_common(udev, dev, priv, eth->enetaddr);
738 }
739 
740 static int smsc95xx_send(struct eth_device *eth, void *packet, int length)
741 {
742 	struct ueth_data *dev = (struct ueth_data *)eth->priv;
743 
744 	return smsc95xx_send_common(dev, packet, length);
745 }
746 
747 static int smsc95xx_recv(struct eth_device *eth)
748 {
749 	struct ueth_data *dev = (struct ueth_data *)eth->priv;
750 	DEFINE_CACHE_ALIGN_BUFFER(unsigned char, recv_buf, RX_URB_SIZE);
751 	unsigned char *buf_ptr;
752 	int err;
753 	int actual_len;
754 	u32 packet_len;
755 	int cur_buf_align;
756 
757 	debug("** %s()\n", __func__);
758 	err = usb_bulk_msg(dev->pusb_dev,
759 			   usb_rcvbulkpipe(dev->pusb_dev, dev->ep_in),
760 			   (void *)recv_buf, RX_URB_SIZE, &actual_len,
761 			   USB_BULK_RECV_TIMEOUT);
762 	debug("Rx: len = %u, actual = %u, err = %d\n", RX_URB_SIZE,
763 	      actual_len, err);
764 	if (err != 0) {
765 		debug("Rx: failed to receive\n");
766 		return -err;
767 	}
768 	if (actual_len > RX_URB_SIZE) {
769 		debug("Rx: received too many bytes %d\n", actual_len);
770 		return -ENOSPC;
771 	}
772 
773 	buf_ptr = recv_buf;
774 	while (actual_len > 0) {
775 		/*
776 		 * 1st 4 bytes contain the length of the actual data plus error
777 		 * info. Extract data length.
778 		 */
779 		if (actual_len < sizeof(packet_len)) {
780 			debug("Rx: incomplete packet length\n");
781 			return -EIO;
782 		}
783 		memcpy(&packet_len, buf_ptr, sizeof(packet_len));
784 		le32_to_cpus(&packet_len);
785 		if (packet_len & RX_STS_ES_) {
786 			debug("Rx: Error header=%#x", packet_len);
787 			return -EIO;
788 		}
789 		packet_len = ((packet_len & RX_STS_FL_) >> 16);
790 
791 		if (packet_len > actual_len - sizeof(packet_len)) {
792 			debug("Rx: too large packet: %d\n", packet_len);
793 			return -EIO;
794 		}
795 
796 		/* Notify net stack */
797 		net_process_received_packet(buf_ptr + sizeof(packet_len),
798 					    packet_len - 4);
799 
800 		/* Adjust for next iteration */
801 		actual_len -= sizeof(packet_len) + packet_len;
802 		buf_ptr += sizeof(packet_len) + packet_len;
803 		cur_buf_align = (int)buf_ptr - (int)recv_buf;
804 
805 		if (cur_buf_align & 0x03) {
806 			int align = 4 - (cur_buf_align & 0x03);
807 
808 			actual_len -= align;
809 			buf_ptr += align;
810 		}
811 	}
812 	return err;
813 }
814 
815 static void smsc95xx_halt(struct eth_device *eth)
816 {
817 	debug("** %s()\n", __func__);
818 }
819 
820 static int smsc95xx_write_hwaddr(struct eth_device *eth)
821 {
822 	struct ueth_data *dev = eth->priv;
823 	struct usb_device *udev = dev->pusb_dev;
824 	struct smsc95xx_private *priv = dev->dev_priv;
825 
826 	return smsc95xx_write_hwaddr_common(udev, priv, eth->enetaddr);
827 }
828 
829 /*
830  * SMSC probing functions
831  */
832 void smsc95xx_eth_before_probe(void)
833 {
834 	curr_eth_dev = 0;
835 }
836 
837 struct smsc95xx_dongle {
838 	unsigned short vendor;
839 	unsigned short product;
840 };
841 
842 static const struct smsc95xx_dongle smsc95xx_dongles[] = {
843 	{ 0x0424, 0xec00 },	/* LAN9512/LAN9514 Ethernet */
844 	{ 0x0424, 0x9500 },	/* LAN9500 Ethernet */
845 	{ 0x0424, 0x9730 },	/* LAN9730 Ethernet (HSIC) */
846 	{ 0x0424, 0x9900 },	/* SMSC9500 USB Ethernet Device (SAL10) */
847 	{ 0x0424, 0x9e00 },	/* LAN9500A Ethernet */
848 	{ 0x0000, 0x0000 }	/* END - Do not remove */
849 };
850 
851 /* Probe to see if a new device is actually an SMSC device */
852 int smsc95xx_eth_probe(struct usb_device *dev, unsigned int ifnum,
853 		      struct ueth_data *ss)
854 {
855 	struct usb_interface *iface;
856 	struct usb_interface_descriptor *iface_desc;
857 	int i;
858 
859 	/* let's examine the device now */
860 	iface = &dev->config.if_desc[ifnum];
861 	iface_desc = &dev->config.if_desc[ifnum].desc;
862 
863 	for (i = 0; smsc95xx_dongles[i].vendor != 0; i++) {
864 		if (dev->descriptor.idVendor == smsc95xx_dongles[i].vendor &&
865 		    dev->descriptor.idProduct == smsc95xx_dongles[i].product)
866 			/* Found a supported dongle */
867 			break;
868 	}
869 	if (smsc95xx_dongles[i].vendor == 0)
870 		return 0;
871 
872 	/* At this point, we know we've got a live one */
873 	debug("\n\nUSB Ethernet device detected\n");
874 	memset(ss, '\0', sizeof(struct ueth_data));
875 
876 	/* Initialize the ueth_data structure with some useful info */
877 	ss->ifnum = ifnum;
878 	ss->pusb_dev = dev;
879 	ss->subclass = iface_desc->bInterfaceSubClass;
880 	ss->protocol = iface_desc->bInterfaceProtocol;
881 
882 	/*
883 	 * We are expecting a minimum of 3 endpoints - in, out (bulk), and int.
884 	 * We will ignore any others.
885 	 */
886 	for (i = 0; i < iface_desc->bNumEndpoints; i++) {
887 		/* is it an BULK endpoint? */
888 		if ((iface->ep_desc[i].bmAttributes &
889 		     USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_BULK) {
890 			if (iface->ep_desc[i].bEndpointAddress & USB_DIR_IN)
891 				ss->ep_in =
892 					iface->ep_desc[i].bEndpointAddress &
893 					USB_ENDPOINT_NUMBER_MASK;
894 			else
895 				ss->ep_out =
896 					iface->ep_desc[i].bEndpointAddress &
897 					USB_ENDPOINT_NUMBER_MASK;
898 		}
899 
900 		/* is it an interrupt endpoint? */
901 		if ((iface->ep_desc[i].bmAttributes &
902 		    USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_INT) {
903 			ss->ep_int = iface->ep_desc[i].bEndpointAddress &
904 				USB_ENDPOINT_NUMBER_MASK;
905 			ss->irqinterval = iface->ep_desc[i].bInterval;
906 		}
907 	}
908 	debug("Endpoints In %d Out %d Int %d\n",
909 		  ss->ep_in, ss->ep_out, ss->ep_int);
910 
911 	/* Do some basic sanity checks, and bail if we find a problem */
912 	if (usb_set_interface(dev, iface_desc->bInterfaceNumber, 0) ||
913 	    !ss->ep_in || !ss->ep_out || !ss->ep_int) {
914 		debug("Problems with device\n");
915 		return 0;
916 	}
917 	dev->privptr = (void *)ss;
918 
919 	/* alloc driver private */
920 	ss->dev_priv = calloc(1, sizeof(struct smsc95xx_private));
921 	if (!ss->dev_priv)
922 		return 0;
923 
924 	return 1;
925 }
926 
927 int smsc95xx_eth_get_info(struct usb_device *dev, struct ueth_data *ss,
928 				struct eth_device *eth)
929 {
930 	debug("** %s()\n", __func__);
931 	if (!eth) {
932 		debug("%s: missing parameter.\n", __func__);
933 		return 0;
934 	}
935 	sprintf(eth->name, "%s%d", SMSC95XX_BASE_NAME, curr_eth_dev++);
936 	eth->init = smsc95xx_init;
937 	eth->send = smsc95xx_send;
938 	eth->recv = smsc95xx_recv;
939 	eth->halt = smsc95xx_halt;
940 	eth->write_hwaddr = smsc95xx_write_hwaddr;
941 	eth->priv = ss;
942 	return 1;
943 }
944 #endif /* !CONFIG_DM_ETH */
945 
946 #ifdef CONFIG_DM_ETH
947 static int smsc95xx_eth_start(struct udevice *dev)
948 {
949 	struct usb_device *udev = dev_get_parentdata(dev);
950 	struct smsc95xx_private *priv = dev_get_priv(dev);
951 	struct eth_pdata *pdata = dev_get_platdata(dev);
952 
953 	/* Driver-model Ethernet ensures we have this */
954 	priv->have_hwaddr = 1;
955 
956 	return smsc95xx_init_common(udev, &priv->ueth, priv, pdata->enetaddr);
957 }
958 
959 void smsc95xx_eth_stop(struct udevice *dev)
960 {
961 	debug("** %s()\n", __func__);
962 }
963 
964 int smsc95xx_eth_send(struct udevice *dev, void *packet, int length)
965 {
966 	struct smsc95xx_private *priv = dev_get_priv(dev);
967 
968 	return smsc95xx_send_common(&priv->ueth, packet, length);
969 }
970 
971 int smsc95xx_eth_recv(struct udevice *dev, int flags, uchar **packetp)
972 {
973 	struct smsc95xx_private *priv = dev_get_priv(dev);
974 	struct ueth_data *ueth = &priv->ueth;
975 	uint8_t *ptr;
976 	int ret, len;
977 	u32 packet_len;
978 
979 	len = usb_ether_get_rx_bytes(ueth, &ptr);
980 	debug("%s: first try, len=%d\n", __func__, len);
981 	if (!len) {
982 		if (!(flags & ETH_RECV_CHECK_DEVICE))
983 			return -EAGAIN;
984 		ret = usb_ether_receive(ueth, RX_URB_SIZE);
985 		if (ret == -EAGAIN)
986 			return ret;
987 
988 		len = usb_ether_get_rx_bytes(ueth, &ptr);
989 		debug("%s: second try, len=%d\n", __func__, len);
990 	}
991 
992 	/*
993 	 * 1st 4 bytes contain the length of the actual data plus error info.
994 	 * Extract data length.
995 	 */
996 	if (len < sizeof(packet_len)) {
997 		debug("Rx: incomplete packet length\n");
998 		goto err;
999 	}
1000 	memcpy(&packet_len, ptr, sizeof(packet_len));
1001 	le32_to_cpus(&packet_len);
1002 	if (packet_len & RX_STS_ES_) {
1003 		debug("Rx: Error header=%#x", packet_len);
1004 		goto err;
1005 	}
1006 	packet_len = ((packet_len & RX_STS_FL_) >> 16);
1007 
1008 	if (packet_len > len - sizeof(packet_len)) {
1009 		debug("Rx: too large packet: %d\n", packet_len);
1010 		goto err;
1011 	}
1012 
1013 	*packetp = ptr + sizeof(packet_len);
1014 	return packet_len;
1015 
1016 err:
1017 	usb_ether_advance_rxbuf(ueth, -1);
1018 	return -EINVAL;
1019 }
1020 
1021 static int smsc95xx_free_pkt(struct udevice *dev, uchar *packet, int packet_len)
1022 {
1023 	struct smsc95xx_private *priv = dev_get_priv(dev);
1024 
1025 	packet_len = ALIGN(packet_len, 4);
1026 	usb_ether_advance_rxbuf(&priv->ueth, sizeof(u32) + packet_len);
1027 
1028 	return 0;
1029 }
1030 
1031 int smsc95xx_write_hwaddr(struct udevice *dev)
1032 {
1033 	struct usb_device *udev = dev_get_parentdata(dev);
1034 	struct eth_pdata *pdata = dev_get_platdata(dev);
1035 	struct smsc95xx_private *priv = dev_get_priv(dev);
1036 
1037 	return smsc95xx_write_hwaddr_common(udev, priv, pdata->enetaddr);
1038 }
1039 
1040 static int smsc95xx_eth_probe(struct udevice *dev)
1041 {
1042 	struct smsc95xx_private *priv = dev_get_priv(dev);
1043 	struct ueth_data *ueth = &priv->ueth;
1044 
1045 	return usb_ether_register(dev, ueth, RX_URB_SIZE);
1046 }
1047 
1048 static const struct eth_ops smsc95xx_eth_ops = {
1049 	.start	= smsc95xx_eth_start,
1050 	.send	= smsc95xx_eth_send,
1051 	.recv	= smsc95xx_eth_recv,
1052 	.free_pkt = smsc95xx_free_pkt,
1053 	.stop	= smsc95xx_eth_stop,
1054 	.write_hwaddr = smsc95xx_write_hwaddr,
1055 };
1056 
1057 U_BOOT_DRIVER(smsc95xx_eth) = {
1058 	.name	= "smsc95xx_eth",
1059 	.id	= UCLASS_ETH,
1060 	.probe = smsc95xx_eth_probe,
1061 	.ops	= &smsc95xx_eth_ops,
1062 	.priv_auto_alloc_size = sizeof(struct smsc95xx_private),
1063 	.platdata_auto_alloc_size = sizeof(struct eth_pdata),
1064 };
1065 
1066 static const struct usb_device_id smsc95xx_eth_id_table[] = {
1067 	{ USB_DEVICE(0x05ac, 0x1402) },
1068 	{ USB_DEVICE(0x0424, 0xec00) },	/* LAN9512/LAN9514 Ethernet */
1069 	{ USB_DEVICE(0x0424, 0x9500) },	/* LAN9500 Ethernet */
1070 	{ USB_DEVICE(0x0424, 0x9730) },	/* LAN9730 Ethernet (HSIC) */
1071 	{ USB_DEVICE(0x0424, 0x9900) },	/* SMSC9500 USB Ethernet (SAL10) */
1072 	{ USB_DEVICE(0x0424, 0x9e00) },	/* LAN9500A Ethernet */
1073 	{ }		/* Terminating entry */
1074 };
1075 
1076 U_BOOT_USB_DEVICE(smsc95xx_eth, smsc95xx_eth_id_table);
1077 #endif
1078