1 /* 2 * Copyright (c) 2017 Microchip Technology Inc. All rights reserved. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <dm.h> 8 #include <usb.h> 9 #include "usb_ether.h" 10 #include "lan7x.h" 11 12 /* LAN78xx specific register/bit defines */ 13 #define LAN78XX_HW_CFG_LED1_EN BIT(21) /* Muxed with EEDO */ 14 #define LAN78XX_HW_CFG_LED0_EN BIT(20) /* Muxed with EECLK */ 15 16 #define LAN78XX_USB_CFG0 0x080 17 #define LAN78XX_USB_CFG0_BIR BIT(6) 18 19 #define LAN78XX_BURST_CAP 0x090 20 21 #define LAN78XX_BULK_IN_DLY 0x094 22 23 #define LAN78XX_RFE_CTL 0x0B0 24 25 #define LAN78XX_FCT_RX_CTL 0x0C0 26 27 #define LAN78XX_FCT_TX_CTL 0x0C4 28 29 #define LAN78XX_FCT_RX_FIFO_END 0x0C8 30 31 #define LAN78XX_FCT_TX_FIFO_END 0x0CC 32 33 #define LAN78XX_FCT_FLOW 0x0D0 34 35 #define LAN78XX_MAF_BASE 0x400 36 #define LAN78XX_MAF_HIX 0x00 37 #define LAN78XX_MAF_LOX 0x04 38 #define LAN78XX_MAF_HI_BEGIN (LAN78XX_MAF_BASE + LAN78XX_MAF_HIX) 39 #define LAN78XX_MAF_LO_BEGIN (LAN78XX_MAF_BASE + LAN78XX_MAF_LOX) 40 #define LAN78XX_MAF_HI(index) (LAN78XX_MAF_BASE + (8 * (index)) + \ 41 LAN78XX_MAF_HIX) 42 #define LAN78XX_MAF_LO(index) (LAN78XX_MAF_BASE + (8 * (index)) + \ 43 LAN78XX_MAF_LOX) 44 #define LAN78XX_MAF_HI_VALID BIT(31) 45 46 /* OTP registers */ 47 #define LAN78XX_OTP_BASE_ADDR 0x00001000 48 49 #define LAN78XX_OTP_PWR_DN (LAN78XX_OTP_BASE_ADDR + 4 * 0x00) 50 #define LAN78XX_OTP_PWR_DN_PWRDN_N BIT(0) 51 52 #define LAN78XX_OTP_ADDR1 (LAN78XX_OTP_BASE_ADDR + 4 * 0x01) 53 #define LAN78XX_OTP_ADDR1_15_11 0x1F 54 55 #define LAN78XX_OTP_ADDR2 (LAN78XX_OTP_BASE_ADDR + 4 * 0x02) 56 #define LAN78XX_OTP_ADDR2_10_3 0xFF 57 58 #define LAN78XX_OTP_RD_DATA (LAN78XX_OTP_BASE_ADDR + 4 * 0x06) 59 60 #define LAN78XX_OTP_FUNC_CMD (LAN78XX_OTP_BASE_ADDR + 4 * 0x08) 61 #define LAN78XX_OTP_FUNC_CMD_READ BIT(0) 62 63 #define LAN78XX_OTP_CMD_GO (LAN78XX_OTP_BASE_ADDR + 4 * 0x0A) 64 #define LAN78XX_OTP_CMD_GO_GO BIT(0) 65 66 #define LAN78XX_OTP_STATUS (LAN78XX_OTP_BASE_ADDR + 4 * 0x0C) 67 #define LAN78XX_OTP_STATUS_BUSY BIT(0) 68 69 #define LAN78XX_OTP_INDICATOR_1 0xF3 70 #define LAN78XX_OTP_INDICATOR_2 0xF7 71 72 /* 73 * Lan78xx infrastructure commands 74 */ 75 static int lan78xx_read_raw_otp(struct usb_device *udev, u32 offset, 76 u32 length, u8 *data) 77 { 78 int i; 79 int ret; 80 u32 buf; 81 82 ret = lan7x_read_reg(udev, LAN78XX_OTP_PWR_DN, &buf); 83 if (ret) 84 return ret; 85 86 if (buf & LAN78XX_OTP_PWR_DN_PWRDN_N) { 87 /* clear it and wait to be cleared */ 88 ret = lan7x_write_reg(udev, LAN78XX_OTP_PWR_DN, 0); 89 if (ret) 90 return ret; 91 92 ret = lan7x_wait_for_bit(udev, "LAN78XX_OTP_PWR_DN_PWRDN_N", 93 LAN78XX_OTP_PWR_DN, 94 LAN78XX_OTP_PWR_DN_PWRDN_N, 95 false, 1000, 0); 96 if (ret) 97 return ret; 98 } 99 100 for (i = 0; i < length; i++) { 101 ret = lan7x_write_reg(udev, LAN78XX_OTP_ADDR1, 102 ((offset + i) >> 8) & 103 LAN78XX_OTP_ADDR1_15_11); 104 if (ret) 105 return ret; 106 ret = lan7x_write_reg(udev, LAN78XX_OTP_ADDR2, 107 ((offset + i) & LAN78XX_OTP_ADDR2_10_3)); 108 if (ret) 109 return ret; 110 111 ret = lan7x_write_reg(udev, LAN78XX_OTP_FUNC_CMD, 112 LAN78XX_OTP_FUNC_CMD_READ); 113 if (ret) 114 return ret; 115 ret = lan7x_write_reg(udev, LAN78XX_OTP_CMD_GO, 116 LAN78XX_OTP_CMD_GO_GO); 117 118 if (ret) 119 return ret; 120 121 ret = lan7x_wait_for_bit(udev, "LAN78XX_OTP_STATUS_BUSY", 122 LAN78XX_OTP_STATUS, 123 LAN78XX_OTP_STATUS_BUSY, 124 false, 1000, 0); 125 if (ret) 126 return ret; 127 128 ret = lan7x_read_reg(udev, LAN78XX_OTP_RD_DATA, &buf); 129 if (ret) 130 return ret; 131 132 data[i] = (u8)(buf & 0xFF); 133 } 134 135 return 0; 136 } 137 138 static int lan78xx_read_otp(struct usb_device *udev, u32 offset, 139 u32 length, u8 *data) 140 { 141 u8 sig; 142 int ret; 143 144 ret = lan78xx_read_raw_otp(udev, 0, 1, &sig); 145 146 if (!ret) { 147 if (sig == LAN78XX_OTP_INDICATOR_1) 148 offset = offset; 149 else if (sig == LAN78XX_OTP_INDICATOR_2) 150 offset += 0x100; 151 else 152 return -EINVAL; 153 ret = lan78xx_read_raw_otp(udev, offset, length, data); 154 if (ret) 155 return ret; 156 } 157 debug("LAN78x: MAC address from OTP = %pM\n", data); 158 159 return ret; 160 } 161 162 static int lan78xx_read_otp_mac(unsigned char *enetaddr, 163 struct usb_device *udev) 164 { 165 int ret; 166 167 memset(enetaddr, 0, 6); 168 169 ret = lan78xx_read_otp(udev, 170 EEPROM_MAC_OFFSET, 171 ETH_ALEN, 172 enetaddr); 173 if (!ret && is_valid_ethaddr(enetaddr)) { 174 /* eeprom values are valid so use them */ 175 debug("MAC address read from OTP %pM\n", enetaddr); 176 return 0; 177 } 178 debug("MAC address read from OTP invalid %pM\n", enetaddr); 179 180 memset(enetaddr, 0, 6); 181 return -EINVAL; 182 } 183 184 static int lan78xx_update_flowcontrol(struct usb_device *udev, 185 struct ueth_data *dev) 186 { 187 uint32_t flow = 0, fct_flow = 0; 188 int ret; 189 190 ret = lan7x_update_flowcontrol(udev, dev, &flow, &fct_flow); 191 if (ret) 192 return ret; 193 194 ret = lan7x_write_reg(udev, LAN78XX_FCT_FLOW, fct_flow); 195 if (ret) 196 return ret; 197 return lan7x_write_reg(udev, FLOW, flow); 198 } 199 200 static int lan78xx_read_mac(unsigned char *enetaddr, 201 struct usb_device *udev, 202 struct lan7x_private *priv) 203 { 204 u32 val; 205 int ret; 206 int saved = 0, done = 0; 207 208 /* 209 * Depends on chip, some EEPROM pins are muxed with LED function. 210 * disable & restore LED function to access EEPROM. 211 */ 212 if ((priv->chipid == ID_REV_CHIP_ID_7800) || 213 (priv->chipid == ID_REV_CHIP_ID_7850)) { 214 ret = lan7x_read_reg(udev, HW_CFG, &val); 215 if (ret) 216 return ret; 217 saved = val; 218 val &= ~(LAN78XX_HW_CFG_LED1_EN | LAN78XX_HW_CFG_LED0_EN); 219 ret = lan7x_write_reg(udev, HW_CFG, val); 220 if (ret) 221 goto restore; 222 } 223 224 /* 225 * Refer to the doc/README.enetaddr and doc/README.usb for 226 * the U-Boot MAC address policy 227 */ 228 /* try reading mac address from EEPROM, then from OTP */ 229 ret = lan7x_read_eeprom_mac(enetaddr, udev); 230 if (!ret) 231 done = 1; 232 233 restore: 234 if ((priv->chipid == ID_REV_CHIP_ID_7800) || 235 (priv->chipid == ID_REV_CHIP_ID_7850)) { 236 ret = lan7x_write_reg(udev, HW_CFG, saved); 237 if (ret) 238 return ret; 239 } 240 /* if the EEPROM mac address is good, then exit */ 241 if (done) 242 return 0; 243 244 /* try reading mac address from OTP if the device is LAN78xx */ 245 return lan78xx_read_otp_mac(enetaddr, udev); 246 } 247 248 static int lan78xx_set_receive_filter(struct usb_device *udev) 249 { 250 /* No multicast in u-boot for now */ 251 return lan7x_write_reg(udev, LAN78XX_RFE_CTL, 252 RFE_CTL_BCAST_EN | RFE_CTL_DA_PERFECT); 253 } 254 255 /* starts the TX path */ 256 static void lan78xx_start_tx_path(struct usb_device *udev) 257 { 258 /* Enable Tx at MAC */ 259 lan7x_write_reg(udev, MAC_TX, MAC_TX_TXEN); 260 261 /* Enable Tx at SCSRs */ 262 lan7x_write_reg(udev, LAN78XX_FCT_TX_CTL, FCT_TX_CTL_EN); 263 } 264 265 /* Starts the Receive path */ 266 static void lan78xx_start_rx_path(struct usb_device *udev) 267 { 268 /* Enable Rx at MAC */ 269 lan7x_write_reg(udev, MAC_RX, 270 LAN7X_MAC_RX_MAX_SIZE_DEFAULT | 271 MAC_RX_FCS_STRIP | MAC_RX_RXEN); 272 273 /* Enable Rx at SCSRs */ 274 lan7x_write_reg(udev, LAN78XX_FCT_RX_CTL, FCT_RX_CTL_EN); 275 } 276 277 static int lan78xx_basic_reset(struct usb_device *udev, 278 struct ueth_data *dev, 279 struct lan7x_private *priv) 280 { 281 int ret; 282 u32 val; 283 284 ret = lan7x_basic_reset(udev, dev); 285 if (ret) 286 return ret; 287 288 /* Keep the chip ID */ 289 ret = lan7x_read_reg(udev, ID_REV, &val); 290 if (ret) 291 return ret; 292 debug("LAN78xx ID_REV = 0x%08x\n", val); 293 294 priv->chipid = (val & ID_REV_CHIP_ID_MASK) >> 16; 295 296 /* Respond to the IN token with a NAK */ 297 ret = lan7x_read_reg(udev, LAN78XX_USB_CFG0, &val); 298 if (ret) 299 return ret; 300 val |= LAN78XX_USB_CFG0_BIR; 301 return lan7x_write_reg(udev, LAN78XX_USB_CFG0, val); 302 } 303 304 int lan78xx_write_hwaddr(struct udevice *dev) 305 { 306 struct usb_device *udev = dev_get_parent_priv(dev); 307 struct eth_pdata *pdata = dev_get_platdata(dev); 308 unsigned char *enetaddr = pdata->enetaddr; 309 u32 addr_lo = get_unaligned_le32(&enetaddr[0]); 310 u32 addr_hi = (u32)get_unaligned_le16(&enetaddr[4]); 311 int ret; 312 313 /* set hardware address */ 314 ret = lan7x_write_reg(udev, RX_ADDRL, addr_lo); 315 if (ret) 316 return ret; 317 318 ret = lan7x_write_reg(udev, RX_ADDRH, addr_hi); 319 if (ret) 320 return ret; 321 322 ret = lan7x_write_reg(udev, LAN78XX_MAF_LO(0), addr_lo); 323 if (ret) 324 return ret; 325 326 ret = lan7x_write_reg(udev, LAN78XX_MAF_HI(0), 327 addr_hi | LAN78XX_MAF_HI_VALID); 328 if (ret) 329 return ret; 330 331 debug("MAC addr %pM written\n", enetaddr); 332 333 return 0; 334 } 335 336 static int lan78xx_eth_start(struct udevice *dev) 337 { 338 struct usb_device *udev = dev_get_parent_priv(dev); 339 struct lan7x_private *priv = dev_get_priv(dev); 340 341 int ret; 342 u32 write_buf; 343 344 /* Reset and read Mac addr were done in probe() */ 345 ret = lan78xx_write_hwaddr(dev); 346 if (ret) 347 return ret; 348 349 ret = lan7x_write_reg(udev, LAN78XX_BURST_CAP, 0); 350 if (ret) 351 return ret; 352 353 ret = lan7x_write_reg(udev, LAN78XX_BULK_IN_DLY, DEFAULT_BULK_IN_DELAY); 354 if (ret) 355 return ret; 356 357 ret = lan7x_write_reg(udev, INT_STS, 0xFFFFFFFF); 358 if (ret) 359 return ret; 360 361 /* set FIFO sizes */ 362 ret = lan7x_write_reg(udev, LAN78XX_FCT_RX_FIFO_END, 363 (MAX_RX_FIFO_SIZE - 512) / 512); 364 if (ret) 365 return ret; 366 367 ret = lan7x_write_reg(udev, LAN78XX_FCT_TX_FIFO_END, 368 (MAX_TX_FIFO_SIZE - 512) / 512); 369 if (ret) 370 return ret; 371 372 /* Init Tx */ 373 ret = lan7x_write_reg(udev, FLOW, 0); 374 if (ret) 375 return ret; 376 377 /* Init Rx. Set Vlan, keep default for VLAN on 78xx */ 378 ret = lan78xx_set_receive_filter(udev); 379 if (ret) 380 return ret; 381 382 /* Init PHY, autonego, and link */ 383 ret = lan7x_eth_phylib_connect(dev, &priv->ueth); 384 if (ret) 385 return ret; 386 ret = lan7x_eth_phylib_config_start(dev); 387 if (ret) 388 return ret; 389 390 /* 391 * MAC_CR has to be set after PHY init. 392 * MAC will auto detect the PHY speed. 393 */ 394 ret = lan7x_read_reg(udev, MAC_CR, &write_buf); 395 if (ret) 396 return ret; 397 write_buf |= MAC_CR_AUTO_DUPLEX | MAC_CR_AUTO_SPEED | MAC_CR_ADP; 398 ret = lan7x_write_reg(udev, MAC_CR, write_buf); 399 if (ret) 400 return ret; 401 402 lan78xx_start_tx_path(udev); 403 lan78xx_start_rx_path(udev); 404 405 return lan78xx_update_flowcontrol(udev, &priv->ueth); 406 } 407 408 int lan78xx_read_rom_hwaddr(struct udevice *dev) 409 { 410 struct usb_device *udev = dev_get_parent_priv(dev); 411 struct eth_pdata *pdata = dev_get_platdata(dev); 412 struct lan7x_private *priv = dev_get_priv(dev); 413 int ret; 414 415 ret = lan78xx_read_mac(pdata->enetaddr, udev, priv); 416 if (ret) 417 memset(pdata->enetaddr, 0, 6); 418 419 return 0; 420 } 421 422 static int lan78xx_eth_probe(struct udevice *dev) 423 { 424 struct usb_device *udev = dev_get_parent_priv(dev); 425 struct lan7x_private *priv = dev_get_priv(dev); 426 struct ueth_data *ueth = &priv->ueth; 427 struct eth_pdata *pdata = dev_get_platdata(dev); 428 int ret; 429 430 /* Do a reset in order to get the MAC address from HW */ 431 if (lan78xx_basic_reset(udev, ueth, priv)) 432 return 0; 433 434 /* Get the MAC address */ 435 /* 436 * We must set the eth->enetaddr from HW because the upper layer 437 * will force to use the environmental var (usbethaddr) or random if 438 * there is no valid MAC address in eth->enetaddr. 439 */ 440 lan78xx_read_mac(pdata->enetaddr, udev, priv); 441 /* Do not return 0 for not finding MAC addr in HW */ 442 443 ret = usb_ether_register(dev, ueth, RX_URB_SIZE); 444 if (ret) 445 return ret; 446 447 /* Register phylib */ 448 return lan7x_phylib_register(dev); 449 } 450 451 static const struct eth_ops lan78xx_eth_ops = { 452 .start = lan78xx_eth_start, 453 .send = lan7x_eth_send, 454 .recv = lan7x_eth_recv, 455 .free_pkt = lan7x_free_pkt, 456 .stop = lan7x_eth_stop, 457 .write_hwaddr = lan78xx_write_hwaddr, 458 .read_rom_hwaddr = lan78xx_read_rom_hwaddr, 459 }; 460 461 U_BOOT_DRIVER(lan78xx_eth) = { 462 .name = "lan78xx_eth", 463 .id = UCLASS_ETH, 464 .probe = lan78xx_eth_probe, 465 .remove = lan7x_eth_remove, 466 .ops = &lan78xx_eth_ops, 467 .priv_auto_alloc_size = sizeof(struct lan7x_private), 468 .platdata_auto_alloc_size = sizeof(struct eth_pdata), 469 }; 470 471 static const struct usb_device_id lan78xx_eth_id_table[] = { 472 { USB_DEVICE(0x0424, 0x7800) }, /* LAN7800 USB Ethernet */ 473 { USB_DEVICE(0x0424, 0x7850) }, /* LAN7850 USB Ethernet */ 474 { } /* Terminating entry */ 475 }; 476 477 U_BOOT_USB_DEVICE(lan78xx_eth, lan78xx_eth_id_table); 478