1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (c) 2017 Microchip Technology Inc. All rights reserved. 4 */ 5 6 #include <dm.h> 7 #include <usb.h> 8 #include <linux/mii.h> 9 #include "usb_ether.h" 10 #include "lan7x.h" 11 12 /* LAN75xx specific register/bit defines */ 13 #define LAN75XX_HW_CFG_BIR BIT(7) 14 15 #define LAN75XX_BURST_CAP 0x034 16 17 #define LAN75XX_BULK_IN_DLY 0x03C 18 19 #define LAN75XX_RFE_CTL 0x060 20 21 #define LAN75XX_FCT_RX_CTL 0x090 22 23 #define LAN75XX_FCT_TX_CTL 0x094 24 25 #define LAN75XX_FCT_RX_FIFO_END 0x098 26 27 #define LAN75XX_FCT_TX_FIFO_END 0x09C 28 29 #define LAN75XX_FCT_FLOW 0x0A0 30 31 /* MAC ADDRESS PERFECT FILTER For LAN75xx */ 32 #define LAN75XX_ADDR_FILTX 0x300 33 #define LAN75XX_ADDR_FILTX_FB_VALID BIT(31) 34 35 /* 36 * Lan75xx infrastructure commands 37 */ 38 static int lan75xx_phy_gig_workaround(struct usb_device *udev, 39 struct ueth_data *dev) 40 { 41 int ret = 0; 42 43 /* Only internal phy */ 44 /* Set the phy in Gig loopback */ 45 lan7x_mdio_write(udev, dev->phy_id, MII_BMCR, 46 (BMCR_LOOPBACK | BMCR_SPEED1000)); 47 48 /* Wait for the link up */ 49 ret = lan7x_mdio_wait_for_bit(udev, "BMSR_LSTATUS", 50 dev->phy_id, MII_BMSR, BMSR_LSTATUS, 51 true, PHY_CONNECT_TIMEOUT_MS, 1); 52 if (ret) 53 return ret; 54 55 /* phy reset */ 56 return lan7x_pmt_phy_reset(udev, dev); 57 } 58 59 static int lan75xx_update_flowcontrol(struct usb_device *udev, 60 struct ueth_data *dev) 61 { 62 uint32_t flow = 0, fct_flow = 0; 63 int ret; 64 65 ret = lan7x_update_flowcontrol(udev, dev, &flow, &fct_flow); 66 if (ret) 67 return ret; 68 69 ret = lan7x_write_reg(udev, LAN75XX_FCT_FLOW, fct_flow); 70 if (ret) 71 return ret; 72 return lan7x_write_reg(udev, FLOW, flow); 73 } 74 75 static int lan75xx_set_receive_filter(struct usb_device *udev) 76 { 77 /* No multicast in u-boot */ 78 return lan7x_write_reg(udev, LAN75XX_RFE_CTL, 79 RFE_CTL_BCAST_EN | RFE_CTL_DA_PERFECT); 80 } 81 82 /* starts the TX path */ 83 static void lan75xx_start_tx_path(struct usb_device *udev) 84 { 85 /* Enable Tx at MAC */ 86 lan7x_write_reg(udev, MAC_TX, MAC_TX_TXEN); 87 88 /* Enable Tx at SCSRs */ 89 lan7x_write_reg(udev, LAN75XX_FCT_TX_CTL, FCT_TX_CTL_EN); 90 } 91 92 /* Starts the Receive path */ 93 static void lan75xx_start_rx_path(struct usb_device *udev) 94 { 95 /* Enable Rx at MAC */ 96 lan7x_write_reg(udev, MAC_RX, 97 LAN7X_MAC_RX_MAX_SIZE_DEFAULT | 98 MAC_RX_FCS_STRIP | MAC_RX_RXEN); 99 100 /* Enable Rx at SCSRs */ 101 lan7x_write_reg(udev, LAN75XX_FCT_RX_CTL, FCT_RX_CTL_EN); 102 } 103 104 static int lan75xx_basic_reset(struct usb_device *udev, 105 struct ueth_data *dev, 106 struct lan7x_private *priv) 107 { 108 int ret; 109 u32 val; 110 111 ret = lan7x_basic_reset(udev, dev); 112 if (ret) 113 return ret; 114 115 /* Keep the chip ID */ 116 ret = lan7x_read_reg(udev, ID_REV, &val); 117 if (ret) 118 return ret; 119 debug("LAN75xx ID_REV = 0x%08x\n", val); 120 121 priv->chipid = (val & ID_REV_CHIP_ID_MASK) >> 16; 122 123 /* Respond to the IN token with a NAK */ 124 ret = lan7x_read_reg(udev, HW_CFG, &val); 125 if (ret) 126 return ret; 127 val |= LAN75XX_HW_CFG_BIR; 128 return lan7x_write_reg(udev, HW_CFG, val); 129 } 130 131 int lan75xx_write_hwaddr(struct udevice *dev) 132 { 133 struct usb_device *udev = dev_get_parent_priv(dev); 134 struct eth_pdata *pdata = dev_get_platdata(dev); 135 unsigned char *enetaddr = pdata->enetaddr; 136 u32 addr_lo = get_unaligned_le32(&enetaddr[0]); 137 u32 addr_hi = (u32)get_unaligned_le16(&enetaddr[4]); 138 int ret; 139 140 /* set hardware address */ 141 ret = lan7x_write_reg(udev, RX_ADDRL, addr_lo); 142 if (ret) 143 return ret; 144 145 ret = lan7x_write_reg(udev, RX_ADDRH, addr_hi); 146 if (ret) 147 return ret; 148 149 ret = lan7x_write_reg(udev, LAN75XX_ADDR_FILTX + 4, addr_lo); 150 if (ret) 151 return ret; 152 153 addr_hi |= LAN75XX_ADDR_FILTX_FB_VALID; 154 ret = lan7x_write_reg(udev, LAN75XX_ADDR_FILTX, addr_hi); 155 if (ret) 156 return ret; 157 158 debug("MAC addr %pM written\n", enetaddr); 159 160 return 0; 161 } 162 163 static int lan75xx_eth_start(struct udevice *dev) 164 { 165 struct usb_device *udev = dev_get_parent_priv(dev); 166 struct lan7x_private *priv = dev_get_priv(dev); 167 struct ueth_data *ueth = &priv->ueth; 168 int ret; 169 u32 write_buf; 170 171 /* Reset and read Mac addr were done in probe() */ 172 ret = lan75xx_write_hwaddr(dev); 173 if (ret) 174 return ret; 175 176 ret = lan7x_write_reg(udev, INT_STS, 0xFFFFFFFF); 177 if (ret) 178 return ret; 179 180 ret = lan7x_write_reg(udev, LAN75XX_BURST_CAP, 0); 181 if (ret) 182 return ret; 183 184 ret = lan7x_write_reg(udev, LAN75XX_BULK_IN_DLY, DEFAULT_BULK_IN_DELAY); 185 if (ret) 186 return ret; 187 188 /* set FIFO sizes */ 189 write_buf = (MAX_RX_FIFO_SIZE - 512) / 512; 190 ret = lan7x_write_reg(udev, LAN75XX_FCT_RX_FIFO_END, write_buf); 191 if (ret) 192 return ret; 193 194 write_buf = (MAX_TX_FIFO_SIZE - 512) / 512; 195 ret = lan7x_write_reg(udev, LAN75XX_FCT_TX_FIFO_END, write_buf); 196 if (ret) 197 return ret; 198 199 /* Init Tx */ 200 ret = lan7x_write_reg(udev, FLOW, 0); 201 if (ret) 202 return ret; 203 204 /* Init Rx. Set Vlan, keep default for VLAN on 75xx */ 205 ret = lan75xx_set_receive_filter(udev); 206 if (ret) 207 return ret; 208 209 /* phy workaround for gig link */ 210 ret = lan75xx_phy_gig_workaround(udev, ueth); 211 if (ret) 212 return ret; 213 214 /* Init PHY, autonego, and link */ 215 ret = lan7x_eth_phylib_connect(dev, &priv->ueth); 216 if (ret) 217 return ret; 218 ret = lan7x_eth_phylib_config_start(dev); 219 if (ret) 220 return ret; 221 222 /* 223 * MAC_CR has to be set after PHY init. 224 * MAC will auto detect the PHY speed. 225 */ 226 ret = lan7x_read_reg(udev, MAC_CR, &write_buf); 227 if (ret) 228 return ret; 229 write_buf |= MAC_CR_AUTO_DUPLEX | MAC_CR_AUTO_SPEED | MAC_CR_ADP; 230 ret = lan7x_write_reg(udev, MAC_CR, write_buf); 231 if (ret) 232 return ret; 233 234 lan75xx_start_tx_path(udev); 235 lan75xx_start_rx_path(udev); 236 237 return lan75xx_update_flowcontrol(udev, ueth); 238 } 239 240 int lan75xx_read_rom_hwaddr(struct udevice *dev) 241 { 242 struct usb_device *udev = dev_get_parent_priv(dev); 243 struct eth_pdata *pdata = dev_get_platdata(dev); 244 int ret; 245 246 /* 247 * Refer to the doc/README.enetaddr and doc/README.usb for 248 * the U-Boot MAC address policy 249 */ 250 ret = lan7x_read_eeprom_mac(pdata->enetaddr, udev); 251 if (ret) 252 memset(pdata->enetaddr, 0, 6); 253 254 return 0; 255 } 256 257 static int lan75xx_eth_probe(struct udevice *dev) 258 { 259 struct usb_device *udev = dev_get_parent_priv(dev); 260 struct lan7x_private *priv = dev_get_priv(dev); 261 struct ueth_data *ueth = &priv->ueth; 262 struct eth_pdata *pdata = dev_get_platdata(dev); 263 int ret; 264 265 /* Do a reset in order to get the MAC address from HW */ 266 if (lan75xx_basic_reset(udev, ueth, priv)) 267 return 0; 268 269 /* Get the MAC address */ 270 /* 271 * We must set the eth->enetaddr from HW because the upper layer 272 * will force to use the environmental var (usbethaddr) or random if 273 * there is no valid MAC address in eth->enetaddr. 274 * 275 * Refer to the doc/README.enetaddr and doc/README.usb for 276 * the U-Boot MAC address policy 277 */ 278 lan7x_read_eeprom_mac(pdata->enetaddr, udev); 279 /* Do not return 0 for not finding MAC addr in HW */ 280 281 ret = usb_ether_register(dev, ueth, RX_URB_SIZE); 282 if (ret) 283 return ret; 284 285 /* Register phylib */ 286 return lan7x_phylib_register(dev); 287 } 288 289 static const struct eth_ops lan75xx_eth_ops = { 290 .start = lan75xx_eth_start, 291 .send = lan7x_eth_send, 292 .recv = lan7x_eth_recv, 293 .free_pkt = lan7x_free_pkt, 294 .stop = lan7x_eth_stop, 295 .write_hwaddr = lan75xx_write_hwaddr, 296 .read_rom_hwaddr = lan75xx_read_rom_hwaddr, 297 }; 298 299 U_BOOT_DRIVER(lan75xx_eth) = { 300 .name = "lan75xx_eth", 301 .id = UCLASS_ETH, 302 .probe = lan75xx_eth_probe, 303 .remove = lan7x_eth_remove, 304 .ops = &lan75xx_eth_ops, 305 .priv_auto_alloc_size = sizeof(struct lan7x_private), 306 .platdata_auto_alloc_size = sizeof(struct eth_pdata), 307 }; 308 309 static const struct usb_device_id lan75xx_eth_id_table[] = { 310 { USB_DEVICE(0x0424, 0x7500) }, /* LAN7500 USB Ethernet */ 311 { } /* Terminating entry */ 312 }; 313 314 U_BOOT_USB_DEVICE(lan75xx_eth, lan75xx_eth_id_table); 315