1 /* 2 * Copyright (c) 2014 Rene Griessl <rgriessl@cit-ec.uni-bielefeld.de> 3 * based on the U-Boot Asix driver as well as information 4 * from the Linux AX88179_178a driver 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #include <common.h> 10 #include <dm.h> 11 #include <usb.h> 12 #include <net.h> 13 #include <linux/mii.h> 14 #include "usb_ether.h" 15 #include <malloc.h> 16 #include <memalign.h> 17 #include <errno.h> 18 19 /* ASIX AX88179 based USB 3.0 Ethernet Devices */ 20 #define AX88179_PHY_ID 0x03 21 #define AX_EEPROM_LEN 0x100 22 #define AX88179_EEPROM_MAGIC 0x17900b95 23 #define AX_MCAST_FLTSIZE 8 24 #define AX_MAX_MCAST 64 25 #define AX_INT_PPLS_LINK (1 << 16) 26 #define AX_RXHDR_L4_TYPE_MASK 0x1c 27 #define AX_RXHDR_L4_TYPE_UDP 4 28 #define AX_RXHDR_L4_TYPE_TCP 16 29 #define AX_RXHDR_L3CSUM_ERR 2 30 #define AX_RXHDR_L4CSUM_ERR 1 31 #define AX_RXHDR_CRC_ERR (1 << 29) 32 #define AX_RXHDR_DROP_ERR (1 << 31) 33 #define AX_ENDPOINT_INT 0x01 34 #define AX_ENDPOINT_IN 0x02 35 #define AX_ENDPOINT_OUT 0x03 36 #define AX_ACCESS_MAC 0x01 37 #define AX_ACCESS_PHY 0x02 38 #define AX_ACCESS_EEPROM 0x04 39 #define AX_ACCESS_EFUS 0x05 40 #define AX_PAUSE_WATERLVL_HIGH 0x54 41 #define AX_PAUSE_WATERLVL_LOW 0x55 42 43 #define PHYSICAL_LINK_STATUS 0x02 44 #define AX_USB_SS (1 << 2) 45 #define AX_USB_HS (1 << 1) 46 47 #define GENERAL_STATUS 0x03 48 #define AX_SECLD (1 << 2) 49 50 #define AX_SROM_ADDR 0x07 51 #define AX_SROM_CMD 0x0a 52 #define EEP_RD (1 << 2) 53 #define EEP_BUSY (1 << 4) 54 55 #define AX_SROM_DATA_LOW 0x08 56 #define AX_SROM_DATA_HIGH 0x09 57 58 #define AX_RX_CTL 0x0b 59 #define AX_RX_CTL_DROPCRCERR (1 << 8) 60 #define AX_RX_CTL_IPE (1 << 9) 61 #define AX_RX_CTL_START (1 << 7) 62 #define AX_RX_CTL_AP (1 << 5) 63 #define AX_RX_CTL_AM (1 << 4) 64 #define AX_RX_CTL_AB (1 << 3) 65 #define AX_RX_CTL_AMALL (1 << 1) 66 #define AX_RX_CTL_PRO (1 << 0) 67 #define AX_RX_CTL_STOP 0 68 69 #define AX_NODE_ID 0x10 70 #define AX_MULFLTARY 0x16 71 72 #define AX_MEDIUM_STATUS_MODE 0x22 73 #define AX_MEDIUM_GIGAMODE (1 << 0) 74 #define AX_MEDIUM_FULL_DUPLEX (1 << 1) 75 #define AX_MEDIUM_EN_125MHZ (1 << 3) 76 #define AX_MEDIUM_RXFLOW_CTRLEN (1 << 4) 77 #define AX_MEDIUM_TXFLOW_CTRLEN (1 << 5) 78 #define AX_MEDIUM_RECEIVE_EN (1 << 8) 79 #define AX_MEDIUM_PS (1 << 9) 80 #define AX_MEDIUM_JUMBO_EN 0x8040 81 82 #define AX_MONITOR_MOD 0x24 83 #define AX_MONITOR_MODE_RWLC (1 << 1) 84 #define AX_MONITOR_MODE_RWMP (1 << 2) 85 #define AX_MONITOR_MODE_PMEPOL (1 << 5) 86 #define AX_MONITOR_MODE_PMETYPE (1 << 6) 87 88 #define AX_GPIO_CTRL 0x25 89 #define AX_GPIO_CTRL_GPIO3EN (1 << 7) 90 #define AX_GPIO_CTRL_GPIO2EN (1 << 6) 91 #define AX_GPIO_CTRL_GPIO1EN (1 << 5) 92 93 #define AX_PHYPWR_RSTCTL 0x26 94 #define AX_PHYPWR_RSTCTL_BZ (1 << 4) 95 #define AX_PHYPWR_RSTCTL_IPRL (1 << 5) 96 #define AX_PHYPWR_RSTCTL_AT (1 << 12) 97 98 #define AX_RX_BULKIN_QCTRL 0x2e 99 #define AX_CLK_SELECT 0x33 100 #define AX_CLK_SELECT_BCS (1 << 0) 101 #define AX_CLK_SELECT_ACS (1 << 1) 102 #define AX_CLK_SELECT_ULR (1 << 3) 103 104 #define AX_RXCOE_CTL 0x34 105 #define AX_RXCOE_IP (1 << 0) 106 #define AX_RXCOE_TCP (1 << 1) 107 #define AX_RXCOE_UDP (1 << 2) 108 #define AX_RXCOE_TCPV6 (1 << 5) 109 #define AX_RXCOE_UDPV6 (1 << 6) 110 111 #define AX_TXCOE_CTL 0x35 112 #define AX_TXCOE_IP (1 << 0) 113 #define AX_TXCOE_TCP (1 << 1) 114 #define AX_TXCOE_UDP (1 << 2) 115 #define AX_TXCOE_TCPV6 (1 << 5) 116 #define AX_TXCOE_UDPV6 (1 << 6) 117 118 #define AX_LEDCTRL 0x73 119 120 #define GMII_PHY_PHYSR 0x11 121 #define GMII_PHY_PHYSR_SMASK 0xc000 122 #define GMII_PHY_PHYSR_GIGA (1 << 15) 123 #define GMII_PHY_PHYSR_100 (1 << 14) 124 #define GMII_PHY_PHYSR_FULL (1 << 13) 125 #define GMII_PHY_PHYSR_LINK (1 << 10) 126 127 #define GMII_LED_ACT 0x1a 128 #define GMII_LED_ACTIVE_MASK 0xff8f 129 #define GMII_LED0_ACTIVE (1 << 4) 130 #define GMII_LED1_ACTIVE (1 << 5) 131 #define GMII_LED2_ACTIVE (1 << 6) 132 133 #define GMII_LED_LINK 0x1c 134 #define GMII_LED_LINK_MASK 0xf888 135 #define GMII_LED0_LINK_10 (1 << 0) 136 #define GMII_LED0_LINK_100 (1 << 1) 137 #define GMII_LED0_LINK_1000 (1 << 2) 138 #define GMII_LED1_LINK_10 (1 << 4) 139 #define GMII_LED1_LINK_100 (1 << 5) 140 #define GMII_LED1_LINK_1000 (1 << 6) 141 #define GMII_LED2_LINK_10 (1 << 8) 142 #define GMII_LED2_LINK_100 (1 << 9) 143 #define GMII_LED2_LINK_1000 (1 << 10) 144 #define LED0_ACTIVE (1 << 0) 145 #define LED0_LINK_10 (1 << 1) 146 #define LED0_LINK_100 (1 << 2) 147 #define LED0_LINK_1000 (1 << 3) 148 #define LED0_FD (1 << 4) 149 #define LED0_USB3_MASK 0x001f 150 #define LED1_ACTIVE (1 << 5) 151 #define LED1_LINK_10 (1 << 6) 152 #define LED1_LINK_100 (1 << 7) 153 #define LED1_LINK_1000 (1 << 8) 154 #define LED1_FD (1 << 9) 155 #define LED1_USB3_MASK 0x03e0 156 #define LED2_ACTIVE (1 << 10) 157 #define LED2_LINK_1000 (1 << 13) 158 #define LED2_LINK_100 (1 << 12) 159 #define LED2_LINK_10 (1 << 11) 160 #define LED2_FD (1 << 14) 161 #define LED_VALID (1 << 15) 162 #define LED2_USB3_MASK 0x7c00 163 164 #define GMII_PHYPAGE 0x1e 165 #define GMII_PHY_PAGE_SELECT 0x1f 166 #define GMII_PHY_PGSEL_EXT 0x0007 167 #define GMII_PHY_PGSEL_PAGE0 0x0000 168 169 /* local defines */ 170 #define ASIX_BASE_NAME "axg" 171 #define USB_CTRL_SET_TIMEOUT 5000 172 #define USB_CTRL_GET_TIMEOUT 5000 173 #define USB_BULK_SEND_TIMEOUT 5000 174 #define USB_BULK_RECV_TIMEOUT 5000 175 176 #define AX_RX_URB_SIZE 1024 * 0x12 177 #define BLK_FRAME_SIZE 0x200 178 #define PHY_CONNECT_TIMEOUT 5000 179 180 #define TIMEOUT_RESOLUTION 50 /* ms */ 181 182 #define FLAG_NONE 0 183 #define FLAG_TYPE_AX88179 (1U << 0) 184 #define FLAG_TYPE_AX88178a (1U << 1) 185 #define FLAG_TYPE_DLINK_DUB1312 (1U << 2) 186 #define FLAG_TYPE_SITECOM (1U << 3) 187 #define FLAG_TYPE_SAMSUNG (1U << 4) 188 #define FLAG_TYPE_LENOVO (1U << 5) 189 #define FLAG_TYPE_GX3 (1U << 6) 190 191 /* local vars */ 192 static const struct { 193 unsigned char ctrl, timer_l, timer_h, size, ifg; 194 } AX88179_BULKIN_SIZE[] = { 195 {7, 0x4f, 0, 0x02, 0xff}, 196 {7, 0x20, 3, 0x03, 0xff}, 197 {7, 0xae, 7, 0x04, 0xff}, 198 {7, 0xcc, 0x4c, 0x04, 8}, 199 }; 200 201 #ifndef CONFIG_DM_ETH 202 static int curr_eth_dev; /* index for name of next device detected */ 203 #endif 204 205 /* driver private */ 206 struct asix_private { 207 #ifdef CONFIG_DM_ETH 208 struct ueth_data ueth; 209 unsigned pkt_cnt; 210 uint8_t *pkt_data; 211 uint32_t *pkt_hdr; 212 #endif 213 int flags; 214 int rx_urb_size; 215 int maxpacketsize; 216 }; 217 218 /* 219 * Asix infrastructure commands 220 */ 221 static int asix_write_cmd(struct ueth_data *dev, u8 cmd, u16 value, u16 index, 222 u16 size, void *data) 223 { 224 int len; 225 ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buf, size); 226 227 debug("asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n", 228 cmd, value, index, size); 229 230 memcpy(buf, data, size); 231 232 len = usb_control_msg( 233 dev->pusb_dev, 234 usb_sndctrlpipe(dev->pusb_dev, 0), 235 cmd, 236 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 237 value, 238 index, 239 buf, 240 size, 241 USB_CTRL_SET_TIMEOUT); 242 243 return len == size ? 0 : ECOMM; 244 } 245 246 static int asix_read_cmd(struct ueth_data *dev, u8 cmd, u16 value, u16 index, 247 u16 size, void *data) 248 { 249 int len; 250 ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buf, size); 251 252 debug("asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n", 253 cmd, value, index, size); 254 255 len = usb_control_msg( 256 dev->pusb_dev, 257 usb_rcvctrlpipe(dev->pusb_dev, 0), 258 cmd, 259 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 260 value, 261 index, 262 buf, 263 size, 264 USB_CTRL_GET_TIMEOUT); 265 266 memcpy(data, buf, size); 267 268 return len == size ? 0 : ECOMM; 269 } 270 271 static int asix_read_mac(struct ueth_data *dev, uint8_t *enetaddr) 272 { 273 int ret; 274 275 ret = asix_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, 6, 6, enetaddr); 276 if (ret < 0) 277 debug("Failed to read MAC address: %02x\n", ret); 278 279 return ret; 280 } 281 282 static int asix_write_mac(struct ueth_data *dev, uint8_t *enetaddr) 283 { 284 int ret; 285 286 ret = asix_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN, 287 ETH_ALEN, enetaddr); 288 if (ret < 0) 289 debug("Failed to set MAC address: %02x\n", ret); 290 291 return ret; 292 } 293 294 static int asix_basic_reset(struct ueth_data *dev, 295 struct asix_private *dev_priv) 296 { 297 u8 buf[5]; 298 u16 *tmp16; 299 u8 *tmp; 300 301 tmp16 = (u16 *)buf; 302 tmp = (u8 *)buf; 303 304 /* Power up ethernet PHY */ 305 *tmp16 = 0; 306 asix_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16); 307 308 *tmp16 = AX_PHYPWR_RSTCTL_IPRL; 309 asix_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16); 310 mdelay(200); 311 312 *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS; 313 asix_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp); 314 mdelay(200); 315 316 /* RX bulk configuration */ 317 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5); 318 asix_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp); 319 320 dev_priv->rx_urb_size = 128 * 20; 321 322 /* Water Level configuration */ 323 *tmp = 0x34; 324 asix_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp); 325 326 *tmp = 0x52; 327 asix_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH, 1, 1, tmp); 328 329 /* Enable checksum offload */ 330 *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP | 331 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6; 332 asix_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp); 333 334 *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP | 335 AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6; 336 asix_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp); 337 338 /* Configure RX control register => start operation */ 339 *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START | 340 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB; 341 asix_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16); 342 343 *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL | 344 AX_MONITOR_MODE_RWMP; 345 asix_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp); 346 347 /* Configure default medium type => giga */ 348 *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN | 349 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX | 350 AX_MEDIUM_GIGAMODE | AX_MEDIUM_JUMBO_EN; 351 asix_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, tmp16); 352 353 u16 adv = 0; 354 adv = ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_LPACK | 355 ADVERTISE_NPAGE | ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP; 356 asix_write_cmd(dev, AX_ACCESS_PHY, 0x03, MII_ADVERTISE, 2, &adv); 357 358 adv = ADVERTISE_1000FULL; 359 asix_write_cmd(dev, AX_ACCESS_PHY, 0x03, MII_CTRL1000, 2, &adv); 360 361 return 0; 362 } 363 364 static int asix_wait_link(struct ueth_data *dev) 365 { 366 int timeout = 0; 367 int link_detected; 368 u8 buf[2]; 369 u16 *tmp16; 370 371 tmp16 = (u16 *)buf; 372 373 do { 374 asix_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, 375 MII_BMSR, 2, buf); 376 link_detected = *tmp16 & BMSR_LSTATUS; 377 if (!link_detected) { 378 if (timeout == 0) 379 printf("Waiting for Ethernet connection... "); 380 mdelay(TIMEOUT_RESOLUTION); 381 timeout += TIMEOUT_RESOLUTION; 382 } 383 } while (!link_detected && timeout < PHY_CONNECT_TIMEOUT); 384 385 if (link_detected) { 386 if (timeout > 0) 387 printf("done.\n"); 388 return 0; 389 } else { 390 printf("unable to connect.\n"); 391 return -ENETUNREACH; 392 } 393 } 394 395 static int asix_init_common(struct ueth_data *dev, 396 struct asix_private *dev_priv) 397 { 398 u8 buf[2], tmp[5], link_sts; 399 u16 *tmp16, mode; 400 401 402 tmp16 = (u16 *)buf; 403 404 debug("** %s()\n", __func__); 405 406 /* Configure RX control register => start operation */ 407 *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START | 408 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB; 409 if (asix_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16) != 0) 410 goto out_err; 411 412 if (asix_wait_link(dev) != 0) { 413 /*reset device and try again*/ 414 printf("Reset Ethernet Device\n"); 415 asix_basic_reset(dev, dev_priv); 416 if (asix_wait_link(dev) != 0) 417 goto out_err; 418 } 419 420 /* Configure link */ 421 mode = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN | 422 AX_MEDIUM_RXFLOW_CTRLEN; 423 424 asix_read_cmd(dev, AX_ACCESS_MAC, PHYSICAL_LINK_STATUS, 425 1, 1, &link_sts); 426 427 asix_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, 428 GMII_PHY_PHYSR, 2, tmp16); 429 430 if (!(*tmp16 & GMII_PHY_PHYSR_LINK)) { 431 return 0; 432 } else if (GMII_PHY_PHYSR_GIGA == (*tmp16 & GMII_PHY_PHYSR_SMASK)) { 433 mode |= AX_MEDIUM_GIGAMODE | AX_MEDIUM_EN_125MHZ | 434 AX_MEDIUM_JUMBO_EN; 435 436 if (link_sts & AX_USB_SS) 437 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5); 438 else if (link_sts & AX_USB_HS) 439 memcpy(tmp, &AX88179_BULKIN_SIZE[1], 5); 440 else 441 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5); 442 } else if (GMII_PHY_PHYSR_100 == (*tmp16 & GMII_PHY_PHYSR_SMASK)) { 443 mode |= AX_MEDIUM_PS; 444 445 if (link_sts & (AX_USB_SS | AX_USB_HS)) 446 memcpy(tmp, &AX88179_BULKIN_SIZE[2], 5); 447 else 448 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5); 449 } else { 450 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5); 451 } 452 453 /* RX bulk configuration */ 454 asix_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp); 455 456 dev_priv->rx_urb_size = (1024 * (tmp[3] + 2)); 457 if (*tmp16 & GMII_PHY_PHYSR_FULL) 458 mode |= AX_MEDIUM_FULL_DUPLEX; 459 asix_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 460 2, 2, &mode); 461 462 return 0; 463 out_err: 464 return -1; 465 } 466 467 static int asix_send_common(struct ueth_data *dev, 468 struct asix_private *dev_priv, 469 void *packet, int length) 470 { 471 int err; 472 u32 packet_len, tx_hdr2; 473 int actual_len, framesize; 474 ALLOC_CACHE_ALIGN_BUFFER(unsigned char, msg, 475 PKTSIZE + (2 * sizeof(packet_len))); 476 477 debug("** %s(), len %d\n", __func__, length); 478 479 packet_len = length; 480 cpu_to_le32s(&packet_len); 481 482 memcpy(msg, &packet_len, sizeof(packet_len)); 483 framesize = dev_priv->maxpacketsize; 484 tx_hdr2 = 0; 485 if (((length + 8) % framesize) == 0) 486 tx_hdr2 |= 0x80008000; /* Enable padding */ 487 488 cpu_to_le32s(&tx_hdr2); 489 490 memcpy(msg + sizeof(packet_len), &tx_hdr2, sizeof(tx_hdr2)); 491 492 memcpy(msg + sizeof(packet_len) + sizeof(tx_hdr2), 493 (void *)packet, length); 494 495 err = usb_bulk_msg(dev->pusb_dev, 496 usb_sndbulkpipe(dev->pusb_dev, dev->ep_out), 497 (void *)msg, 498 length + sizeof(packet_len) + sizeof(tx_hdr2), 499 &actual_len, 500 USB_BULK_SEND_TIMEOUT); 501 debug("Tx: len = %zu, actual = %u, err = %d\n", 502 length + sizeof(packet_len), actual_len, err); 503 504 return err; 505 } 506 507 #ifndef CONFIG_DM_ETH 508 /* 509 * Asix callbacks 510 */ 511 static int asix_init(struct eth_device *eth, bd_t *bd) 512 { 513 struct ueth_data *dev = (struct ueth_data *)eth->priv; 514 struct asix_private *dev_priv = (struct asix_private *)dev->dev_priv; 515 516 return asix_init_common(dev, dev_priv); 517 } 518 519 static int asix_write_hwaddr(struct eth_device *eth) 520 { 521 struct ueth_data *dev = (struct ueth_data *)eth->priv; 522 523 return asix_write_mac(dev, eth->enetaddr); 524 } 525 526 static int asix_send(struct eth_device *eth, void *packet, int length) 527 { 528 struct ueth_data *dev = (struct ueth_data *)eth->priv; 529 struct asix_private *dev_priv = (struct asix_private *)dev->dev_priv; 530 531 return asix_send_common(dev, dev_priv, packet, length); 532 } 533 534 static int asix_recv(struct eth_device *eth) 535 { 536 struct ueth_data *dev = (struct ueth_data *)eth->priv; 537 struct asix_private *dev_priv = (struct asix_private *)dev->dev_priv; 538 539 u16 frame_pos; 540 int err; 541 int actual_len; 542 543 int pkt_cnt; 544 u32 rx_hdr; 545 u16 hdr_off; 546 u32 *pkt_hdr; 547 ALLOC_CACHE_ALIGN_BUFFER(u8, recv_buf, dev_priv->rx_urb_size); 548 549 actual_len = -1; 550 551 debug("** %s()\n", __func__); 552 553 err = usb_bulk_msg(dev->pusb_dev, 554 usb_rcvbulkpipe(dev->pusb_dev, dev->ep_in), 555 (void *)recv_buf, 556 dev_priv->rx_urb_size, 557 &actual_len, 558 USB_BULK_RECV_TIMEOUT); 559 debug("Rx: len = %u, actual = %u, err = %d\n", dev_priv->rx_urb_size, 560 actual_len, err); 561 562 if (err != 0) { 563 debug("Rx: failed to receive\n"); 564 return -ECOMM; 565 } 566 if (actual_len > dev_priv->rx_urb_size) { 567 debug("Rx: received too many bytes %d\n", actual_len); 568 return -EMSGSIZE; 569 } 570 571 572 rx_hdr = *(u32 *)(recv_buf + actual_len - 4); 573 le32_to_cpus(&rx_hdr); 574 575 pkt_cnt = (u16)rx_hdr; 576 hdr_off = (u16)(rx_hdr >> 16); 577 pkt_hdr = (u32 *)(recv_buf + hdr_off); 578 579 580 frame_pos = 0; 581 582 while (pkt_cnt--) { 583 u16 pkt_len; 584 585 le32_to_cpus(pkt_hdr); 586 pkt_len = (*pkt_hdr >> 16) & 0x1fff; 587 588 frame_pos += 2; 589 590 net_process_received_packet(recv_buf + frame_pos, pkt_len); 591 592 pkt_hdr++; 593 frame_pos += ((pkt_len + 7) & 0xFFF8)-2; 594 595 if (pkt_cnt == 0) 596 return 0; 597 } 598 return err; 599 } 600 601 static void asix_halt(struct eth_device *eth) 602 { 603 debug("** %s()\n", __func__); 604 } 605 606 /* 607 * Asix probing functions 608 */ 609 void ax88179_eth_before_probe(void) 610 { 611 curr_eth_dev = 0; 612 } 613 614 struct asix_dongle { 615 unsigned short vendor; 616 unsigned short product; 617 int flags; 618 }; 619 620 static const struct asix_dongle asix_dongles[] = { 621 { 0x0b95, 0x1790, FLAG_TYPE_AX88179 }, 622 { 0x0b95, 0x178a, FLAG_TYPE_AX88178a }, 623 { 0x2001, 0x4a00, FLAG_TYPE_DLINK_DUB1312 }, 624 { 0x0df6, 0x0072, FLAG_TYPE_SITECOM }, 625 { 0x04e8, 0xa100, FLAG_TYPE_SAMSUNG }, 626 { 0x17ef, 0x304b, FLAG_TYPE_LENOVO }, 627 { 0x04b4, 0x3610, FLAG_TYPE_GX3 }, 628 { 0x0000, 0x0000, FLAG_NONE } /* END - Do not remove */ 629 }; 630 631 /* Probe to see if a new device is actually an asix device */ 632 int ax88179_eth_probe(struct usb_device *dev, unsigned int ifnum, 633 struct ueth_data *ss) 634 { 635 struct usb_interface *iface; 636 struct usb_interface_descriptor *iface_desc; 637 struct asix_private *dev_priv; 638 int ep_in_found = 0, ep_out_found = 0; 639 int i; 640 641 /* let's examine the device now */ 642 iface = &dev->config.if_desc[ifnum]; 643 iface_desc = &dev->config.if_desc[ifnum].desc; 644 645 for (i = 0; asix_dongles[i].vendor != 0; i++) { 646 if (dev->descriptor.idVendor == asix_dongles[i].vendor && 647 dev->descriptor.idProduct == asix_dongles[i].product) 648 /* Found a supported dongle */ 649 break; 650 } 651 652 if (asix_dongles[i].vendor == 0) 653 return 0; 654 655 memset(ss, 0, sizeof(struct ueth_data)); 656 657 /* At this point, we know we've got a live one */ 658 debug("\n\nUSB Ethernet device detected: %#04x:%#04x\n", 659 dev->descriptor.idVendor, dev->descriptor.idProduct); 660 661 /* Initialize the ueth_data structure with some useful info */ 662 ss->ifnum = ifnum; 663 ss->pusb_dev = dev; 664 ss->subclass = iface_desc->bInterfaceSubClass; 665 ss->protocol = iface_desc->bInterfaceProtocol; 666 667 /* alloc driver private */ 668 ss->dev_priv = calloc(1, sizeof(struct asix_private)); 669 if (!ss->dev_priv) 670 return 0; 671 dev_priv = ss->dev_priv; 672 dev_priv->flags = asix_dongles[i].flags; 673 674 /* 675 * We are expecting a minimum of 3 endpoints - in, out (bulk), and 676 * int. We will ignore any others. 677 */ 678 for (i = 0; i < iface_desc->bNumEndpoints; i++) { 679 /* is it an interrupt endpoint? */ 680 if ((iface->ep_desc[i].bmAttributes & 681 USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_INT) { 682 ss->ep_int = iface->ep_desc[i].bEndpointAddress & 683 USB_ENDPOINT_NUMBER_MASK; 684 ss->irqinterval = iface->ep_desc[i].bInterval; 685 continue; 686 } 687 688 /* is it an BULK endpoint? */ 689 if (!((iface->ep_desc[i].bmAttributes & 690 USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_BULK)) 691 continue; 692 693 u8 ep_addr = iface->ep_desc[i].bEndpointAddress; 694 if ((ep_addr & USB_DIR_IN) && !ep_in_found) { 695 ss->ep_in = ep_addr & 696 USB_ENDPOINT_NUMBER_MASK; 697 ep_in_found = 1; 698 } 699 if (!(ep_addr & USB_DIR_IN) && !ep_out_found) { 700 ss->ep_out = ep_addr & 701 USB_ENDPOINT_NUMBER_MASK; 702 dev_priv->maxpacketsize = 703 dev->epmaxpacketout[AX_ENDPOINT_OUT]; 704 ep_out_found = 1; 705 } 706 } 707 debug("Endpoints In %d Out %d Int %d\n", 708 ss->ep_in, ss->ep_out, ss->ep_int); 709 710 /* Do some basic sanity checks, and bail if we find a problem */ 711 if (usb_set_interface(dev, iface_desc->bInterfaceNumber, 0) || 712 !ss->ep_in || !ss->ep_out || !ss->ep_int) { 713 debug("Problems with device\n"); 714 return 0; 715 } 716 dev->privptr = (void *)ss; 717 return 1; 718 } 719 720 int ax88179_eth_get_info(struct usb_device *dev, struct ueth_data *ss, 721 struct eth_device *eth) 722 { 723 struct asix_private *dev_priv = (struct asix_private *)ss->dev_priv; 724 725 if (!eth) { 726 debug("%s: missing parameter.\n", __func__); 727 return 0; 728 } 729 sprintf(eth->name, "%s%d", ASIX_BASE_NAME, curr_eth_dev++); 730 eth->init = asix_init; 731 eth->send = asix_send; 732 eth->recv = asix_recv; 733 eth->halt = asix_halt; 734 eth->write_hwaddr = asix_write_hwaddr; 735 eth->priv = ss; 736 737 if (asix_basic_reset(ss, dev_priv)) 738 return 0; 739 740 /* Get the MAC address */ 741 if (asix_read_mac(ss, eth->enetaddr)) 742 return 0; 743 debug("MAC %pM\n", eth->enetaddr); 744 745 return 1; 746 } 747 748 #else /* !CONFIG_DM_ETH */ 749 750 static int ax88179_eth_start(struct udevice *dev) 751 { 752 struct asix_private *priv = dev_get_priv(dev); 753 754 return asix_init_common(&priv->ueth, priv); 755 } 756 757 void ax88179_eth_stop(struct udevice *dev) 758 { 759 struct asix_private *priv = dev_get_priv(dev); 760 struct ueth_data *ueth = &priv->ueth; 761 762 debug("** %s()\n", __func__); 763 764 usb_ether_advance_rxbuf(ueth, -1); 765 priv->pkt_cnt = 0; 766 priv->pkt_data = NULL; 767 priv->pkt_hdr = NULL; 768 } 769 770 int ax88179_eth_send(struct udevice *dev, void *packet, int length) 771 { 772 struct asix_private *priv = dev_get_priv(dev); 773 774 return asix_send_common(&priv->ueth, priv, packet, length); 775 } 776 777 int ax88179_eth_recv(struct udevice *dev, int flags, uchar **packetp) 778 { 779 struct asix_private *priv = dev_get_priv(dev); 780 struct ueth_data *ueth = &priv->ueth; 781 int ret, len; 782 u16 pkt_len; 783 784 /* No packet left, get a new one */ 785 if (priv->pkt_cnt == 0) { 786 uint8_t *ptr; 787 u16 pkt_cnt; 788 u16 hdr_off; 789 u32 rx_hdr; 790 791 len = usb_ether_get_rx_bytes(ueth, &ptr); 792 debug("%s: first try, len=%d\n", __func__, len); 793 if (!len) { 794 if (!(flags & ETH_RECV_CHECK_DEVICE)) 795 return -EAGAIN; 796 797 ret = usb_ether_receive(ueth, priv->rx_urb_size); 798 if (ret < 0) 799 return ret; 800 801 len = usb_ether_get_rx_bytes(ueth, &ptr); 802 debug("%s: second try, len=%d\n", __func__, len); 803 } 804 805 if (len < 4) { 806 usb_ether_advance_rxbuf(ueth, -1); 807 return -EMSGSIZE; 808 } 809 810 rx_hdr = *(u32 *)(ptr + len - 4); 811 le32_to_cpus(&rx_hdr); 812 813 pkt_cnt = (u16)rx_hdr; 814 if (pkt_cnt == 0) { 815 usb_ether_advance_rxbuf(ueth, -1); 816 return 0; 817 } 818 819 hdr_off = (u16)(rx_hdr >> 16); 820 if (hdr_off > len - 4) { 821 usb_ether_advance_rxbuf(ueth, -1); 822 return -EIO; 823 } 824 825 priv->pkt_cnt = pkt_cnt; 826 priv->pkt_data = ptr; 827 priv->pkt_hdr = (u32 *)(ptr + hdr_off); 828 debug("%s: %d packets received, pkt header at %d\n", 829 __func__, (int)priv->pkt_cnt, (int)hdr_off); 830 } 831 832 le32_to_cpus(priv->pkt_hdr); 833 pkt_len = (*priv->pkt_hdr >> 16) & 0x1fff; 834 835 *packetp = priv->pkt_data + 2; 836 837 priv->pkt_data += (pkt_len + 7) & 0xFFF8; 838 priv->pkt_cnt--; 839 priv->pkt_hdr++; 840 841 debug("%s: return packet of %d bytes (%d packets left)\n", 842 __func__, (int)pkt_len, priv->pkt_cnt); 843 return pkt_len; 844 } 845 846 static int ax88179_free_pkt(struct udevice *dev, uchar *packet, int packet_len) 847 { 848 struct asix_private *priv = dev_get_priv(dev); 849 struct ueth_data *ueth = &priv->ueth; 850 851 if (priv->pkt_cnt == 0) 852 usb_ether_advance_rxbuf(ueth, -1); 853 854 return 0; 855 } 856 857 int ax88179_write_hwaddr(struct udevice *dev) 858 { 859 struct eth_pdata *pdata = dev_get_platdata(dev); 860 struct asix_private *priv = dev_get_priv(dev); 861 struct ueth_data *ueth = &priv->ueth; 862 863 return asix_write_mac(ueth, pdata->enetaddr); 864 } 865 866 static int ax88179_eth_probe(struct udevice *dev) 867 { 868 struct eth_pdata *pdata = dev_get_platdata(dev); 869 struct asix_private *priv = dev_get_priv(dev); 870 struct usb_device *usb_dev; 871 int ret; 872 873 priv->flags = dev->driver_data; 874 ret = usb_ether_register(dev, &priv->ueth, AX_RX_URB_SIZE); 875 if (ret) 876 return ret; 877 878 usb_dev = priv->ueth.pusb_dev; 879 priv->maxpacketsize = usb_dev->epmaxpacketout[AX_ENDPOINT_OUT]; 880 881 /* Get the MAC address */ 882 ret = asix_read_mac(&priv->ueth, pdata->enetaddr); 883 if (ret) 884 return ret; 885 debug("MAC %pM\n", pdata->enetaddr); 886 887 return 0; 888 } 889 890 static const struct eth_ops ax88179_eth_ops = { 891 .start = ax88179_eth_start, 892 .send = ax88179_eth_send, 893 .recv = ax88179_eth_recv, 894 .free_pkt = ax88179_free_pkt, 895 .stop = ax88179_eth_stop, 896 .write_hwaddr = ax88179_write_hwaddr, 897 }; 898 899 U_BOOT_DRIVER(ax88179_eth) = { 900 .name = "ax88179_eth", 901 .id = UCLASS_ETH, 902 .probe = ax88179_eth_probe, 903 .ops = &ax88179_eth_ops, 904 .priv_auto_alloc_size = sizeof(struct asix_private), 905 .platdata_auto_alloc_size = sizeof(struct eth_pdata), 906 }; 907 908 static const struct usb_device_id ax88179_eth_id_table[] = { 909 { USB_DEVICE(0x0b95, 0x1790), .driver_info = FLAG_TYPE_AX88179 }, 910 { USB_DEVICE(0x0b95, 0x178a), .driver_info = FLAG_TYPE_AX88178a }, 911 { USB_DEVICE(0x2001, 0x4a00), .driver_info = FLAG_TYPE_DLINK_DUB1312 }, 912 { USB_DEVICE(0x0df6, 0x0072), .driver_info = FLAG_TYPE_SITECOM }, 913 { USB_DEVICE(0x04e8, 0xa100), .driver_info = FLAG_TYPE_SAMSUNG }, 914 { USB_DEVICE(0x17ef, 0x304b), .driver_info = FLAG_TYPE_LENOVO }, 915 { USB_DEVICE(0x04b4, 0x3610), .driver_info = FLAG_TYPE_GX3 }, 916 { } /* Terminating entry */ 917 }; 918 919 U_BOOT_USB_DEVICE(ax88179_eth, ax88179_eth_id_table); 920 #endif /* !CONFIG_DM_ETH */ 921