xref: /openbmc/u-boot/drivers/timer/timer-uclass.c (revision 00a457b2)
1 /*
2  * Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <dm.h>
9 #include <errno.h>
10 #include <timer.h>
11 
12 DECLARE_GLOBAL_DATA_PTR;
13 
14 /*
15  * Implement a timer uclass to work with lib/time.c. The timer is usually
16  * a 32/64 bits free-running up counter. The get_rate() method is used to get
17  * the input clock frequency of the timer. The get_count() method is used
18  * to get the current 64 bits count value. If the hardware is counting down,
19  * the value should be inversed inside the method. There may be no real
20  * tick, and no timer interrupt.
21  */
22 
23 int timer_get_count(struct udevice *dev, u64 *count)
24 {
25 	const struct timer_ops *ops = device_get_ops(dev);
26 
27 	if (!ops->get_count)
28 		return -ENOSYS;
29 
30 	return ops->get_count(dev, count);
31 }
32 
33 unsigned long timer_get_rate(struct udevice *dev)
34 {
35 	struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
36 
37 	return uc_priv->clock_rate;
38 }
39 
40 static int timer_pre_probe(struct udevice *dev)
41 {
42 	struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
43 
44 	uc_priv->clock_rate = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
45 					     "clock-frequency", 0);
46 
47 	return 0;
48 }
49 
50 u64 timer_conv_64(u32 count)
51 {
52 	/* increment tbh if tbl has rolled over */
53 	if (count < gd->timebase_l)
54 		gd->timebase_h++;
55 	gd->timebase_l = count;
56 	return ((u64)gd->timebase_h << 32) | gd->timebase_l;
57 }
58 
59 UCLASS_DRIVER(timer) = {
60 	.id		= UCLASS_TIMER,
61 	.name		= "timer",
62 	.pre_probe	= timer_pre_probe,
63 	.per_device_auto_alloc_size = sizeof(struct timer_dev_priv),
64 };
65