xref: /openbmc/u-boot/drivers/timer/omap-timer.c (revision 82f29fd5)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * TI OMAP timer driver
4  *
5  * Copyright (C) 2015, Texas Instruments, Incorporated
6  */
7 
8 #include <common.h>
9 #include <dm.h>
10 #include <errno.h>
11 #include <timer.h>
12 #include <asm/io.h>
13 #include <asm/arch/clock.h>
14 
15 /* Timer register bits */
16 #define TCLR_START			BIT(0)	/* Start=1 */
17 #define TCLR_AUTO_RELOAD		BIT(1)	/* Auto reload */
18 #define TCLR_PRE_EN			BIT(5)	/* Pre-scaler enable */
19 #define TCLR_PTV_SHIFT			(2)	/* Pre-scaler shift value */
20 
21 #define TIMER_CLOCK             (V_SCLK / (2 << CONFIG_SYS_PTV))
22 
23 struct omap_gptimer_regs {
24 	unsigned int tidr;		/* offset 0x00 */
25 	unsigned char res1[12];
26 	unsigned int tiocp_cfg;		/* offset 0x10 */
27 	unsigned char res2[12];
28 	unsigned int tier;		/* offset 0x20 */
29 	unsigned int tistatr;		/* offset 0x24 */
30 	unsigned int tistat;		/* offset 0x28 */
31 	unsigned int tisr;		/* offset 0x2c */
32 	unsigned int tcicr;		/* offset 0x30 */
33 	unsigned int twer;		/* offset 0x34 */
34 	unsigned int tclr;		/* offset 0x38 */
35 	unsigned int tcrr;		/* offset 0x3c */
36 	unsigned int tldr;		/* offset 0x40 */
37 	unsigned int ttgr;		/* offset 0x44 */
38 	unsigned int twpc;		/* offset 0x48 */
39 	unsigned int tmar;		/* offset 0x4c */
40 	unsigned int tcar1;		/* offset 0x50 */
41 	unsigned int tscir;		/* offset 0x54 */
42 	unsigned int tcar2;		/* offset 0x58 */
43 };
44 
45 /* Omap Timer Priv */
46 struct omap_timer_priv {
47 	struct omap_gptimer_regs *regs;
48 };
49 
50 static int omap_timer_get_count(struct udevice *dev, u64 *count)
51 {
52 	struct omap_timer_priv *priv = dev_get_priv(dev);
53 
54 	*count = timer_conv_64(readl(&priv->regs->tcrr));
55 
56 	return 0;
57 }
58 
59 static int omap_timer_probe(struct udevice *dev)
60 {
61 	struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
62 	struct omap_timer_priv *priv = dev_get_priv(dev);
63 
64 	if (!uc_priv->clock_rate)
65 		uc_priv->clock_rate = TIMER_CLOCK;
66 
67 	/* start the counter ticking up, reload value on overflow */
68 	writel(0, &priv->regs->tldr);
69 	writel(0, &priv->regs->tcrr);
70 	/* enable timer */
71 	writel((CONFIG_SYS_PTV << 2) | TCLR_PRE_EN | TCLR_AUTO_RELOAD |
72 	       TCLR_START, &priv->regs->tclr);
73 
74 	return 0;
75 }
76 
77 static int omap_timer_ofdata_to_platdata(struct udevice *dev)
78 {
79 	struct omap_timer_priv *priv = dev_get_priv(dev);
80 
81 	priv->regs = map_physmem(devfdt_get_addr(dev),
82 				 sizeof(struct omap_gptimer_regs), MAP_NOCACHE);
83 
84 	return 0;
85 }
86 
87 
88 static const struct timer_ops omap_timer_ops = {
89 	.get_count = omap_timer_get_count,
90 };
91 
92 static const struct udevice_id omap_timer_ids[] = {
93 	{ .compatible = "ti,am335x-timer" },
94 	{ .compatible = "ti,am4372-timer" },
95 	{ .compatible = "ti,omap5430-timer" },
96 	{}
97 };
98 
99 U_BOOT_DRIVER(omap_timer) = {
100 	.name	= "omap_timer",
101 	.id	= UCLASS_TIMER,
102 	.of_match = omap_timer_ids,
103 	.ofdata_to_platdata = omap_timer_ofdata_to_platdata,
104 	.priv_auto_alloc_size = sizeof(struct omap_timer_priv),
105 	.probe = omap_timer_probe,
106 	.ops	= &omap_timer_ops,
107 	.flags = DM_FLAG_PRE_RELOC,
108 };
109