xref: /openbmc/u-boot/drivers/timer/altera_timer.c (revision 274bced8)
1 /*
2  * (C) Copyright 2000-2002
3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4  *
5  * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
6  * Scott McNutt <smcnutt@psyent.com>
7  *
8  * SPDX-License-Identifier:	GPL-2.0+
9  */
10 
11 #include <common.h>
12 #include <dm.h>
13 #include <errno.h>
14 #include <timer.h>
15 #include <asm/io.h>
16 
17 DECLARE_GLOBAL_DATA_PTR;
18 
19 /* control register */
20 #define ALTERA_TIMER_CONT	BIT(1)	/* Continuous mode */
21 #define ALTERA_TIMER_START	BIT(2)	/* Start timer */
22 #define ALTERA_TIMER_STOP	BIT(3)	/* Stop timer */
23 
24 struct altera_timer_regs {
25 	u32	status;		/* Timer status reg */
26 	u32	control;	/* Timer control reg */
27 	u32	periodl;	/* Timeout period low */
28 	u32	periodh;	/* Timeout period high */
29 	u32	snapl;		/* Snapshot low */
30 	u32	snaph;		/* Snapshot high */
31 };
32 
33 struct altera_timer_platdata {
34 	struct altera_timer_regs *regs;
35 };
36 
37 static int altera_timer_get_count(struct udevice *dev, u64 *count)
38 {
39 	struct altera_timer_platdata *plat = dev->platdata;
40 	struct altera_timer_regs *const regs = plat->regs;
41 	u32 val;
42 
43 	/* Trigger update */
44 	writel(0x0, &regs->snapl);
45 
46 	/* Read timer value */
47 	val = readl(&regs->snapl) & 0xffff;
48 	val |= (readl(&regs->snaph) & 0xffff) << 16;
49 	*count = timer_conv_64(~val);
50 
51 	return 0;
52 }
53 
54 static int altera_timer_probe(struct udevice *dev)
55 {
56 	struct altera_timer_platdata *plat = dev->platdata;
57 	struct altera_timer_regs *const regs = plat->regs;
58 
59 	writel(0, &regs->status);
60 	writel(0, &regs->control);
61 	writel(ALTERA_TIMER_STOP, &regs->control);
62 
63 	writel(0xffff, &regs->periodl);
64 	writel(0xffff, &regs->periodh);
65 	writel(ALTERA_TIMER_CONT | ALTERA_TIMER_START, &regs->control);
66 
67 	return 0;
68 }
69 
70 static int altera_timer_ofdata_to_platdata(struct udevice *dev)
71 {
72 	struct altera_timer_platdata *plat = dev_get_platdata(dev);
73 
74 	plat->regs = map_physmem(dev_get_addr(dev),
75 				 sizeof(struct altera_timer_regs),
76 				 MAP_NOCACHE);
77 
78 	return 0;
79 }
80 
81 static const struct timer_ops altera_timer_ops = {
82 	.get_count = altera_timer_get_count,
83 };
84 
85 static const struct udevice_id altera_timer_ids[] = {
86 	{ .compatible = "altr,timer-1.0" },
87 	{}
88 };
89 
90 U_BOOT_DRIVER(altera_timer) = {
91 	.name	= "altera_timer",
92 	.id	= UCLASS_TIMER,
93 	.of_match = altera_timer_ids,
94 	.ofdata_to_platdata = altera_timer_ofdata_to_platdata,
95 	.platdata_auto_alloc_size = sizeof(struct altera_timer_platdata),
96 	.probe = altera_timer_probe,
97 	.ops	= &altera_timer_ops,
98 	.flags = DM_FLAG_PRE_RELOC,
99 };
100