1 /*
2  * Copyright (C) 2015 Marvell International Ltd.
3  *
4  * Copyright (C) 2016 Stefan Roese <sr@denx.de>
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #include <common.h>
10 #include <dm.h>
11 #include <malloc.h>
12 #include <spi.h>
13 #include <wait_bit.h>
14 #include <asm/io.h>
15 
16 DECLARE_GLOBAL_DATA_PTR;
17 
18 #define MVEBU_SPI_A3700_XFER_RDY		BIT(1)
19 #define MVEBU_SPI_A3700_FIFO_FLUSH		BIT(9)
20 #define MVEBU_SPI_A3700_BYTE_LEN		BIT(5)
21 #define MVEBU_SPI_A3700_CLK_PHA			BIT(6)
22 #define MVEBU_SPI_A3700_CLK_POL			BIT(7)
23 #define MVEBU_SPI_A3700_FIFO_EN			BIT(17)
24 #define MVEBU_SPI_A3700_SPI_EN_0		BIT(16)
25 #define MVEBU_SPI_A3700_CLK_PRESCALE_BIT	0
26 #define MVEBU_SPI_A3700_CLK_PRESCALE_MASK	\
27 	(0x1f << MVEBU_SPI_A3700_CLK_PRESCALE_BIT)
28 
29 /* SPI registers */
30 struct spi_reg {
31 	u32 ctrl;	/* 0x10600 */
32 	u32 cfg;	/* 0x10604 */
33 	u32 dout;	/* 0x10608 */
34 	u32 din;	/* 0x1060c */
35 };
36 
37 struct mvebu_spi_platdata {
38 	struct spi_reg *spireg;
39 	unsigned int frequency;
40 	unsigned int clock;
41 };
42 
43 static void spi_cs_activate(struct spi_reg *reg, int cs)
44 {
45 	setbits_le32(&reg->ctrl, MVEBU_SPI_A3700_SPI_EN_0 << cs);
46 }
47 
48 static void spi_cs_deactivate(struct spi_reg *reg, int cs)
49 {
50 	clrbits_le32(&reg->ctrl, MVEBU_SPI_A3700_SPI_EN_0 << cs);
51 }
52 
53 /**
54  * spi_legacy_shift_byte() - triggers the real SPI transfer
55  * @bytelen:	Indicate how many bytes to transfer.
56  * @dout:	Buffer address of what to send.
57  * @din:	Buffer address of where to receive.
58  *
59  * This function triggers the real SPI transfer in legacy mode. It
60  * will shift out char buffer from @dout, and shift in char buffer to
61  * @din, if necessary.
62  *
63  * This function assumes that only one byte is shifted at one time.
64  * However, it is not its responisbility to set the transfer type to
65  * one-byte. Also, it does not guarantee that it will work if transfer
66  * type becomes two-byte. See spi_set_legacy() for details.
67  *
68  * In legacy mode, simply write to the SPI_DOUT register will trigger
69  * the transfer.
70  *
71  * If @dout == NULL, which means no actual data needs to be sent out,
72  * then the function will shift out 0x00 in order to shift in data.
73  * The XFER_RDY flag is checked every time before accessing SPI_DOUT
74  * and SPI_DIN register.
75  *
76  * The number of transfers to be triggerred is decided by @bytelen.
77  *
78  * Return:	0 - cool
79  *		-ETIMEDOUT - XFER_RDY flag timeout
80  */
81 static int spi_legacy_shift_byte(struct spi_reg *reg, unsigned int bytelen,
82 				 const void *dout, void *din)
83 {
84 	const u8 *dout_8;
85 	u8 *din_8;
86 	int ret;
87 
88 	/* Use 0x00 as dummy dout */
89 	const u8 dummy_dout = 0x0;
90 	u32 pending_dout = 0x0;
91 
92 	/* dout_8: pointer of current dout */
93 	dout_8 = dout;
94 	/* din_8: pointer of current din */
95 	din_8 = din;
96 
97 	while (bytelen) {
98 		ret = wait_for_bit_le32(&reg->ctrl,
99 					MVEBU_SPI_A3700_XFER_RDY,
100 					true,100, false);
101 		if (ret)
102 			return ret;
103 
104 		if (dout)
105 			pending_dout = (u32)*dout_8;
106 		else
107 			pending_dout = (u32)dummy_dout;
108 
109 		/* Trigger the xfer */
110 		writel(pending_dout, &reg->dout);
111 
112 		if (din) {
113 			ret = wait_for_bit_le32(&reg->ctrl,
114 						MVEBU_SPI_A3700_XFER_RDY,
115 						true, 100, false);
116 			if (ret)
117 				return ret;
118 
119 			/* Read what is transferred in */
120 			*din_8 = (u8)readl(&reg->din);
121 		}
122 
123 		/* Don't increment the current pointer if NULL */
124 		if (dout)
125 			dout_8++;
126 		if (din)
127 			din_8++;
128 
129 		bytelen--;
130 	}
131 
132 	return 0;
133 }
134 
135 static int mvebu_spi_xfer(struct udevice *dev, unsigned int bitlen,
136 			  const void *dout, void *din, unsigned long flags)
137 {
138 	struct udevice *bus = dev->parent;
139 	struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
140 	struct spi_reg *reg = plat->spireg;
141 	unsigned int bytelen;
142 	int ret;
143 
144 	bytelen = bitlen / 8;
145 
146 	if (dout && din)
147 		debug("This is a duplex transfer.\n");
148 
149 	/* Activate CS */
150 	if (flags & SPI_XFER_BEGIN) {
151 		debug("SPI: activate cs.\n");
152 		spi_cs_activate(reg, spi_chip_select(dev));
153 	}
154 
155 	/* Send and/or receive */
156 	if (dout || din) {
157 		ret = spi_legacy_shift_byte(reg, bytelen, dout, din);
158 		if (ret)
159 			return ret;
160 	}
161 
162 	/* Deactivate CS */
163 	if (flags & SPI_XFER_END) {
164 		ret = wait_for_bit_le32(&reg->ctrl,
165 					MVEBU_SPI_A3700_XFER_RDY,
166 					true, 100, false);
167 		if (ret)
168 			return ret;
169 
170 		debug("SPI: deactivate cs.\n");
171 		spi_cs_deactivate(reg, spi_chip_select(dev));
172 	}
173 
174 	return 0;
175 }
176 
177 static int mvebu_spi_set_speed(struct udevice *bus, uint hz)
178 {
179 	struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
180 	struct spi_reg *reg = plat->spireg;
181 	u32 data;
182 
183 	data = readl(&reg->cfg);
184 
185 	/* Set Prescaler */
186 	data &= ~MVEBU_SPI_A3700_CLK_PRESCALE_MASK;
187 
188 	/* Calculate Prescaler = (spi_input_freq / spi_max_freq) */
189 	if (hz > plat->frequency)
190 		hz = plat->frequency;
191 	data |= plat->clock / hz;
192 
193 	writel(data, &reg->cfg);
194 
195 	return 0;
196 }
197 
198 static int mvebu_spi_set_mode(struct udevice *bus, uint mode)
199 {
200 	struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
201 	struct spi_reg *reg = plat->spireg;
202 
203 	/*
204 	 * Set SPI polarity
205 	 * 0: Serial interface clock is low when inactive
206 	 * 1: Serial interface clock is high when inactive
207 	 */
208 	if (mode & SPI_CPOL)
209 		setbits_le32(&reg->cfg, MVEBU_SPI_A3700_CLK_POL);
210 	else
211 		clrbits_le32(&reg->cfg, MVEBU_SPI_A3700_CLK_POL);
212 	if (mode & SPI_CPHA)
213 		setbits_le32(&reg->cfg, MVEBU_SPI_A3700_CLK_PHA);
214 	else
215 		clrbits_le32(&reg->cfg, MVEBU_SPI_A3700_CLK_PHA);
216 
217 	return 0;
218 }
219 
220 static int mvebu_spi_probe(struct udevice *bus)
221 {
222 	struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
223 	struct spi_reg *reg = plat->spireg;
224 	u32 data;
225 	int ret;
226 
227 	/*
228 	 * Settings SPI controller to be working in legacy mode, which
229 	 * means use only DO pin (I/O 1) for Data Out, and DI pin (I/O 0)
230 	 * for Data In.
231 	 */
232 
233 	/* Flush read/write FIFO */
234 	data = readl(&reg->cfg);
235 	writel(data | MVEBU_SPI_A3700_FIFO_FLUSH, &reg->cfg);
236 	ret = wait_for_bit_le32(&reg->cfg, MVEBU_SPI_A3700_FIFO_FLUSH,
237 				false, 1000, false);
238 	if (ret)
239 		return ret;
240 
241 	/* Disable FIFO mode */
242 	data &= ~MVEBU_SPI_A3700_FIFO_EN;
243 
244 	/* Always shift 1 byte at a time */
245 	data &= ~MVEBU_SPI_A3700_BYTE_LEN;
246 
247 	writel(data, &reg->cfg);
248 
249 	return 0;
250 }
251 
252 static int mvebu_spi_ofdata_to_platdata(struct udevice *bus)
253 {
254 	struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
255 
256 	plat->spireg = (struct spi_reg *)devfdt_get_addr(bus);
257 
258 	/*
259 	 * FIXME
260 	 * Right now, mvebu does not have a clock infrastructure in U-Boot
261 	 * which should be used to query the input clock to the SPI
262 	 * controller. Once this clock driver is integrated into U-Boot
263 	 * it should be used to read the input clock and the DT property
264 	 * can be removed.
265 	 */
266 	plat->clock = fdtdec_get_int(gd->fdt_blob, dev_of_offset(bus),
267 				     "clock-frequency", 160000);
268 	plat->frequency = fdtdec_get_int(gd->fdt_blob, dev_of_offset(bus),
269 					 "spi-max-frequency", 40000);
270 
271 	return 0;
272 }
273 
274 static const struct dm_spi_ops mvebu_spi_ops = {
275 	.xfer		= mvebu_spi_xfer,
276 	.set_speed	= mvebu_spi_set_speed,
277 	.set_mode	= mvebu_spi_set_mode,
278 	/*
279 	 * cs_info is not needed, since we require all chip selects to be
280 	 * in the device tree explicitly
281 	 */
282 };
283 
284 static const struct udevice_id mvebu_spi_ids[] = {
285 	{ .compatible = "marvell,armada-3700-spi" },
286 	{ }
287 };
288 
289 U_BOOT_DRIVER(mvebu_spi) = {
290 	.name = "mvebu_spi",
291 	.id = UCLASS_SPI,
292 	.of_match = mvebu_spi_ids,
293 	.ops = &mvebu_spi_ops,
294 	.ofdata_to_platdata = mvebu_spi_ofdata_to_platdata,
295 	.platdata_auto_alloc_size = sizeof(struct mvebu_spi_platdata),
296 	.probe = mvebu_spi_probe,
297 };
298