1 /* 2 * Copyright (c) 2006 Ben Warren, Qstreams Networks Inc. 3 * With help from the common/soft_spi and cpu/mpc8260 drivers 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24 #include <common.h> 25 #if defined(CONFIG_MPC8XXX_SPI) && defined(CONFIG_HARD_SPI) 26 27 #include <spi.h> 28 #include <asm/mpc8xxx_spi.h> 29 30 #define SPI_EV_NE (0x80000000 >> 22) /* Receiver Not Empty */ 31 #define SPI_EV_NF (0x80000000 >> 23) /* Transmitter Not Full */ 32 33 #define SPI_MODE_LOOP (0x80000000 >> 1) /* Loopback mode */ 34 #define SPI_MODE_REV (0x80000000 >> 5) /* Reverse mode - MSB first */ 35 #define SPI_MODE_MS (0x80000000 >> 6) /* Always master */ 36 #define SPI_MODE_EN (0x80000000 >> 7) /* Enable interface */ 37 38 #define SPI_TIMEOUT 1000 39 40 void spi_init(void) 41 { 42 volatile spi8xxx_t *spi = &((immap_t *) (CFG_IMMR))->spi; 43 44 /* 45 * SPI pins on the MPC83xx are not muxed, so all we do is initialize 46 * some registers 47 */ 48 spi->mode = SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN; 49 spi->mode = (spi->mode & 0xfff0ffff) | (1 << 16); /* Use SYSCLK / 8 50 (16.67MHz typ.) */ 51 spi->event = 0xffffffff; /* Clear all SPI events */ 52 spi->mask = 0x00000000; /* Mask all SPI interrupts */ 53 spi->com = 0; /* LST bit doesn't do anything, so disregard */ 54 } 55 56 int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) 57 { 58 volatile spi8xxx_t *spi = &((immap_t *) (CFG_IMMR))->spi; 59 unsigned int tmpdout, tmpdin, event; 60 int numBlks = bitlen / 32 + (bitlen % 32 ? 1 : 0); 61 int tm, isRead = 0; 62 unsigned char charSize = 32; 63 64 debug("spi_xfer: chipsel %08X dout %08X din %08X bitlen %d\n", 65 (int)chipsel, *(uint *) dout, *(uint *) din, bitlen); 66 67 if (chipsel != NULL) 68 (*chipsel) (1); /* select the target chip */ 69 70 spi->event = 0xffffffff; /* Clear all SPI events */ 71 72 /* handle data in 32-bit chunks */ 73 while (numBlks--) { 74 tmpdout = 0; 75 charSize = (bitlen >= 32 ? 32 : bitlen); 76 77 /* Shift data so it's msb-justified */ 78 tmpdout = *(u32 *) dout >> (32 - charSize); 79 80 /* The LEN field of the SPMODE register is set as follows: 81 * 82 * Bit length setting 83 * len <= 4 3 84 * 4 < len <= 16 len - 1 85 * len > 16 0 86 */ 87 88 if (bitlen <= 16) { 89 if (bitlen <= 4) 90 spi->mode = (spi->mode & 0xff0fffff) | 91 (3 << 20); 92 else 93 spi->mode = (spi->mode & 0xff0fffff) | 94 ((bitlen - 1) << 20); 95 } else { 96 spi->mode = (spi->mode & 0xff0fffff); 97 /* Set up the next iteration if sending > 32 bits */ 98 bitlen -= 32; 99 dout += 4; 100 } 101 102 spi->tx = tmpdout; /* Write the data out */ 103 debug("*** spi_xfer: ... %08x written\n", tmpdout); 104 105 /* 106 * Wait for SPI transmit to get out 107 * or time out (1 second = 1000 ms) 108 * The NE event must be read and cleared first 109 */ 110 for (tm = 0, isRead = 0; tm < SPI_TIMEOUT; ++tm) { 111 event = spi->event; 112 if (event & SPI_EV_NE) { 113 tmpdin = spi->rx; 114 spi->event |= SPI_EV_NE; 115 isRead = 1; 116 117 *(u32 *) din = (tmpdin << (32 - charSize)); 118 if (charSize == 32) { 119 /* Advance output buffer by 32 bits */ 120 din += 4; 121 } 122 } 123 /* 124 * Only bail when we've had both NE and NF events. 125 * This will cause timeouts on RO devices, so maybe 126 * in the future put an arbitrary delay after writing 127 * the device. Arbitrary delays suck, though... 128 */ 129 if (isRead && (event & SPI_EV_NF)) 130 break; 131 } 132 if (tm >= SPI_TIMEOUT) 133 puts("*** spi_xfer: Time out during SPI transfer"); 134 135 debug("*** spi_xfer: transfer ended. Value=%08x\n", tmpdin); 136 } 137 138 if (chipsel != NULL) 139 (*chipsel) (0); /* deselect the target chip */ 140 141 return 0; 142 } 143 #endif /* CONFIG_HARD_SPI */ 144