xref: /openbmc/u-boot/drivers/spi/fsl_espi.c (revision 1d6edcbf)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * eSPI controller driver.
4  *
5  * Copyright 2010-2011 Freescale Semiconductor, Inc.
6  * Author: Mingkai Hu (Mingkai.hu@freescale.com)
7  */
8 
9 #include <common.h>
10 
11 #include <malloc.h>
12 #include <spi.h>
13 #include <asm/immap_85xx.h>
14 
15 struct fsl_spi_slave {
16 	struct spi_slave slave;
17 	ccsr_espi_t	*espi;
18 	unsigned int	div16;
19 	unsigned int	pm;
20 	int		tx_timeout;
21 	unsigned int	mode;
22 	size_t		cmd_len;
23 	u8		cmd_buf[16];
24 	size_t		data_len;
25 	unsigned int    max_transfer_length;
26 };
27 
28 #define to_fsl_spi_slave(s) container_of(s, struct fsl_spi_slave, slave)
29 #define US_PER_SECOND		1000000UL
30 
31 #define ESPI_MAX_CS_NUM		4
32 #define ESPI_FIFO_WIDTH_BIT	32
33 
34 #define ESPI_EV_RNE		BIT(9)
35 #define ESPI_EV_TNF		BIT(8)
36 #define ESPI_EV_DON		BIT(14)
37 #define ESPI_EV_TXE		BIT(15)
38 #define ESPI_EV_RFCNT_SHIFT	24
39 #define ESPI_EV_RFCNT_MASK	(0x3f << ESPI_EV_RFCNT_SHIFT)
40 
41 #define ESPI_MODE_EN		BIT(31)	/* Enable interface */
42 #define ESPI_MODE_TXTHR(x)	((x) << 8)	/* Tx FIFO threshold */
43 #define ESPI_MODE_RXTHR(x)	((x) << 0)	/* Rx FIFO threshold */
44 
45 #define ESPI_COM_CS(x)		((x) << 30)
46 #define ESPI_COM_TRANLEN(x)	((x) << 0)
47 
48 #define ESPI_CSMODE_CI_INACTIVEHIGH	BIT(31)
49 #define ESPI_CSMODE_CP_BEGIN_EDGCLK	BIT(30)
50 #define ESPI_CSMODE_REV_MSB_FIRST	BIT(29)
51 #define ESPI_CSMODE_DIV16		BIT(28)
52 #define ESPI_CSMODE_PM(x)		((x) << 24)
53 #define ESPI_CSMODE_POL_ASSERTED_LOW	BIT(20)
54 #define ESPI_CSMODE_LEN(x)		((x) << 16)
55 #define ESPI_CSMODE_CSBEF(x)		((x) << 12)
56 #define ESPI_CSMODE_CSAFT(x)		((x) << 8)
57 #define ESPI_CSMODE_CSCG(x)		((x) << 3)
58 
59 #define ESPI_CSMODE_INIT_VAL (ESPI_CSMODE_POL_ASSERTED_LOW | \
60 		ESPI_CSMODE_CSBEF(0) | ESPI_CSMODE_CSAFT(0) | \
61 		ESPI_CSMODE_CSCG(1))
62 
63 #define ESPI_MAX_DATA_TRANSFER_LEN 0xFFF0
64 
65 struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
66 		unsigned int max_hz, unsigned int mode)
67 {
68 	struct fsl_spi_slave *fsl;
69 	sys_info_t sysinfo;
70 	unsigned long spibrg = 0;
71 	unsigned long spi_freq = 0;
72 	unsigned char pm = 0;
73 
74 	if (!spi_cs_is_valid(bus, cs))
75 		return NULL;
76 
77 	fsl = spi_alloc_slave(struct fsl_spi_slave, bus, cs);
78 	if (!fsl)
79 		return NULL;
80 
81 	fsl->espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR);
82 	fsl->mode = mode;
83 	fsl->max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN;
84 
85 	/* Set eSPI BRG clock source */
86 	get_sys_info(&sysinfo);
87 	spibrg = sysinfo.freq_systembus / 2;
88 	fsl->div16 = 0;
89 	if ((spibrg / max_hz) > 32) {
90 		fsl->div16 = ESPI_CSMODE_DIV16;
91 		pm = spibrg / (max_hz * 16 * 2);
92 		if (pm > 16) {
93 			pm = 16;
94 			debug("Requested speed is too low: %d Hz, %ld Hz "
95 				"is used.\n", max_hz, spibrg / (32 * 16));
96 		}
97 	} else
98 		pm = spibrg / (max_hz * 2);
99 	if (pm)
100 		pm--;
101 	fsl->pm = pm;
102 
103 	if (fsl->div16)
104 		spi_freq = spibrg / ((pm + 1) * 2 * 16);
105 	else
106 		spi_freq = spibrg / ((pm + 1) * 2);
107 
108 	/* set tx_timeout to 10 times of one espi FIFO entry go out */
109 	fsl->tx_timeout = DIV_ROUND_UP((US_PER_SECOND * ESPI_FIFO_WIDTH_BIT
110 				* 10), spi_freq);
111 
112 	return &fsl->slave;
113 }
114 
115 void spi_free_slave(struct spi_slave *slave)
116 {
117 	struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
118 	free(fsl);
119 }
120 
121 void spi_init(void)
122 {
123 
124 }
125 
126 int spi_claim_bus(struct spi_slave *slave)
127 {
128 	struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
129 	ccsr_espi_t *espi = fsl->espi;
130 	unsigned char pm = fsl->pm;
131 	unsigned int cs = slave->cs;
132 	unsigned int mode =  fsl->mode;
133 	unsigned int div16 = fsl->div16;
134 	int i;
135 
136 	debug("%s: bus:%i cs:%i\n", __func__, slave->bus, cs);
137 
138 	/* Enable eSPI interface */
139 	out_be32(&espi->mode, ESPI_MODE_RXTHR(3)
140 			| ESPI_MODE_TXTHR(4) | ESPI_MODE_EN);
141 
142 	out_be32(&espi->event, 0xffffffff); /* Clear all eSPI events */
143 	out_be32(&espi->mask, 0x00000000); /* Mask  all eSPI interrupts */
144 
145 	/* Init CS mode interface */
146 	for (i = 0; i < ESPI_MAX_CS_NUM; i++)
147 		out_be32(&espi->csmode[i], ESPI_CSMODE_INIT_VAL);
148 
149 	out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs]) &
150 		~(ESPI_CSMODE_PM(0xF) | ESPI_CSMODE_DIV16
151 		| ESPI_CSMODE_CI_INACTIVEHIGH | ESPI_CSMODE_CP_BEGIN_EDGCLK
152 		| ESPI_CSMODE_REV_MSB_FIRST | ESPI_CSMODE_LEN(0xF)));
153 
154 	/* Set eSPI BRG clock source */
155 	out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
156 		| ESPI_CSMODE_PM(pm) | div16);
157 
158 	/* Set eSPI mode */
159 	if (mode & SPI_CPHA)
160 		out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
161 			| ESPI_CSMODE_CP_BEGIN_EDGCLK);
162 	if (mode & SPI_CPOL)
163 		out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
164 			| ESPI_CSMODE_CI_INACTIVEHIGH);
165 
166 	/* Character bit order: msb first */
167 	out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
168 		| ESPI_CSMODE_REV_MSB_FIRST);
169 
170 	/* Character length in bits, between 0x3~0xf, i.e. 4bits~16bits */
171 	out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
172 		| ESPI_CSMODE_LEN(7));
173 
174 	return 0;
175 }
176 
177 void spi_release_bus(struct spi_slave *slave)
178 {
179 
180 }
181 
182 static void fsl_espi_tx(struct fsl_spi_slave *fsl, const void *dout)
183 {
184 	ccsr_espi_t *espi = fsl->espi;
185 	unsigned int tmpdout, event;
186 	int tmp_tx_timeout;
187 
188 	if (dout)
189 		tmpdout = *(u32 *)dout;
190 	else
191 		tmpdout = 0;
192 
193 	out_be32(&espi->tx, tmpdout);
194 	out_be32(&espi->event, ESPI_EV_TNF);
195 	debug("***spi_xfer:...%08x written\n", tmpdout);
196 
197 	tmp_tx_timeout = fsl->tx_timeout;
198 	/* Wait for eSPI transmit to go out */
199 	while (tmp_tx_timeout--) {
200 		event = in_be32(&espi->event);
201 		if (event & ESPI_EV_DON || event & ESPI_EV_TXE) {
202 			out_be32(&espi->event, ESPI_EV_TXE);
203 			break;
204 		}
205 		udelay(1);
206 	}
207 
208 	if (tmp_tx_timeout < 0)
209 		debug("***spi_xfer:...Tx timeout! event = %08x\n", event);
210 }
211 
212 static int fsl_espi_rx(struct fsl_spi_slave *fsl, void *din, unsigned int bytes)
213 {
214 	ccsr_espi_t *espi = fsl->espi;
215 	unsigned int tmpdin, rx_times;
216 	unsigned char *buf, *p_cursor;
217 
218 	if (bytes <= 0)
219 		return 0;
220 
221 	rx_times = DIV_ROUND_UP(bytes, 4);
222 	buf = (unsigned char *)malloc(4 * rx_times);
223 	if (!buf) {
224 		debug("SF: Failed to malloc memory.\n");
225 		return -1;
226 	}
227 	p_cursor = buf;
228 	while (rx_times--) {
229 		tmpdin = in_be32(&espi->rx);
230 		debug("***spi_xfer:...%08x readed\n", tmpdin);
231 		*(u32 *)p_cursor = tmpdin;
232 		p_cursor += 4;
233 	}
234 
235 	if (din)
236 		memcpy(din, buf, bytes);
237 
238 	free(buf);
239 	out_be32(&espi->event, ESPI_EV_RNE);
240 
241 	return bytes;
242 }
243 
244 int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out,
245 		void *data_in, unsigned long flags)
246 {
247 	struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
248 	ccsr_espi_t *espi = fsl->espi;
249 	unsigned int event, rx_bytes;
250 	const void *dout = NULL;
251 	void *din = NULL;
252 	int len = 0;
253 	int num_blks, num_chunks, max_tran_len, tran_len;
254 	int num_bytes;
255 	unsigned char *buffer = NULL;
256 	size_t buf_len;
257 	u8 *cmd_buf = fsl->cmd_buf;
258 	size_t cmd_len = fsl->cmd_len;
259 	size_t data_len = bitlen / 8;
260 	size_t rx_offset = 0;
261 	int rf_cnt;
262 
263 	max_tran_len = fsl->max_transfer_length;
264 	switch (flags) {
265 	case SPI_XFER_BEGIN:
266 		cmd_len = fsl->cmd_len = data_len;
267 		memcpy(cmd_buf, data_out, cmd_len);
268 		return 0;
269 	case 0:
270 	case SPI_XFER_END:
271 		if (bitlen == 0) {
272 			spi_cs_deactivate(slave);
273 			return 0;
274 		}
275 		buf_len = 2 * cmd_len + min(data_len, (size_t)max_tran_len);
276 		len = cmd_len + data_len;
277 		rx_offset = cmd_len;
278 		buffer = (unsigned char *)malloc(buf_len);
279 		if (!buffer) {
280 			debug("SF: Failed to malloc memory.\n");
281 			return 1;
282 		}
283 		memcpy(buffer, cmd_buf, cmd_len);
284 		if (data_in == NULL)
285 			memcpy(buffer + cmd_len, data_out, data_len);
286 		break;
287 	case SPI_XFER_BEGIN | SPI_XFER_END:
288 		len = data_len;
289 		buffer = (unsigned char *)malloc(len * 2);
290 		if (!buffer) {
291 			debug("SF: Failed to malloc memory.\n");
292 			return 1;
293 		}
294 		memcpy(buffer, data_out, len);
295 		rx_offset = len;
296 		cmd_len = 0;
297 		break;
298 	}
299 
300 	debug("spi_xfer: data_out %08X(%p) data_in %08X(%p) len %u\n",
301 	      *(uint *)data_out, data_out, *(uint *)data_in, data_in, len);
302 
303 	num_chunks = DIV_ROUND_UP(data_len, max_tran_len);
304 	while (num_chunks--) {
305 		if (data_in)
306 			din = buffer + rx_offset;
307 		dout = buffer;
308 		tran_len = min(data_len, (size_t)max_tran_len);
309 		num_blks = DIV_ROUND_UP(tran_len + cmd_len, 4);
310 		num_bytes = (tran_len + cmd_len) % 4;
311 		fsl->data_len = tran_len + cmd_len;
312 		spi_cs_activate(slave);
313 
314 		/* Clear all eSPI events */
315 		out_be32(&espi->event , 0xffffffff);
316 		/* handle data in 32-bit chunks */
317 		while (num_blks) {
318 			event = in_be32(&espi->event);
319 			if (event & ESPI_EV_TNF) {
320 				fsl_espi_tx(fsl, dout);
321 				/* Set up the next iteration */
322 				if (len > 4) {
323 					len -= 4;
324 					dout += 4;
325 				}
326 			}
327 
328 			event = in_be32(&espi->event);
329 			if (event & ESPI_EV_RNE) {
330 				rf_cnt = ((event & ESPI_EV_RFCNT_MASK)
331 						>> ESPI_EV_RFCNT_SHIFT);
332 				if (rf_cnt >= 4)
333 					rx_bytes = 4;
334 				else if (num_blks == 1 && rf_cnt == num_bytes)
335 					rx_bytes = num_bytes;
336 				else
337 					continue;
338 				if (fsl_espi_rx(fsl, din, rx_bytes)
339 						== rx_bytes) {
340 					num_blks--;
341 					if (din)
342 						din = (unsigned char *)din
343 							+ rx_bytes;
344 				}
345 			}
346 		}
347 		if (data_in) {
348 			memcpy(data_in, buffer + 2 * cmd_len, tran_len);
349 			if (*buffer == 0x0b) {
350 				data_in += tran_len;
351 				data_len -= tran_len;
352 				*(int *)buffer += tran_len;
353 			}
354 		}
355 		spi_cs_deactivate(slave);
356 	}
357 
358 	free(buffer);
359 	return 0;
360 }
361 
362 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
363 {
364 	return bus == 0 && cs < ESPI_MAX_CS_NUM;
365 }
366 
367 void spi_cs_activate(struct spi_slave *slave)
368 {
369 	struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
370 	ccsr_espi_t *espi = fsl->espi;
371 	unsigned int com = 0;
372 	size_t data_len = fsl->data_len;
373 
374 	com &= ~(ESPI_COM_CS(0x3) | ESPI_COM_TRANLEN(0xFFFF));
375 	com |= ESPI_COM_CS(slave->cs);
376 	com |= ESPI_COM_TRANLEN(data_len - 1);
377 	out_be32(&espi->com, com);
378 }
379 
380 void spi_cs_deactivate(struct spi_slave *slave)
381 {
382 	struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
383 	ccsr_espi_t *espi = fsl->espi;
384 
385 	/* clear the RXCNT and TXCNT */
386 	out_be32(&espi->mode, in_be32(&espi->mode) & (~ESPI_MODE_EN));
387 	out_be32(&espi->mode, in_be32(&espi->mode) | ESPI_MODE_EN);
388 }
389