1 /* 2 * 3 * (C) Copyright 2000-2003 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * Copyright (C) 2004-2009 Freescale Semiconductor, Inc. 7 * TsiChung Liew (Tsi-Chung.Liew@freescale.com) 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 */ 11 12 #include <common.h> 13 #include <spi.h> 14 #include <malloc.h> 15 #include <asm/immap.h> 16 17 struct cf_spi_slave { 18 struct spi_slave slave; 19 uint baudrate; 20 int charbit; 21 }; 22 23 int cfspi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, 24 void *din, ulong flags); 25 struct spi_slave *cfspi_setup_slave(struct cf_spi_slave *cfslave, uint mode); 26 void cfspi_init(void); 27 void cfspi_tx(u32 ctrl, u16 data); 28 u16 cfspi_rx(void); 29 30 extern void cfspi_port_conf(void); 31 extern int cfspi_claim_bus(uint bus, uint cs); 32 extern void cfspi_release_bus(uint bus, uint cs); 33 34 DECLARE_GLOBAL_DATA_PTR; 35 36 #ifndef CONFIG_SPI_IDLE_VAL 37 #if defined(CONFIG_SPI_MMC) 38 #define CONFIG_SPI_IDLE_VAL 0xFFFF 39 #else 40 #define CONFIG_SPI_IDLE_VAL 0x0 41 #endif 42 #endif 43 44 #if defined(CONFIG_CF_DSPI) 45 /* DSPI specific mode */ 46 #define SPI_MODE_MOD 0x00200000 47 #define SPI_DBLRATE 0x00100000 48 49 static inline struct cf_spi_slave *to_cf_spi_slave(struct spi_slave *slave) 50 { 51 return container_of(slave, struct cf_spi_slave, slave); 52 } 53 54 void cfspi_init(void) 55 { 56 volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI; 57 58 cfspi_port_conf(); /* port configuration */ 59 60 dspi->mcr = DSPI_MCR_MSTR | DSPI_MCR_CSIS7 | DSPI_MCR_CSIS6 | 61 DSPI_MCR_CSIS5 | DSPI_MCR_CSIS4 | DSPI_MCR_CSIS3 | 62 DSPI_MCR_CSIS2 | DSPI_MCR_CSIS1 | DSPI_MCR_CSIS0 | 63 DSPI_MCR_CRXF | DSPI_MCR_CTXF; 64 65 /* Default setting in platform configuration */ 66 #ifdef CONFIG_SYS_DSPI_CTAR0 67 dspi->ctar[0] = CONFIG_SYS_DSPI_CTAR0; 68 #endif 69 #ifdef CONFIG_SYS_DSPI_CTAR1 70 dspi->ctar[1] = CONFIG_SYS_DSPI_CTAR1; 71 #endif 72 #ifdef CONFIG_SYS_DSPI_CTAR2 73 dspi->ctar[2] = CONFIG_SYS_DSPI_CTAR2; 74 #endif 75 #ifdef CONFIG_SYS_DSPI_CTAR3 76 dspi->ctar[3] = CONFIG_SYS_DSPI_CTAR3; 77 #endif 78 #ifdef CONFIG_SYS_DSPI_CTAR4 79 dspi->ctar[4] = CONFIG_SYS_DSPI_CTAR4; 80 #endif 81 #ifdef CONFIG_SYS_DSPI_CTAR5 82 dspi->ctar[5] = CONFIG_SYS_DSPI_CTAR5; 83 #endif 84 #ifdef CONFIG_SYS_DSPI_CTAR6 85 dspi->ctar[6] = CONFIG_SYS_DSPI_CTAR6; 86 #endif 87 #ifdef CONFIG_SYS_DSPI_CTAR7 88 dspi->ctar[7] = CONFIG_SYS_DSPI_CTAR7; 89 #endif 90 } 91 92 void cfspi_tx(u32 ctrl, u16 data) 93 { 94 volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI; 95 96 while ((dspi->sr & 0x0000F000) >= 4) ; 97 98 dspi->tfr = (ctrl | data); 99 } 100 101 u16 cfspi_rx(void) 102 { 103 volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI; 104 105 while ((dspi->sr & 0x000000F0) == 0) ; 106 107 return (dspi->rfr & 0xFFFF); 108 } 109 110 int cfspi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, 111 void *din, ulong flags) 112 { 113 struct cf_spi_slave *cfslave = to_cf_spi_slave(slave); 114 u16 *spi_rd16 = NULL, *spi_wr16 = NULL; 115 u8 *spi_rd = NULL, *spi_wr = NULL; 116 static u32 ctrl = 0; 117 uint len = bitlen >> 3; 118 119 if (cfslave->charbit == 16) { 120 bitlen >>= 1; 121 spi_wr16 = (u16 *) dout; 122 spi_rd16 = (u16 *) din; 123 } else { 124 spi_wr = (u8 *) dout; 125 spi_rd = (u8 *) din; 126 } 127 128 if ((flags & SPI_XFER_BEGIN) == SPI_XFER_BEGIN) 129 ctrl |= DSPI_TFR_CONT; 130 131 ctrl = (ctrl & 0xFF000000) | ((1 << slave->cs) << 16); 132 133 if (len > 1) { 134 int tmp_len = len - 1; 135 while (tmp_len--) { 136 if (dout != NULL) { 137 if (cfslave->charbit == 16) 138 cfspi_tx(ctrl, *spi_wr16++); 139 else 140 cfspi_tx(ctrl, *spi_wr++); 141 cfspi_rx(); 142 } 143 144 if (din != NULL) { 145 cfspi_tx(ctrl, CONFIG_SPI_IDLE_VAL); 146 if (cfslave->charbit == 16) 147 *spi_rd16++ = cfspi_rx(); 148 else 149 *spi_rd++ = cfspi_rx(); 150 } 151 } 152 153 len = 1; /* remaining byte */ 154 } 155 156 if ((flags & SPI_XFER_END) == SPI_XFER_END) 157 ctrl &= ~DSPI_TFR_CONT; 158 159 if (len) { 160 if (dout != NULL) { 161 if (cfslave->charbit == 16) 162 cfspi_tx(ctrl, *spi_wr16); 163 else 164 cfspi_tx(ctrl, *spi_wr); 165 cfspi_rx(); 166 } 167 168 if (din != NULL) { 169 cfspi_tx(ctrl, CONFIG_SPI_IDLE_VAL); 170 if (cfslave->charbit == 16) 171 *spi_rd16 = cfspi_rx(); 172 else 173 *spi_rd = cfspi_rx(); 174 } 175 } else { 176 /* dummy read */ 177 cfspi_tx(ctrl, CONFIG_SPI_IDLE_VAL); 178 cfspi_rx(); 179 } 180 181 return 0; 182 } 183 184 struct spi_slave *cfspi_setup_slave(struct cf_spi_slave *cfslave, uint mode) 185 { 186 /* 187 * bit definition for mode: 188 * bit 31 - 28: Transfer size 3 to 16 bits 189 * 27 - 26: PCS to SCK delay prescaler 190 * 25 - 24: After SCK delay prescaler 191 * 23 - 22: Delay after transfer prescaler 192 * 21 : Allow overwrite for bit 31-22 and bit 20-8 193 * 20 : Double baud rate 194 * 19 - 16: PCS to SCK delay scaler 195 * 15 - 12: After SCK delay scaler 196 * 11 - 8: Delay after transfer scaler 197 * 7 - 0: SPI_CPHA, SPI_CPOL, SPI_LSB_FIRST 198 */ 199 volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI; 200 int prescaler[] = { 2, 3, 5, 7 }; 201 int scaler[] = { 202 2, 4, 6, 8, 203 16, 32, 64, 128, 204 256, 512, 1024, 2048, 205 4096, 8192, 16384, 32768 206 }; 207 int i, j, pbrcnt, brcnt, diff, tmp, dbr = 0; 208 int best_i, best_j, bestmatch = 0x7FFFFFFF, baud_speed; 209 u32 bus_setup = 0; 210 211 tmp = (prescaler[3] * scaler[15]); 212 /* Maximum and minimum baudrate it can handle */ 213 if ((cfslave->baudrate > (gd->bus_clk >> 1)) || 214 (cfslave->baudrate < (gd->bus_clk / tmp))) { 215 printf("Exceed baudrate limitation: Max %d - Min %d\n", 216 (int)(gd->bus_clk >> 1), (int)(gd->bus_clk / tmp)); 217 return NULL; 218 } 219 220 /* Activate Double Baud when it exceed 1/4 the bus clk */ 221 if ((CONFIG_SYS_DSPI_CTAR0 & DSPI_CTAR_DBR) || 222 (cfslave->baudrate > (gd->bus_clk / (prescaler[0] * scaler[0])))) { 223 bus_setup |= DSPI_CTAR_DBR; 224 dbr = 1; 225 } 226 227 if (mode & SPI_CPOL) 228 bus_setup |= DSPI_CTAR_CPOL; 229 if (mode & SPI_CPHA) 230 bus_setup |= DSPI_CTAR_CPHA; 231 if (mode & SPI_LSB_FIRST) 232 bus_setup |= DSPI_CTAR_LSBFE; 233 234 /* Overwrite default value set in platform configuration file */ 235 if (mode & SPI_MODE_MOD) { 236 237 if ((mode & 0xF0000000) == 0) 238 bus_setup |= 239 dspi->ctar[cfslave->slave.bus] & 0x78000000; 240 else 241 bus_setup |= ((mode & 0xF0000000) >> 1); 242 243 /* 244 * Check to see if it is enabled by default in platform 245 * config, or manual setting passed by mode parameter 246 */ 247 if (mode & SPI_DBLRATE) { 248 bus_setup |= DSPI_CTAR_DBR; 249 dbr = 1; 250 } 251 bus_setup |= (mode & 0x0FC00000) >> 4; /* PSCSCK, PASC, PDT */ 252 bus_setup |= (mode & 0x000FFF00) >> 4; /* CSSCK, ASC, DT */ 253 } else 254 bus_setup |= (dspi->ctar[cfslave->slave.bus] & 0x78FCFFF0); 255 256 cfslave->charbit = 257 ((dspi->ctar[cfslave->slave.bus] & 0x78000000) == 258 0x78000000) ? 16 : 8; 259 260 pbrcnt = sizeof(prescaler) / sizeof(int); 261 brcnt = sizeof(scaler) / sizeof(int); 262 263 /* baudrate calculation - to closer value, may not be exact match */ 264 for (best_i = 0, best_j = 0, i = 0; i < pbrcnt; i++) { 265 baud_speed = gd->bus_clk / prescaler[i]; 266 for (j = 0; j < brcnt; j++) { 267 tmp = (baud_speed / scaler[j]) * (1 + dbr); 268 269 if (tmp > cfslave->baudrate) 270 diff = tmp - cfslave->baudrate; 271 else 272 diff = cfslave->baudrate - tmp; 273 274 if (diff < bestmatch) { 275 bestmatch = diff; 276 best_i = i; 277 best_j = j; 278 } 279 } 280 } 281 bus_setup |= (DSPI_CTAR_PBR(best_i) | DSPI_CTAR_BR(best_j)); 282 dspi->ctar[cfslave->slave.bus] = bus_setup; 283 284 return &cfslave->slave; 285 } 286 #endif /* CONFIG_CF_DSPI */ 287 288 #ifdef CONFIG_CF_QSPI 289 /* 52xx, 53xx */ 290 #endif /* CONFIG_CF_QSPI */ 291 292 #ifdef CONFIG_CMD_SPI 293 int spi_cs_is_valid(unsigned int bus, unsigned int cs) 294 { 295 if (((cs >= 0) && (cs < 8)) && ((bus >= 0) && (bus < 8))) 296 return 1; 297 else 298 return 0; 299 } 300 301 void spi_init_f(void) 302 { 303 } 304 305 void spi_init_r(void) 306 { 307 } 308 309 void spi_init(void) 310 { 311 cfspi_init(); 312 } 313 314 struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, 315 unsigned int max_hz, unsigned int mode) 316 { 317 struct cf_spi_slave *cfslave; 318 319 if (!spi_cs_is_valid(bus, cs)) 320 return NULL; 321 322 cfslave = spi_alloc_slave(struct cf_spi_slave, bus, cs); 323 if (!cfslave) 324 return NULL; 325 326 cfslave->baudrate = max_hz; 327 328 /* specific setup */ 329 return cfspi_setup_slave(cfslave, mode); 330 } 331 332 void spi_free_slave(struct spi_slave *slave) 333 { 334 struct cf_spi_slave *cfslave = to_cf_spi_slave(slave); 335 336 free(cfslave); 337 } 338 339 int spi_claim_bus(struct spi_slave *slave) 340 { 341 return cfspi_claim_bus(slave->bus, slave->cs); 342 } 343 344 void spi_release_bus(struct spi_slave *slave) 345 { 346 cfspi_release_bus(slave->bus, slave->cs); 347 } 348 349 int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, 350 void *din, unsigned long flags) 351 { 352 return cfspi_xfer(slave, bitlen, dout, din, flags); 353 } 354 #endif /* CONFIG_CMD_SPI */ 355