1 /* 2 * Copyright (C) 2012 Samsung Electronics 3 * R. Chadrasekar <rcsekar@samsung.com> 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24 #ifndef __WM8994_H__ 25 #define __WM8994_H__ 26 27 /* Sources for AIF1/2 SYSCLK - use with set_dai_sysclk() */ 28 #define WM8994_SYSCLK_MCLK1 1 29 #define WM8994_SYSCLK_MCLK2 2 30 #define WM8994_SYSCLK_FLL1 3 31 #define WM8994_SYSCLK_FLL2 4 32 33 /* Avilable audi interface ports in wm8994 codec */ 34 enum en_audio_interface { 35 WM8994_AIF1 = 1, 36 WM8994_AIF2, 37 WM8994_AIF3 38 }; 39 40 /* OPCLK is also configured with set_dai_sysclk, specify division*10 as rate. */ 41 #define WM8994_SYSCLK_OPCLK 5 42 43 #define WM8994_FLL1 1 44 #define WM8994_FLL2 2 45 46 #define WM8994_FLL_SRC_MCLK1 1 47 #define WM8994_FLL_SRC_MCLK2 2 48 #define WM8994_FLL_SRC_LRCLK 3 49 #define WM8994_FLL_SRC_BCLK 4 50 51 /* maximum available digital interfac in the dac to configure */ 52 #define WM8994_MAX_AIF 2 53 54 #define WM8994_MAX_INPUT_CLK_FREQ 13500000 55 #define WM8994_ID 0x8994 56 57 enum wm8994_vmid_mode { 58 WM8994_VMID_NORMAL, 59 WM8994_VMID_FORCE, 60 }; 61 62 /* wm 8994 family devices */ 63 enum wm8994_type { 64 WM8994 = 0, 65 WM8958 = 1, 66 WM1811 = 2, 67 }; 68 69 /* 70 * intialise wm8994 sound codec device for the given configuration 71 * 72 * @param blob FDT node for codec values 73 * @param aif_id enum value of codec interface port in which 74 * soc i2s is connected 75 * @param sampling_rate Sampling rate ranges between from 8khz to 96khz 76 * @param mclk_freq Master clock frequency. 77 * @param bits_per_sample bits per Sample can be 16 or 24 78 * @param channels Number of channnels, maximum 2 79 * 80 * @returns -1 for error and 0 Success. 81 */ 82 int wm8994_init(const void *blob, enum en_audio_interface aif_id, 83 int sampling_rate, int mclk_freq, 84 int bits_per_sample, unsigned int channels); 85 #endif /*__WM8994_H__ */ 86