1 /*
2  * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <linux/io.h>
8 #include <linux/serial_reg.h>
9 #include <asm/errno.h>
10 #include <dm/device.h>
11 #include <mapmem.h>
12 #include <serial.h>
13 #include <fdtdec.h>
14 
15 /*
16  * Note: Register map is slightly different from that of 16550.
17  */
18 struct uniphier_serial {
19 	u32 rx;			/* In:  Receive buffer */
20 #define tx rx			/* Out: Transmit buffer */
21 	u32 ier;		/* Interrupt Enable Register */
22 	u32 iir;		/* In: Interrupt ID Register */
23 	u32 char_fcr;		/* Charactor / FIFO Control Register */
24 	u32 lcr_mcr;		/* Line/Modem Control Register */
25 #define LCR_SHIFT	8
26 #define LCR_MASK	(0xff << (LCR_SHIFT))
27 	u32 lsr;		/* In: Line Status Register */
28 	u32 msr;		/* In: Modem Status Register */
29 	u32 __rsv0;
30 	u32 __rsv1;
31 	u32 dlr;		/* Divisor Latch Register */
32 };
33 
34 struct uniphier_serial_private_data {
35 	struct uniphier_serial __iomem *membase;
36 	unsigned int uartclk;
37 };
38 
39 #define uniphier_serial_port(dev)	\
40 	((struct uniphier_serial_private_data *)dev_get_priv(dev))->membase
41 
42 static int uniphier_serial_setbrg(struct udevice *dev, int baudrate)
43 {
44 	struct uniphier_serial_private_data *priv = dev_get_priv(dev);
45 	struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
46 	const unsigned int mode_x_div = 16;
47 	unsigned int divisor;
48 
49 	divisor = DIV_ROUND_CLOSEST(priv->uartclk, mode_x_div * baudrate);
50 
51 	writel(divisor, &port->dlr);
52 
53 	return 0;
54 }
55 
56 static int uniphier_serial_getc(struct udevice *dev)
57 {
58 	struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
59 
60 	if (!(readl(&port->lsr) & UART_LSR_DR))
61 		return -EAGAIN;
62 
63 	return readl(&port->rx);
64 }
65 
66 static int uniphier_serial_putc(struct udevice *dev, const char c)
67 {
68 	struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
69 
70 	if (!(readl(&port->lsr) & UART_LSR_THRE))
71 		return -EAGAIN;
72 
73 	writel(c, &port->tx);
74 
75 	return 0;
76 }
77 
78 static int uniphier_serial_pending(struct udevice *dev, bool input)
79 {
80 	struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
81 
82 	if (input)
83 		return readl(&port->lsr) & UART_LSR_DR;
84 	else
85 		return !(readl(&port->lsr) & UART_LSR_THRE);
86 }
87 
88 static int uniphier_serial_probe(struct udevice *dev)
89 {
90 	DECLARE_GLOBAL_DATA_PTR;
91 	struct uniphier_serial_private_data *priv = dev_get_priv(dev);
92 	struct uniphier_serial __iomem *port;
93 	fdt_addr_t base;
94 	fdt_size_t size;
95 	u32 tmp;
96 
97 	base = fdtdec_get_addr_size(gd->fdt_blob, dev->of_offset, "reg", &size);
98 
99 	port = map_sysmem(base, size);
100 	if (!port)
101 		return -ENOMEM;
102 
103 	priv->membase = port;
104 
105 	priv->uartclk = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
106 				       "clock-frequency", 0);
107 
108 	tmp = readl(&port->lcr_mcr);
109 	tmp &= ~LCR_MASK;
110 	tmp |= UART_LCR_WLEN8 << LCR_SHIFT;
111 	writel(tmp, &port->lcr_mcr);
112 
113 	return 0;
114 }
115 
116 static int uniphier_serial_remove(struct udevice *dev)
117 {
118 	unmap_sysmem(uniphier_serial_port(dev));
119 
120 	return 0;
121 }
122 
123 static const struct udevice_id uniphier_uart_of_match[] = {
124 	{ .compatible = "socionext,uniphier-uart" },
125 	{ /* sentinel */ }
126 };
127 
128 static const struct dm_serial_ops uniphier_serial_ops = {
129 	.setbrg = uniphier_serial_setbrg,
130 	.getc = uniphier_serial_getc,
131 	.putc = uniphier_serial_putc,
132 	.pending = uniphier_serial_pending,
133 };
134 
135 U_BOOT_DRIVER(uniphier_serial) = {
136 	.name = "uniphier-uart",
137 	.id = UCLASS_SERIAL,
138 	.of_match = uniphier_uart_of_match,
139 	.probe = uniphier_serial_probe,
140 	.remove = uniphier_serial_remove,
141 	.priv_auto_alloc_size = sizeof(struct uniphier_serial_private_data),
142 	.ops = &uniphier_serial_ops,
143 };
144