1 /* 2 * SuperH SCIF device driver. 3 * Copyright (C) 2007,2008,2010 Nobuhiro Iwamatsu 4 * Copyright (C) 2002 - 2008 Paul Mundt 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 */ 20 21 #include <common.h> 22 #include <asm/io.h> 23 #include <asm/processor.h> 24 #include "serial_sh.h" 25 26 #if defined(CONFIG_CONS_SCIF0) 27 # define SCIF_BASE SCIF0_BASE 28 #elif defined(CONFIG_CONS_SCIF1) 29 # define SCIF_BASE SCIF1_BASE 30 #elif defined(CONFIG_CONS_SCIF2) 31 # define SCIF_BASE SCIF2_BASE 32 #elif defined(CONFIG_CONS_SCIF3) 33 # define SCIF_BASE SCIF3_BASE 34 #elif defined(CONFIG_CONS_SCIF4) 35 # define SCIF_BASE SCIF4_BASE 36 #elif defined(CONFIG_CONS_SCIF5) 37 # define SCIF_BASE SCIF5_BASE 38 #elif defined(CONFIG_CONS_SCIF6) 39 # define SCIF_BASE SCIF6_BASE 40 #elif defined(CONFIG_CONS_SCIF7) 41 # define SCIF_BASE SCIF7_BASE 42 #else 43 # error "Default SCIF doesn't set....." 44 #endif 45 46 #if defined(CONFIG_SCIF_A) 47 #define SCIF_BASE_PORT PORT_SCIFA 48 #else 49 #define SCIF_BASE_PORT PORT_SCIF 50 #endif 51 52 static struct uart_port sh_sci = { 53 .membase = (unsigned char*)SCIF_BASE, 54 .mapbase = SCIF_BASE, 55 .type = SCIF_BASE_PORT, 56 }; 57 58 void serial_setbrg(void) 59 { 60 DECLARE_GLOBAL_DATA_PTR; 61 sci_out(&sh_sci, SCBRR, SCBRR_VALUE(gd->baudrate, CONFIG_SYS_CLK_FREQ)); 62 } 63 64 int serial_init(void) 65 { 66 sci_out(&sh_sci, SCSCR , SCSCR_INIT(&sh_sci)); 67 sci_out(&sh_sci, SCSCR , SCSCR_INIT(&sh_sci)); 68 sci_out(&sh_sci, SCSMR, 0); 69 sci_out(&sh_sci, SCSMR, 0); 70 sci_out(&sh_sci, SCFCR, SCFCR_RFRST|SCFCR_TFRST); 71 sci_in(&sh_sci, SCFCR); 72 sci_out(&sh_sci, SCFCR, 0); 73 74 serial_setbrg(); 75 return 0; 76 } 77 78 #if defined(CONFIG_CPU_SH7760) || \ 79 defined(CONFIG_CPU_SH7780) || \ 80 defined(CONFIG_CPU_SH7785) || \ 81 defined(CONFIG_CPU_SH7786) 82 static int scif_rxfill(struct uart_port *port) 83 { 84 return sci_in(port, SCRFDR) & 0xff; 85 } 86 #elif defined(CONFIG_CPU_SH7763) 87 static int scif_rxfill(struct uart_port *port) 88 { 89 if ((port->mapbase == 0xffe00000) || 90 (port->mapbase == 0xffe08000)) { 91 /* SCIF0/1*/ 92 return sci_in(port, SCRFDR) & 0xff; 93 } else { 94 /* SCIF2 */ 95 return sci_in(port, SCFDR) & SCIF2_RFDC_MASK; 96 } 97 } 98 #elif defined(CONFIG_ARCH_SH7372) 99 static int scif_rxfill(struct uart_port *port) 100 { 101 if (port->type == PORT_SCIFA) 102 return sci_in(port, SCFDR) & SCIF_RFDC_MASK; 103 else 104 return sci_in(port, SCRFDR); 105 } 106 #else 107 static int scif_rxfill(struct uart_port *port) 108 { 109 return sci_in(port, SCFDR) & SCIF_RFDC_MASK; 110 } 111 #endif 112 113 static int serial_rx_fifo_level(void) 114 { 115 return scif_rxfill(&sh_sci); 116 } 117 118 void serial_raw_putc(const char c) 119 { 120 while (1) { 121 /* Tx fifo is empty */ 122 if (sci_in(&sh_sci, SCxSR) & SCxSR_TEND(&sh_sci)) 123 break; 124 } 125 126 sci_out(&sh_sci, SCxTDR, c); 127 sci_out(&sh_sci, SCxSR, sci_in(&sh_sci, SCxSR) & ~SCxSR_TEND(&sh_sci)); 128 } 129 130 void serial_putc(const char c) 131 { 132 if (c == '\n') 133 serial_raw_putc('\r'); 134 serial_raw_putc(c); 135 } 136 137 void serial_puts(const char *s) 138 { 139 char c; 140 while ((c = *s++) != 0) 141 serial_putc(c); 142 } 143 144 int serial_tstc(void) 145 { 146 return serial_rx_fifo_level() ? 1 : 0; 147 } 148 149 void handle_error(void) 150 { 151 sci_in(&sh_sci, SCxSR); 152 sci_out(&sh_sci, SCxSR, SCxSR_ERROR_CLEAR(&sh_sci)); 153 sci_in(&sh_sci, SCLSR); 154 sci_out(&sh_sci, SCLSR, 0x00); 155 } 156 157 int serial_getc_check(void) 158 { 159 unsigned short status; 160 161 status = sci_in(&sh_sci, SCxSR); 162 163 if (status & SCIF_ERRORS) 164 handle_error(); 165 if (sci_in(&sh_sci, SCLSR) & SCxSR_ORER(&sh_sci)) 166 handle_error(); 167 return status & (SCIF_DR | SCxSR_RDxF(&sh_sci)); 168 } 169 170 int serial_getc(void) 171 { 172 unsigned short status; 173 char ch; 174 175 while (!serial_getc_check()) 176 ; 177 178 ch = sci_in(&sh_sci, SCxRDR); 179 status = sci_in(&sh_sci, SCxSR); 180 181 sci_out(&sh_sci, SCxSR, SCxSR_RDxF_CLEAR(&sh_sci)); 182 183 if (status & SCIF_ERRORS) 184 handle_error(); 185 186 if (sci_in(&sh_sci, SCLSR) & SCxSR_ORER(&sh_sci)) 187 handle_error(); 188 return ch; 189 } 190