1 /* 2 * SuperH SCIF device driver. 3 * Copyright (C) 2007,2008,2010 Nobuhiro Iwamatsu 4 * Copyright (C) 2002 - 2008 Paul Mundt 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 */ 20 21 #include <common.h> 22 #include <asm/io.h> 23 #include <asm/processor.h> 24 #include "serial_sh.h" 25 #include <serial.h> 26 #include <linux/compiler.h> 27 28 #if defined(CONFIG_CONS_SCIF0) 29 # define SCIF_BASE SCIF0_BASE 30 #elif defined(CONFIG_CONS_SCIF1) 31 # define SCIF_BASE SCIF1_BASE 32 #elif defined(CONFIG_CONS_SCIF2) 33 # define SCIF_BASE SCIF2_BASE 34 #elif defined(CONFIG_CONS_SCIF3) 35 # define SCIF_BASE SCIF3_BASE 36 #elif defined(CONFIG_CONS_SCIF4) 37 # define SCIF_BASE SCIF4_BASE 38 #elif defined(CONFIG_CONS_SCIF5) 39 # define SCIF_BASE SCIF5_BASE 40 #elif defined(CONFIG_CONS_SCIF6) 41 # define SCIF_BASE SCIF6_BASE 42 #elif defined(CONFIG_CONS_SCIF7) 43 # define SCIF_BASE SCIF7_BASE 44 #else 45 # error "Default SCIF doesn't set....." 46 #endif 47 48 #if defined(CONFIG_SCIF_A) 49 #define SCIF_BASE_PORT PORT_SCIFA 50 #else 51 #define SCIF_BASE_PORT PORT_SCIF 52 #endif 53 54 static struct uart_port sh_sci = { 55 .membase = (unsigned char*)SCIF_BASE, 56 .mapbase = SCIF_BASE, 57 .type = SCIF_BASE_PORT, 58 }; 59 60 static void sh_serial_setbrg(void) 61 { 62 DECLARE_GLOBAL_DATA_PTR; 63 sci_out(&sh_sci, SCBRR, SCBRR_VALUE(gd->baudrate, CONFIG_SYS_CLK_FREQ)); 64 } 65 66 static int sh_serial_init(void) 67 { 68 sci_out(&sh_sci, SCSCR , SCSCR_INIT(&sh_sci)); 69 sci_out(&sh_sci, SCSCR , SCSCR_INIT(&sh_sci)); 70 sci_out(&sh_sci, SCSMR, 0); 71 sci_out(&sh_sci, SCSMR, 0); 72 sci_out(&sh_sci, SCFCR, SCFCR_RFRST|SCFCR_TFRST); 73 sci_in(&sh_sci, SCFCR); 74 sci_out(&sh_sci, SCFCR, 0); 75 76 serial_setbrg(); 77 return 0; 78 } 79 80 #if defined(CONFIG_CPU_SH7760) || \ 81 defined(CONFIG_CPU_SH7780) || \ 82 defined(CONFIG_CPU_SH7785) || \ 83 defined(CONFIG_CPU_SH7786) 84 static int scif_rxfill(struct uart_port *port) 85 { 86 return sci_in(port, SCRFDR) & 0xff; 87 } 88 #elif defined(CONFIG_CPU_SH7763) 89 static int scif_rxfill(struct uart_port *port) 90 { 91 if ((port->mapbase == 0xffe00000) || 92 (port->mapbase == 0xffe08000)) { 93 /* SCIF0/1*/ 94 return sci_in(port, SCRFDR) & 0xff; 95 } else { 96 /* SCIF2 */ 97 return sci_in(port, SCFDR) & SCIF2_RFDC_MASK; 98 } 99 } 100 #elif defined(CONFIG_ARCH_SH7372) 101 static int scif_rxfill(struct uart_port *port) 102 { 103 if (port->type == PORT_SCIFA) 104 return sci_in(port, SCFDR) & SCIF_RFDC_MASK; 105 else 106 return sci_in(port, SCRFDR); 107 } 108 #else 109 static int scif_rxfill(struct uart_port *port) 110 { 111 return sci_in(port, SCFDR) & SCIF_RFDC_MASK; 112 } 113 #endif 114 115 static int serial_rx_fifo_level(void) 116 { 117 return scif_rxfill(&sh_sci); 118 } 119 120 void serial_raw_putc(const char c) 121 { 122 while (1) { 123 /* Tx fifo is empty */ 124 if (sci_in(&sh_sci, SCxSR) & SCxSR_TEND(&sh_sci)) 125 break; 126 } 127 128 sci_out(&sh_sci, SCxTDR, c); 129 sci_out(&sh_sci, SCxSR, sci_in(&sh_sci, SCxSR) & ~SCxSR_TEND(&sh_sci)); 130 } 131 132 static void sh_serial_putc(const char c) 133 { 134 if (c == '\n') 135 serial_raw_putc('\r'); 136 serial_raw_putc(c); 137 } 138 139 static void sh_serial_puts(const char *s) 140 { 141 char c; 142 while ((c = *s++) != 0) 143 serial_putc(c); 144 } 145 146 static int sh_serial_tstc(void) 147 { 148 return serial_rx_fifo_level() ? 1 : 0; 149 } 150 151 void handle_error(void) 152 { 153 sci_in(&sh_sci, SCxSR); 154 sci_out(&sh_sci, SCxSR, SCxSR_ERROR_CLEAR(&sh_sci)); 155 sci_in(&sh_sci, SCLSR); 156 sci_out(&sh_sci, SCLSR, 0x00); 157 } 158 159 int serial_getc_check(void) 160 { 161 unsigned short status; 162 163 status = sci_in(&sh_sci, SCxSR); 164 165 if (status & SCIF_ERRORS) 166 handle_error(); 167 if (sci_in(&sh_sci, SCLSR) & SCxSR_ORER(&sh_sci)) 168 handle_error(); 169 return status & (SCIF_DR | SCxSR_RDxF(&sh_sci)); 170 } 171 172 static int sh_serial_getc(void) 173 { 174 unsigned short status; 175 char ch; 176 177 while (!serial_getc_check()) 178 ; 179 180 ch = sci_in(&sh_sci, SCxRDR); 181 status = sci_in(&sh_sci, SCxSR); 182 183 sci_out(&sh_sci, SCxSR, SCxSR_RDxF_CLEAR(&sh_sci)); 184 185 if (status & SCIF_ERRORS) 186 handle_error(); 187 188 if (sci_in(&sh_sci, SCLSR) & SCxSR_ORER(&sh_sci)) 189 handle_error(); 190 return ch; 191 } 192 193 static struct serial_device sh_serial_drv = { 194 .name = "sh_serial", 195 .start = sh_serial_init, 196 .stop = NULL, 197 .setbrg = sh_serial_setbrg, 198 .putc = sh_serial_putc, 199 .puts = sh_serial_puts, 200 .getc = sh_serial_getc, 201 .tstc = sh_serial_tstc, 202 }; 203 204 void sh_serial_initialize(void) 205 { 206 serial_register(&sh_serial_drv); 207 } 208 209 __weak struct serial_device *default_serial_console(void) 210 { 211 return &sh_serial_drv; 212 } 213