1 /* 2 * (C) Copyright 2009 SAMSUNG Electronics 3 * Minkyu Kang <mk7.kang@samsung.com> 4 * Heungjun Kim <riverful.kim@samsung.com> 5 * 6 * based on drivers/serial/s3c64xx.c 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #include <common.h> 12 #include <dm.h> 13 #include <errno.h> 14 #include <fdtdec.h> 15 #include <linux/compiler.h> 16 #include <asm/io.h> 17 #include <asm/arch/clk.h> 18 #include <asm/arch/uart.h> 19 #include <serial.h> 20 21 DECLARE_GLOBAL_DATA_PTR; 22 23 #define RX_FIFO_COUNT_SHIFT 0 24 #define RX_FIFO_COUNT_MASK (0xff << RX_FIFO_COUNT_SHIFT) 25 #define RX_FIFO_FULL (1 << 8) 26 #define TX_FIFO_COUNT_SHIFT 16 27 #define TX_FIFO_COUNT_MASK (0xff << TX_FIFO_COUNT_SHIFT) 28 #define TX_FIFO_FULL (1 << 24) 29 30 /* Information about a serial port */ 31 struct s5p_serial_platdata { 32 struct s5p_uart *reg; /* address of registers in physical memory */ 33 u8 port_id; /* uart port number */ 34 }; 35 36 /* 37 * The coefficient, used to calculate the baudrate on S5P UARTs is 38 * calculated as 39 * C = UBRDIV * 16 + number_of_set_bits_in_UDIVSLOT 40 * however, section 31.6.11 of the datasheet doesn't recomment using 1 for 1, 41 * 3 for 2, ... (2^n - 1) for n, instead, they suggest using these constants: 42 */ 43 static const int udivslot[] = { 44 0, 45 0x0080, 46 0x0808, 47 0x0888, 48 0x2222, 49 0x4924, 50 0x4a52, 51 0x54aa, 52 0x5555, 53 0xd555, 54 0xd5d5, 55 0xddd5, 56 0xdddd, 57 0xdfdd, 58 0xdfdf, 59 0xffdf, 60 }; 61 62 static void __maybe_unused s5p_serial_init(struct s5p_uart *uart) 63 { 64 /* enable FIFOs, auto clear Rx FIFO */ 65 writel(0x3, &uart->ufcon); 66 writel(0, &uart->umcon); 67 /* 8N1 */ 68 writel(0x3, &uart->ulcon); 69 /* No interrupts, no DMA, pure polling */ 70 writel(0x245, &uart->ucon); 71 } 72 73 static void __maybe_unused s5p_serial_baud(struct s5p_uart *uart, uint uclk, 74 int baudrate) 75 { 76 u32 val; 77 78 val = uclk / baudrate; 79 80 writel(val / 16 - 1, &uart->ubrdiv); 81 82 if (s5p_uart_divslot()) 83 writew(udivslot[val % 16], &uart->rest.slot); 84 else 85 writeb(val % 16, &uart->rest.value); 86 } 87 88 #ifndef CONFIG_SPL_BUILD 89 int s5p_serial_setbrg(struct udevice *dev, int baudrate) 90 { 91 struct s5p_serial_platdata *plat = dev->platdata; 92 struct s5p_uart *const uart = plat->reg; 93 u32 uclk = get_uart_clk(plat->port_id); 94 95 s5p_serial_baud(uart, uclk, baudrate); 96 97 return 0; 98 } 99 100 static int s5p_serial_probe(struct udevice *dev) 101 { 102 struct s5p_serial_platdata *plat = dev->platdata; 103 struct s5p_uart *const uart = plat->reg; 104 105 s5p_serial_init(uart); 106 107 return 0; 108 } 109 110 static int serial_err_check(const struct s5p_uart *const uart, int op) 111 { 112 unsigned int mask; 113 114 /* 115 * UERSTAT 116 * Break Detect [3] 117 * Frame Err [2] : receive operation 118 * Parity Err [1] : receive operation 119 * Overrun Err [0] : receive operation 120 */ 121 if (op) 122 mask = 0x8; 123 else 124 mask = 0xf; 125 126 return readl(&uart->uerstat) & mask; 127 } 128 129 static int s5p_serial_getc(struct udevice *dev) 130 { 131 struct s5p_serial_platdata *plat = dev->platdata; 132 struct s5p_uart *const uart = plat->reg; 133 134 if (!(readl(&uart->ufstat) & RX_FIFO_COUNT_MASK)) 135 return -EAGAIN; 136 137 serial_err_check(uart, 0); 138 return (int)(readb(&uart->urxh) & 0xff); 139 } 140 141 static int s5p_serial_putc(struct udevice *dev, const char ch) 142 { 143 struct s5p_serial_platdata *plat = dev->platdata; 144 struct s5p_uart *const uart = plat->reg; 145 146 if (readl(&uart->ufstat) & TX_FIFO_FULL) 147 return -EAGAIN; 148 149 writeb(ch, &uart->utxh); 150 serial_err_check(uart, 1); 151 152 return 0; 153 } 154 155 static int s5p_serial_pending(struct udevice *dev, bool input) 156 { 157 struct s5p_serial_platdata *plat = dev->platdata; 158 struct s5p_uart *const uart = plat->reg; 159 uint32_t ufstat = readl(&uart->ufstat); 160 161 if (input) 162 return (ufstat & RX_FIFO_COUNT_MASK) >> RX_FIFO_COUNT_SHIFT; 163 else 164 return (ufstat & TX_FIFO_COUNT_MASK) >> TX_FIFO_COUNT_SHIFT; 165 } 166 167 static int s5p_serial_ofdata_to_platdata(struct udevice *dev) 168 { 169 struct s5p_serial_platdata *plat = dev->platdata; 170 fdt_addr_t addr; 171 172 addr = dev_get_addr(dev); 173 if (addr == FDT_ADDR_T_NONE) 174 return -EINVAL; 175 176 plat->reg = (struct s5p_uart *)addr; 177 plat->port_id = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "id", -1); 178 179 return 0; 180 } 181 182 static const struct dm_serial_ops s5p_serial_ops = { 183 .putc = s5p_serial_putc, 184 .pending = s5p_serial_pending, 185 .getc = s5p_serial_getc, 186 .setbrg = s5p_serial_setbrg, 187 }; 188 189 static const struct udevice_id s5p_serial_ids[] = { 190 { .compatible = "samsung,exynos4210-uart" }, 191 { } 192 }; 193 194 U_BOOT_DRIVER(serial_s5p) = { 195 .name = "serial_s5p", 196 .id = UCLASS_SERIAL, 197 .of_match = s5p_serial_ids, 198 .ofdata_to_platdata = s5p_serial_ofdata_to_platdata, 199 .platdata_auto_alloc_size = sizeof(struct s5p_serial_platdata), 200 .probe = s5p_serial_probe, 201 .ops = &s5p_serial_ops, 202 .flags = DM_FLAG_PRE_RELOC, 203 }; 204 #endif 205 206 #ifdef CONFIG_DEBUG_UART_S5P 207 208 #include <debug_uart.h> 209 210 static inline void _debug_uart_init(void) 211 { 212 struct s5p_uart *uart = (struct s5p_uart *)CONFIG_DEBUG_UART_BASE; 213 214 s5p_serial_init(uart); 215 s5p_serial_baud(uart, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE); 216 } 217 218 static inline void _debug_uart_putc(int ch) 219 { 220 struct s5p_uart *uart = (struct s5p_uart *)CONFIG_DEBUG_UART_BASE; 221 222 while (readl(&uart->ufstat) & TX_FIFO_FULL); 223 224 writeb(ch, &uart->utxh); 225 } 226 227 DEBUG_UART_FUNCS 228 229 #endif 230