1 /* 2 * Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com) 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 * 8 */ 9 10 #include <common.h> 11 #include <dm.h> 12 #include <serial.h> 13 14 DECLARE_GLOBAL_DATA_PTR; 15 16 struct arc_serial_regs { 17 unsigned int id0; 18 unsigned int id1; 19 unsigned int id2; 20 unsigned int id3; 21 unsigned int data; 22 unsigned int status; 23 unsigned int baudl; 24 unsigned int baudh; 25 }; 26 27 28 struct arc_serial_platdata { 29 struct arc_serial_regs *reg; 30 unsigned int uartclk; 31 }; 32 33 /* Bit definitions of STATUS register */ 34 #define UART_RXEMPTY (1 << 5) 35 #define UART_OVERFLOW_ERR (1 << 1) 36 #define UART_TXEMPTY (1 << 7) 37 38 static int arc_serial_setbrg(struct udevice *dev, int baudrate) 39 { 40 struct arc_serial_platdata *plat = dev->platdata; 41 struct arc_serial_regs *const regs = plat->reg; 42 int arc_console_baud = gd->cpu_clk / (baudrate * 4) - 1; 43 44 writeb(arc_console_baud & 0xff, ®s->baudl); 45 46 #ifdef CONFIG_ARC 47 /* 48 * UART ISS(Instruction Set simulator) emulation has a subtle bug: 49 * A existing value of Baudh = 0 is used as a indication to startup 50 * it's internal state machine. 51 * Thus if baudh is set to 0, 2 times, it chokes. 52 * This happens with BAUD=115200 and the formaula above 53 * Until that is fixed, when running on ISS, we will set baudh to !0 54 */ 55 if (gd->arch.running_on_hw) 56 writeb((arc_console_baud & 0xff00) >> 8, ®s->baudh); 57 else 58 writeb(1, ®s->baudh); 59 #else 60 writeb((arc_console_baud & 0xff00) >> 8, ®s->baudh); 61 #endif 62 63 return 0; 64 } 65 66 static int arc_serial_putc(struct udevice *dev, const char c) 67 { 68 struct arc_serial_platdata *plat = dev->platdata; 69 struct arc_serial_regs *const regs = plat->reg; 70 71 while (!(readb(®s->status) & UART_TXEMPTY)) 72 ; 73 74 writeb(c, ®s->data); 75 76 return 0; 77 } 78 79 static int arc_serial_tstc(struct arc_serial_regs *const regs) 80 { 81 return !(readb(®s->status) & UART_RXEMPTY); 82 } 83 84 static int arc_serial_pending(struct udevice *dev, bool input) 85 { 86 struct arc_serial_platdata *plat = dev->platdata; 87 struct arc_serial_regs *const regs = plat->reg; 88 uint32_t status = readb(®s->status); 89 90 if (input) 91 return status & UART_RXEMPTY ? 0 : 1; 92 else 93 return status & UART_TXEMPTY ? 0 : 1; 94 } 95 96 static int arc_serial_getc(struct udevice *dev) 97 { 98 struct arc_serial_platdata *plat = dev->platdata; 99 struct arc_serial_regs *const regs = plat->reg; 100 101 while (!arc_serial_tstc(regs)) 102 ; 103 104 /* Check for overflow errors */ 105 if (readb(®s->status) & UART_OVERFLOW_ERR) 106 return 0; 107 108 return readb(®s->data) & 0xFF; 109 } 110 111 static int arc_serial_probe(struct udevice *dev) 112 { 113 return 0; 114 } 115 116 static const struct dm_serial_ops arc_serial_ops = { 117 .putc = arc_serial_putc, 118 .pending = arc_serial_pending, 119 .getc = arc_serial_getc, 120 .setbrg = arc_serial_setbrg, 121 }; 122 123 static const struct udevice_id arc_serial_ids[] = { 124 { .compatible = "snps,arc-uart" }, 125 { } 126 }; 127 128 static int arc_serial_ofdata_to_platdata(struct udevice *dev) 129 { 130 struct arc_serial_platdata *plat = dev_get_platdata(dev); 131 DECLARE_GLOBAL_DATA_PTR; 132 133 plat->reg = (struct arc_serial_regs *)dev_get_addr(dev); 134 plat->uartclk = fdtdec_get_int(gd->fdt_blob, dev->of_offset, 135 "clock-frequency", 0); 136 137 return 0; 138 } 139 140 U_BOOT_DRIVER(serial_arc) = { 141 .name = "serial_arc", 142 .id = UCLASS_SERIAL, 143 .of_match = arc_serial_ids, 144 .ofdata_to_platdata = arc_serial_ofdata_to_platdata, 145 .probe = arc_serial_probe, 146 .ops = &arc_serial_ops, 147 .flags = DM_FLAG_PRE_RELOC, 148 }; 149