1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
4  */
5 
6 #include <common.h>
7 #include <dm.h>
8 #include <div64.h>
9 #include <errno.h>
10 #include <serial.h>
11 #include <asm/io.h>
12 #include <asm/addrspace.h>
13 #include <asm/types.h>
14 #include <dm/pinctrl.h>
15 #include <mach/ar71xx_regs.h>
16 
17 #define AR933X_UART_DATA_REG            0x00
18 #define AR933X_UART_CS_REG              0x04
19 #define AR933X_UART_CLK_REG             0x08
20 
21 #define AR933X_UART_DATA_TX_RX_MASK     0xff
22 #define AR933X_UART_DATA_RX_CSR         BIT(8)
23 #define AR933X_UART_DATA_TX_CSR         BIT(9)
24 #define AR933X_UART_CS_IF_MODE_S        2
25 #define AR933X_UART_CS_IF_MODE_M        0x3
26 #define AR933X_UART_CS_IF_MODE_DTE      1
27 #define AR933X_UART_CS_IF_MODE_DCE      2
28 #define AR933X_UART_CS_TX_RDY_ORIDE     BIT(7)
29 #define AR933X_UART_CS_RX_RDY_ORIDE     BIT(8)
30 #define AR933X_UART_CLK_STEP_M          0xffff
31 #define AR933X_UART_CLK_SCALE_M         0xfff
32 #define AR933X_UART_CLK_SCALE_S         16
33 #define AR933X_UART_CLK_STEP_S          0
34 
35 struct ar933x_serial_priv {
36 	void __iomem *regs;
37 };
38 
39 /*
40  * Baudrate algorithm come from Linux/drivers/tty/serial/ar933x_uart.c
41  * baudrate = (clk / (scale + 1)) * (step * (1 / 2^17))
42  */
ar933x_serial_get_baud(u32 clk,u32 scale,u32 step)43 static u32 ar933x_serial_get_baud(u32 clk, u32 scale, u32 step)
44 {
45 	u64 t;
46 	u32 div;
47 
48 	div = (2 << 16) * (scale + 1);
49 	t = clk;
50 	t *= step;
51 	t += (div / 2);
52 	do_div(t, div);
53 
54 	return t;
55 }
56 
ar933x_serial_get_scale_step(u32 clk,u32 baud,u32 * scale,u32 * step)57 static void ar933x_serial_get_scale_step(u32 clk, u32 baud,
58 					 u32 *scale, u32 *step)
59 {
60 	u32 tscale, baudrate;
61 	long min_diff;
62 
63 	*scale = 0;
64 	*step = 0;
65 
66 	min_diff = baud;
67 	for (tscale = 0; tscale < AR933X_UART_CLK_SCALE_M; tscale++) {
68 		u64 tstep;
69 		int diff;
70 
71 		tstep = baud * (tscale + 1);
72 		tstep *= (2 << 16);
73 		do_div(tstep, clk);
74 
75 		if (tstep > AR933X_UART_CLK_STEP_M)
76 			break;
77 
78 		baudrate = ar933x_serial_get_baud(clk, tscale, tstep);
79 		diff = abs(baudrate - baud);
80 		if (diff < min_diff) {
81 			min_diff = diff;
82 			*scale = tscale;
83 			*step = tstep;
84 		}
85 	}
86 }
87 
ar933x_serial_setbrg(struct udevice * dev,int baudrate)88 static int ar933x_serial_setbrg(struct udevice *dev, int baudrate)
89 {
90 	struct ar933x_serial_priv *priv = dev_get_priv(dev);
91 	u32 val, scale, step;
92 
93 	val = get_serial_clock();
94 	ar933x_serial_get_scale_step(val, baudrate, &scale, &step);
95 
96 	val  = (scale & AR933X_UART_CLK_SCALE_M)
97 			<< AR933X_UART_CLK_SCALE_S;
98 	val |= (step & AR933X_UART_CLK_STEP_M)
99 			<< AR933X_UART_CLK_STEP_S;
100 	writel(val, priv->regs + AR933X_UART_CLK_REG);
101 
102 	return 0;
103 }
104 
ar933x_serial_putc(struct udevice * dev,const char c)105 static int ar933x_serial_putc(struct udevice *dev, const char c)
106 {
107 	struct ar933x_serial_priv *priv = dev_get_priv(dev);
108 	u32 data;
109 
110 	data = readl(priv->regs + AR933X_UART_DATA_REG);
111 	if (!(data & AR933X_UART_DATA_TX_CSR))
112 		return -EAGAIN;
113 
114 	data  = (u32)c | AR933X_UART_DATA_TX_CSR;
115 	writel(data, priv->regs + AR933X_UART_DATA_REG);
116 
117 	return 0;
118 }
119 
ar933x_serial_getc(struct udevice * dev)120 static int ar933x_serial_getc(struct udevice *dev)
121 {
122 	struct ar933x_serial_priv *priv = dev_get_priv(dev);
123 	u32 data;
124 
125 	data = readl(priv->regs + AR933X_UART_DATA_REG);
126 	if (!(data & AR933X_UART_DATA_RX_CSR))
127 		return -EAGAIN;
128 
129 	writel(AR933X_UART_DATA_RX_CSR, priv->regs + AR933X_UART_DATA_REG);
130 	return data & AR933X_UART_DATA_TX_RX_MASK;
131 }
132 
ar933x_serial_pending(struct udevice * dev,bool input)133 static int ar933x_serial_pending(struct udevice *dev, bool input)
134 {
135 	struct ar933x_serial_priv *priv = dev_get_priv(dev);
136 	u32 data;
137 
138 	data = readl(priv->regs + AR933X_UART_DATA_REG);
139 	if (input)
140 		return (data & AR933X_UART_DATA_RX_CSR) ? 1 : 0;
141 	else
142 		return (data & AR933X_UART_DATA_TX_CSR) ? 0 : 1;
143 }
144 
ar933x_serial_probe(struct udevice * dev)145 static int ar933x_serial_probe(struct udevice *dev)
146 {
147 	struct ar933x_serial_priv *priv = dev_get_priv(dev);
148 	fdt_addr_t addr;
149 	u32 val;
150 
151 	addr = devfdt_get_addr(dev);
152 	if (addr == FDT_ADDR_T_NONE)
153 		return -EINVAL;
154 
155 	priv->regs = map_physmem(addr, AR933X_UART_SIZE,
156 				 MAP_NOCACHE);
157 
158 	/*
159 	 * UART controller configuration:
160 	 * - no DMA
161 	 * - no interrupt
162 	 * - DCE mode
163 	 * - no flow control
164 	 * - set RX ready oride
165 	 * - set TX ready oride
166 	 */
167 	val = (AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S) |
168 	      AR933X_UART_CS_TX_RDY_ORIDE | AR933X_UART_CS_RX_RDY_ORIDE;
169 	writel(val, priv->regs + AR933X_UART_CS_REG);
170 	return 0;
171 }
172 
173 static const struct dm_serial_ops ar933x_serial_ops = {
174 	.putc = ar933x_serial_putc,
175 	.pending = ar933x_serial_pending,
176 	.getc = ar933x_serial_getc,
177 	.setbrg = ar933x_serial_setbrg,
178 };
179 
180 static const struct udevice_id ar933x_serial_ids[] = {
181 	{ .compatible = "qca,ar9330-uart" },
182 	{ }
183 };
184 
185 U_BOOT_DRIVER(serial_ar933x) = {
186 	.name   = "serial_ar933x",
187 	.id = UCLASS_SERIAL,
188 	.of_match = ar933x_serial_ids,
189 	.priv_auto_alloc_size = sizeof(struct ar933x_serial_priv),
190 	.probe = ar933x_serial_probe,
191 	.ops    = &ar933x_serial_ops,
192 };
193 
194 #ifdef CONFIG_DEBUG_UART_AR933X
195 
196 #include <debug_uart.h>
197 
_debug_uart_init(void)198 static inline void _debug_uart_init(void)
199 {
200 	void __iomem *regs = (void *)CONFIG_DEBUG_UART_BASE;
201 	u32 val, scale, step;
202 
203 	/*
204 	 * UART controller configuration:
205 	 * - no DMA
206 	 * - no interrupt
207 	 * - DCE mode
208 	 * - no flow control
209 	 * - set RX ready oride
210 	 * - set TX ready oride
211 	 */
212 	val = (AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S) |
213 	      AR933X_UART_CS_TX_RDY_ORIDE | AR933X_UART_CS_RX_RDY_ORIDE;
214 	writel(val, regs + AR933X_UART_CS_REG);
215 
216 	ar933x_serial_get_scale_step(CONFIG_DEBUG_UART_CLOCK,
217 				     CONFIG_BAUDRATE, &scale, &step);
218 
219 	val  = (scale & AR933X_UART_CLK_SCALE_M)
220 			<< AR933X_UART_CLK_SCALE_S;
221 	val |= (step & AR933X_UART_CLK_STEP_M)
222 			<< AR933X_UART_CLK_STEP_S;
223 	writel(val, regs + AR933X_UART_CLK_REG);
224 }
225 
_debug_uart_putc(int c)226 static inline void _debug_uart_putc(int c)
227 {
228 	void __iomem *regs = (void *)CONFIG_DEBUG_UART_BASE;
229 	u32 data;
230 
231 	do {
232 		data = readl(regs + AR933X_UART_DATA_REG);
233 	} while (!(data & AR933X_UART_DATA_TX_CSR));
234 
235 	data  = (u32)c | AR933X_UART_DATA_TX_CSR;
236 	writel(data, regs + AR933X_UART_DATA_REG);
237 }
238 
239 DEBUG_UART_FUNCS
240 
241 #endif
242