1 /* 2 * COM1 NS16550 support 3 * originally from linux source (arch/powerpc/boot/ns16550.c) 4 * modified to use CONFIG_SYS_ISA_MEM and new defines 5 */ 6 7 #include <common.h> 8 #include <clk.h> 9 #include <dm.h> 10 #include <errno.h> 11 #include <ns16550.h> 12 #include <reset.h> 13 #include <serial.h> 14 #include <watchdog.h> 15 #include <linux/types.h> 16 #include <asm/io.h> 17 18 DECLARE_GLOBAL_DATA_PTR; 19 20 #define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */ 21 #define UART_MCRVAL (UART_MCR_DTR | \ 22 UART_MCR_RTS) /* RTS/DTR */ 23 24 #ifndef CONFIG_DM_SERIAL 25 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED 26 #define serial_out(x, y) outb(x, (ulong)y) 27 #define serial_in(y) inb((ulong)y) 28 #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0) 29 #define serial_out(x, y) out_be32(y, x) 30 #define serial_in(y) in_be32(y) 31 #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0) 32 #define serial_out(x, y) out_le32(y, x) 33 #define serial_in(y) in_le32(y) 34 #else 35 #define serial_out(x, y) writeb(x, y) 36 #define serial_in(y) readb(y) 37 #endif 38 #endif /* !CONFIG_DM_SERIAL */ 39 40 #if defined(CONFIG_SOC_KEYSTONE) 41 #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0 42 #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0)) 43 #undef UART_MCRVAL 44 #ifdef CONFIG_SERIAL_HW_FLOW_CONTROL 45 #define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE) 46 #else 47 #define UART_MCRVAL (UART_MCR_RTS) 48 #endif 49 #endif 50 51 #ifndef CONFIG_SYS_NS16550_IER 52 #define CONFIG_SYS_NS16550_IER 0x00 53 #endif /* CONFIG_SYS_NS16550_IER */ 54 55 static inline void serial_out_shift(void *addr, int shift, int value) 56 { 57 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED 58 outb(value, (ulong)addr); 59 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN) 60 out_le32(addr, value); 61 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) 62 out_be32(addr, value); 63 #elif defined(CONFIG_SYS_NS16550_MEM32) 64 writel(value, addr); 65 #elif defined(CONFIG_SYS_BIG_ENDIAN) 66 writeb(value, addr + (1 << shift) - 1); 67 #else 68 writeb(value, addr); 69 #endif 70 } 71 72 static inline int serial_in_shift(void *addr, int shift) 73 { 74 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED 75 return inb((ulong)addr); 76 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN) 77 return in_le32(addr); 78 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) 79 return in_be32(addr); 80 #elif defined(CONFIG_SYS_NS16550_MEM32) 81 return readl(addr); 82 #elif defined(CONFIG_SYS_BIG_ENDIAN) 83 return readb(addr + (1 << shift) - 1); 84 #else 85 return readb(addr); 86 #endif 87 } 88 89 #ifdef CONFIG_DM_SERIAL 90 91 #ifndef CONFIG_SYS_NS16550_CLK 92 #define CONFIG_SYS_NS16550_CLK 0 93 #endif 94 95 static void ns16550_writeb(NS16550_t port, int offset, int value) 96 { 97 struct ns16550_platdata *plat = port->plat; 98 unsigned char *addr; 99 100 offset *= 1 << plat->reg_shift; 101 addr = (unsigned char *)plat->base + offset; 102 103 /* 104 * As far as we know it doesn't make sense to support selection of 105 * these options at run-time, so use the existing CONFIG options. 106 */ 107 serial_out_shift(addr + plat->reg_offset, plat->reg_shift, value); 108 } 109 110 static int ns16550_readb(NS16550_t port, int offset) 111 { 112 struct ns16550_platdata *plat = port->plat; 113 unsigned char *addr; 114 115 offset *= 1 << plat->reg_shift; 116 addr = (unsigned char *)plat->base + offset; 117 118 return serial_in_shift(addr + plat->reg_offset, plat->reg_shift); 119 } 120 121 static u32 ns16550_getfcr(NS16550_t port) 122 { 123 struct ns16550_platdata *plat = port->plat; 124 125 return plat->fcr; 126 } 127 128 /* We can clean these up once everything is moved to driver model */ 129 #define serial_out(value, addr) \ 130 ns16550_writeb(com_port, \ 131 (unsigned char *)addr - (unsigned char *)com_port, value) 132 #define serial_in(addr) \ 133 ns16550_readb(com_port, \ 134 (unsigned char *)addr - (unsigned char *)com_port) 135 #else 136 static u32 ns16550_getfcr(NS16550_t port) 137 { 138 return UART_FCR_DEFVAL; 139 } 140 #endif 141 142 int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate) 143 { 144 const unsigned int mode_x_div = 16; 145 146 return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate); 147 } 148 149 static void NS16550_setbrg(NS16550_t com_port, int baud_divisor) 150 { 151 serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr); 152 serial_out(baud_divisor & 0xff, &com_port->dll); 153 serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm); 154 serial_out(UART_LCRVAL, &com_port->lcr); 155 } 156 157 void NS16550_init(NS16550_t com_port, int baud_divisor) 158 { 159 #if (defined(CONFIG_SPL_BUILD) && \ 160 (defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX))) 161 /* 162 * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode 163 * before SPL starts only THRE bit is set. We have to empty the 164 * transmitter before initialization starts. 165 */ 166 if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE)) 167 == UART_LSR_THRE) { 168 if (baud_divisor != -1) 169 NS16550_setbrg(com_port, baud_divisor); 170 serial_out(0, &com_port->mdr1); 171 } 172 #endif 173 174 while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT)) 175 ; 176 177 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier); 178 #if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_OMAP_SERIAL) 179 serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/ 180 #endif 181 182 serial_out(UART_MCRVAL, &com_port->mcr); 183 serial_out(ns16550_getfcr(com_port), &com_port->fcr); 184 if (baud_divisor != -1) 185 NS16550_setbrg(com_port, baud_divisor); 186 #if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_SOC_DA8XX) || \ 187 defined(CONFIG_OMAP_SERIAL) 188 /* /16 is proper to hit 115200 with 48MHz */ 189 serial_out(0, &com_port->mdr1); 190 #endif 191 #if defined(CONFIG_SOC_KEYSTONE) 192 serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC); 193 #endif 194 } 195 196 #ifndef CONFIG_NS16550_MIN_FUNCTIONS 197 void NS16550_reinit(NS16550_t com_port, int baud_divisor) 198 { 199 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier); 200 NS16550_setbrg(com_port, 0); 201 serial_out(UART_MCRVAL, &com_port->mcr); 202 serial_out(ns16550_getfcr(com_port), &com_port->fcr); 203 NS16550_setbrg(com_port, baud_divisor); 204 } 205 #endif /* CONFIG_NS16550_MIN_FUNCTIONS */ 206 207 void NS16550_putc(NS16550_t com_port, char c) 208 { 209 while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0) 210 ; 211 serial_out(c, &com_port->thr); 212 213 /* 214 * Call watchdog_reset() upon newline. This is done here in putc 215 * since the environment code uses a single puts() to print the complete 216 * environment upon "printenv". So we can't put this watchdog call 217 * in puts(). 218 */ 219 if (c == '\n') 220 WATCHDOG_RESET(); 221 } 222 223 #ifndef CONFIG_NS16550_MIN_FUNCTIONS 224 char NS16550_getc(NS16550_t com_port) 225 { 226 while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) { 227 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY) 228 extern void usbtty_poll(void); 229 usbtty_poll(); 230 #endif 231 WATCHDOG_RESET(); 232 } 233 return serial_in(&com_port->rbr); 234 } 235 236 int NS16550_tstc(NS16550_t com_port) 237 { 238 return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0; 239 } 240 241 #endif /* CONFIG_NS16550_MIN_FUNCTIONS */ 242 243 #ifdef CONFIG_DEBUG_UART_NS16550 244 245 #include <debug_uart.h> 246 247 static inline void _debug_uart_init(void) 248 { 249 struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; 250 int baud_divisor; 251 252 /* 253 * We copy the code from above because it is already horribly messy. 254 * Trying to refactor to nicely remove the duplication doesn't seem 255 * feasible. The better fix is to move all users of this driver to 256 * driver model. 257 */ 258 baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK, 259 CONFIG_BAUDRATE); 260 serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER); 261 serial_dout(&com_port->mcr, UART_MCRVAL); 262 serial_dout(&com_port->fcr, UART_FCR_DEFVAL); 263 264 serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL); 265 serial_dout(&com_port->dll, baud_divisor & 0xff); 266 serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff); 267 serial_dout(&com_port->lcr, UART_LCRVAL); 268 } 269 270 static inline void _debug_uart_putc(int ch) 271 { 272 struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; 273 274 while (!(serial_din(&com_port->lsr) & UART_LSR_THRE)) 275 ; 276 serial_dout(&com_port->thr, ch); 277 } 278 279 DEBUG_UART_FUNCS 280 281 #endif 282 283 #ifdef CONFIG_DM_SERIAL 284 static int ns16550_serial_putc(struct udevice *dev, const char ch) 285 { 286 struct NS16550 *const com_port = dev_get_priv(dev); 287 288 if (!(serial_in(&com_port->lsr) & UART_LSR_THRE)) 289 return -EAGAIN; 290 serial_out(ch, &com_port->thr); 291 292 /* 293 * Call watchdog_reset() upon newline. This is done here in putc 294 * since the environment code uses a single puts() to print the complete 295 * environment upon "printenv". So we can't put this watchdog call 296 * in puts(). 297 */ 298 if (ch == '\n') 299 WATCHDOG_RESET(); 300 301 return 0; 302 } 303 304 static int ns16550_serial_pending(struct udevice *dev, bool input) 305 { 306 struct NS16550 *const com_port = dev_get_priv(dev); 307 308 if (input) 309 return (serial_in(&com_port->lsr) & UART_LSR_DR) ? 1 : 0; 310 else 311 return (serial_in(&com_port->lsr) & UART_LSR_THRE) ? 0 : 1; 312 } 313 314 static int ns16550_serial_getc(struct udevice *dev) 315 { 316 struct NS16550 *const com_port = dev_get_priv(dev); 317 318 if (!(serial_in(&com_port->lsr) & UART_LSR_DR)) 319 return -EAGAIN; 320 321 return serial_in(&com_port->rbr); 322 } 323 324 static int ns16550_serial_setbrg(struct udevice *dev, int baudrate) 325 { 326 struct NS16550 *const com_port = dev_get_priv(dev); 327 struct ns16550_platdata *plat = com_port->plat; 328 int clock_divisor; 329 330 clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate); 331 332 NS16550_setbrg(com_port, clock_divisor); 333 334 return 0; 335 } 336 337 int ns16550_serial_probe(struct udevice *dev) 338 { 339 struct NS16550 *const com_port = dev_get_priv(dev); 340 struct reset_ctl_bulk reset_bulk; 341 int ret; 342 343 ret = reset_get_bulk(dev, &reset_bulk); 344 if (!ret) 345 reset_deassert_bulk(&reset_bulk); 346 347 com_port->plat = dev_get_platdata(dev); 348 NS16550_init(com_port, -1); 349 350 return 0; 351 } 352 353 #if CONFIG_IS_ENABLED(OF_CONTROL) 354 enum { 355 PORT_NS16550 = 0, 356 PORT_JZ4780, 357 }; 358 #endif 359 360 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) 361 int ns16550_serial_ofdata_to_platdata(struct udevice *dev) 362 { 363 struct ns16550_platdata *plat = dev->platdata; 364 const u32 port_type = dev_get_driver_data(dev); 365 fdt_addr_t addr; 366 struct clk clk; 367 int err; 368 369 /* try Processor Local Bus device first */ 370 addr = dev_read_addr(dev); 371 #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI) 372 if (addr == FDT_ADDR_T_NONE) { 373 /* then try pci device */ 374 struct fdt_pci_addr pci_addr; 375 u32 bar; 376 int ret; 377 378 /* we prefer to use a memory-mapped register */ 379 ret = fdtdec_get_pci_addr(gd->fdt_blob, dev_of_offset(dev), 380 FDT_PCI_SPACE_MEM32, "reg", 381 &pci_addr); 382 if (ret) { 383 /* try if there is any i/o-mapped register */ 384 ret = fdtdec_get_pci_addr(gd->fdt_blob, 385 dev_of_offset(dev), 386 FDT_PCI_SPACE_IO, 387 "reg", &pci_addr); 388 if (ret) 389 return ret; 390 } 391 392 ret = fdtdec_get_pci_bar32(dev, &pci_addr, &bar); 393 if (ret) 394 return ret; 395 396 addr = bar; 397 } 398 #endif 399 400 if (addr == FDT_ADDR_T_NONE) 401 return -EINVAL; 402 403 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED 404 plat->base = addr; 405 #else 406 plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE); 407 #endif 408 409 plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0); 410 plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0); 411 412 err = clk_get_by_index(dev, 0, &clk); 413 if (!err) { 414 err = clk_get_rate(&clk); 415 if (!IS_ERR_VALUE(err)) 416 plat->clock = err; 417 } else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) { 418 debug("ns16550 failed to get clock\n"); 419 return err; 420 } 421 422 if (!plat->clock) 423 plat->clock = dev_read_u32_default(dev, "clock-frequency", 424 CONFIG_SYS_NS16550_CLK); 425 if (!plat->clock) { 426 debug("ns16550 clock not defined\n"); 427 return -EINVAL; 428 } 429 430 plat->fcr = UART_FCR_DEFVAL; 431 if (port_type == PORT_JZ4780) 432 plat->fcr |= UART_FCR_UME; 433 434 return 0; 435 } 436 #endif 437 438 const struct dm_serial_ops ns16550_serial_ops = { 439 .putc = ns16550_serial_putc, 440 .pending = ns16550_serial_pending, 441 .getc = ns16550_serial_getc, 442 .setbrg = ns16550_serial_setbrg, 443 }; 444 445 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) 446 /* 447 * Please consider existing compatible strings before adding a new 448 * one to keep this table compact. Or you may add a generic "ns16550" 449 * compatible string to your dts. 450 */ 451 static const struct udevice_id ns16550_serial_ids[] = { 452 { .compatible = "ns16550", .data = PORT_NS16550 }, 453 { .compatible = "ns16550a", .data = PORT_NS16550 }, 454 { .compatible = "ingenic,jz4780-uart", .data = PORT_JZ4780 }, 455 { .compatible = "nvidia,tegra20-uart", .data = PORT_NS16550 }, 456 { .compatible = "snps,dw-apb-uart", .data = PORT_NS16550 }, 457 {} 458 }; 459 #endif /* OF_CONTROL && !OF_PLATDATA */ 460 461 #if CONFIG_IS_ENABLED(SERIAL_PRESENT) 462 463 /* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */ 464 #if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL) 465 U_BOOT_DRIVER(ns16550_serial) = { 466 .name = "ns16550_serial", 467 .id = UCLASS_SERIAL, 468 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) 469 .of_match = ns16550_serial_ids, 470 .ofdata_to_platdata = ns16550_serial_ofdata_to_platdata, 471 .platdata_auto_alloc_size = sizeof(struct ns16550_platdata), 472 #endif 473 .priv_auto_alloc_size = sizeof(struct NS16550), 474 .probe = ns16550_serial_probe, 475 .ops = &ns16550_serial_ops, 476 .flags = DM_FLAG_PRE_RELOC, 477 }; 478 #endif 479 #endif /* SERIAL_PRESENT */ 480 481 #endif /* CONFIG_DM_SERIAL */ 482