xref: /openbmc/u-boot/drivers/serial/ns16550.c (revision 70b95ded)
1 /*
2  * COM1 NS16550 support
3  * originally from linux source (arch/powerpc/boot/ns16550.c)
4  * modified to use CONFIG_SYS_ISA_MEM and new defines
5  */
6 
7 #include <common.h>
8 #include <clk.h>
9 #include <dm.h>
10 #include <errno.h>
11 #include <fdtdec.h>
12 #include <ns16550.h>
13 #include <serial.h>
14 #include <watchdog.h>
15 #include <linux/types.h>
16 #include <asm/io.h>
17 
18 DECLARE_GLOBAL_DATA_PTR;
19 
20 #define UART_LCRVAL UART_LCR_8N1		/* 8 data, 1 stop, no parity */
21 #define UART_MCRVAL (UART_MCR_DTR | \
22 		     UART_MCR_RTS)		/* RTS/DTR */
23 
24 #ifndef CONFIG_DM_SERIAL
25 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
26 #define serial_out(x, y)	outb(x, (ulong)y)
27 #define serial_in(y)		inb((ulong)y)
28 #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
29 #define serial_out(x, y)	out_be32(y, x)
30 #define serial_in(y)		in_be32(y)
31 #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
32 #define serial_out(x, y)	out_le32(y, x)
33 #define serial_in(y)		in_le32(y)
34 #else
35 #define serial_out(x, y)	writeb(x, y)
36 #define serial_in(y)		readb(y)
37 #endif
38 #endif /* !CONFIG_DM_SERIAL */
39 
40 #if defined(CONFIG_SOC_KEYSTONE)
41 #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE   0
42 #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
43 #undef UART_MCRVAL
44 #ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
45 #define UART_MCRVAL             (UART_MCR_RTS | UART_MCR_AFE)
46 #else
47 #define UART_MCRVAL             (UART_MCR_RTS)
48 #endif
49 #endif
50 
51 #ifndef CONFIG_SYS_NS16550_IER
52 #define CONFIG_SYS_NS16550_IER  0x00
53 #endif /* CONFIG_SYS_NS16550_IER */
54 
55 static inline void serial_out_shift(void *addr, int shift, int value)
56 {
57 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
58 	outb(value, (ulong)addr);
59 #elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
60 	out_le32(addr, value);
61 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
62 	out_be32(addr, value);
63 #elif defined(CONFIG_SYS_NS16550_MEM32)
64 	writel(value, addr);
65 #elif defined(CONFIG_SYS_BIG_ENDIAN)
66 	writeb(value, addr + (1 << shift) - 1);
67 #else
68 	writeb(value, addr);
69 #endif
70 }
71 
72 static inline int serial_in_shift(void *addr, int shift)
73 {
74 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
75 	return inb((ulong)addr);
76 #elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
77 	return in_le32(addr);
78 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
79 	return in_be32(addr);
80 #elif defined(CONFIG_SYS_NS16550_MEM32)
81 	return readl(addr);
82 #elif defined(CONFIG_SYS_BIG_ENDIAN)
83 	return readb(addr + (1 << shift) - 1);
84 #else
85 	return readb(addr);
86 #endif
87 }
88 
89 #ifdef CONFIG_DM_SERIAL
90 
91 #ifndef CONFIG_SYS_NS16550_CLK
92 #define CONFIG_SYS_NS16550_CLK  0
93 #endif
94 
95 static void ns16550_writeb(NS16550_t port, int offset, int value)
96 {
97 	struct ns16550_platdata *plat = port->plat;
98 	unsigned char *addr;
99 
100 	offset *= 1 << plat->reg_shift;
101 	addr = (unsigned char *)plat->base + offset;
102 
103 	/*
104 	 * As far as we know it doesn't make sense to support selection of
105 	 * these options at run-time, so use the existing CONFIG options.
106 	 */
107 	serial_out_shift(addr + plat->reg_offset, plat->reg_shift, value);
108 }
109 
110 static int ns16550_readb(NS16550_t port, int offset)
111 {
112 	struct ns16550_platdata *plat = port->plat;
113 	unsigned char *addr;
114 
115 	offset *= 1 << plat->reg_shift;
116 	addr = (unsigned char *)plat->base + offset;
117 
118 	return serial_in_shift(addr + plat->reg_offset, plat->reg_shift);
119 }
120 
121 static u32 ns16550_getfcr(NS16550_t port)
122 {
123 	struct ns16550_platdata *plat = port->plat;
124 
125 	return plat->fcr;
126 }
127 
128 /* We can clean these up once everything is moved to driver model */
129 #define serial_out(value, addr)	\
130 	ns16550_writeb(com_port, \
131 		(unsigned char *)addr - (unsigned char *)com_port, value)
132 #define serial_in(addr) \
133 	ns16550_readb(com_port, \
134 		(unsigned char *)addr - (unsigned char *)com_port)
135 #else
136 static u32 ns16550_getfcr(NS16550_t port)
137 {
138 	return UART_FCR_DEFVAL;
139 }
140 #endif
141 
142 int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
143 {
144 	const unsigned int mode_x_div = 16;
145 
146 	return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
147 }
148 
149 static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
150 {
151 	serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr);
152 	serial_out(baud_divisor & 0xff, &com_port->dll);
153 	serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
154 	serial_out(UART_LCRVAL, &com_port->lcr);
155 }
156 
157 void NS16550_init(NS16550_t com_port, int baud_divisor)
158 {
159 #if (defined(CONFIG_SPL_BUILD) && \
160 		(defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
161 	/*
162 	 * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
163 	 * before SPL starts only THRE bit is set. We have to empty the
164 	 * transmitter before initialization starts.
165 	 */
166 	if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE))
167 	     == UART_LSR_THRE) {
168 		if (baud_divisor != -1)
169 			NS16550_setbrg(com_port, baud_divisor);
170 		serial_out(0, &com_port->mdr1);
171 	}
172 #endif
173 
174 	while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
175 		;
176 
177 	serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
178 #if defined(CONFIG_ARCH_OMAP2PLUS)
179 	serial_out(0x7, &com_port->mdr1);	/* mode select reset TL16C750*/
180 #endif
181 	serial_out(UART_MCRVAL, &com_port->mcr);
182 	serial_out(ns16550_getfcr(com_port), &com_port->fcr);
183 	if (baud_divisor != -1)
184 		NS16550_setbrg(com_port, baud_divisor);
185 #if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_SOC_DA8XX)
186 	/* /16 is proper to hit 115200 with 48MHz */
187 	serial_out(0, &com_port->mdr1);
188 #endif
189 #if defined(CONFIG_SOC_KEYSTONE)
190 	serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
191 #endif
192 }
193 
194 #ifndef CONFIG_NS16550_MIN_FUNCTIONS
195 void NS16550_reinit(NS16550_t com_port, int baud_divisor)
196 {
197 	serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
198 	NS16550_setbrg(com_port, 0);
199 	serial_out(UART_MCRVAL, &com_port->mcr);
200 	serial_out(ns16550_getfcr(com_port), &com_port->fcr);
201 	NS16550_setbrg(com_port, baud_divisor);
202 }
203 #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
204 
205 void NS16550_putc(NS16550_t com_port, char c)
206 {
207 	while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
208 		;
209 	serial_out(c, &com_port->thr);
210 
211 	/*
212 	 * Call watchdog_reset() upon newline. This is done here in putc
213 	 * since the environment code uses a single puts() to print the complete
214 	 * environment upon "printenv". So we can't put this watchdog call
215 	 * in puts().
216 	 */
217 	if (c == '\n')
218 		WATCHDOG_RESET();
219 }
220 
221 #ifndef CONFIG_NS16550_MIN_FUNCTIONS
222 char NS16550_getc(NS16550_t com_port)
223 {
224 	while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
225 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
226 		extern void usbtty_poll(void);
227 		usbtty_poll();
228 #endif
229 		WATCHDOG_RESET();
230 	}
231 	return serial_in(&com_port->rbr);
232 }
233 
234 int NS16550_tstc(NS16550_t com_port)
235 {
236 	return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
237 }
238 
239 #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
240 
241 #ifdef CONFIG_DEBUG_UART_NS16550
242 
243 #include <debug_uart.h>
244 
245 static inline void _debug_uart_init(void)
246 {
247 	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
248 	int baud_divisor;
249 
250 	/*
251 	 * We copy the code from above because it is already horribly messy.
252 	 * Trying to refactor to nicely remove the duplication doesn't seem
253 	 * feasible. The better fix is to move all users of this driver to
254 	 * driver model.
255 	 */
256 	baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
257 					    CONFIG_BAUDRATE);
258 	serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
259 	serial_dout(&com_port->mcr, UART_MCRVAL);
260 	serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
261 
262 	serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
263 	serial_dout(&com_port->dll, baud_divisor & 0xff);
264 	serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
265 	serial_dout(&com_port->lcr, UART_LCRVAL);
266 }
267 
268 static inline void _debug_uart_putc(int ch)
269 {
270 	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
271 
272 	while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
273 		;
274 	serial_dout(&com_port->thr, ch);
275 }
276 
277 DEBUG_UART_FUNCS
278 
279 #endif
280 
281 #ifdef CONFIG_DEBUG_UART_OMAP
282 
283 #include <debug_uart.h>
284 
285 static inline void _debug_uart_init(void)
286 {
287 	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
288 	int baud_divisor;
289 
290 	baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
291 					    CONFIG_BAUDRATE);
292 	serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
293 	serial_dout(&com_port->mdr1, 0x7);
294 	serial_dout(&com_port->mcr, UART_MCRVAL);
295 	serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
296 
297 	serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
298 	serial_dout(&com_port->dll, baud_divisor & 0xff);
299 	serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
300 	serial_dout(&com_port->lcr, UART_LCRVAL);
301 	serial_dout(&com_port->mdr1, 0x0);
302 }
303 
304 static inline void _debug_uart_putc(int ch)
305 {
306 	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
307 
308 	while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
309 		;
310 	serial_dout(&com_port->thr, ch);
311 }
312 
313 DEBUG_UART_FUNCS
314 
315 #endif
316 
317 #ifdef CONFIG_DM_SERIAL
318 static int ns16550_serial_putc(struct udevice *dev, const char ch)
319 {
320 	struct NS16550 *const com_port = dev_get_priv(dev);
321 
322 	if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
323 		return -EAGAIN;
324 	serial_out(ch, &com_port->thr);
325 
326 	/*
327 	 * Call watchdog_reset() upon newline. This is done here in putc
328 	 * since the environment code uses a single puts() to print the complete
329 	 * environment upon "printenv". So we can't put this watchdog call
330 	 * in puts().
331 	 */
332 	if (ch == '\n')
333 		WATCHDOG_RESET();
334 
335 	return 0;
336 }
337 
338 static int ns16550_serial_pending(struct udevice *dev, bool input)
339 {
340 	struct NS16550 *const com_port = dev_get_priv(dev);
341 
342 	if (input)
343 		return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0;
344 	else
345 		return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1;
346 }
347 
348 static int ns16550_serial_getc(struct udevice *dev)
349 {
350 	struct NS16550 *const com_port = dev_get_priv(dev);
351 
352 	if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
353 		return -EAGAIN;
354 
355 	return serial_in(&com_port->rbr);
356 }
357 
358 static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
359 {
360 	struct NS16550 *const com_port = dev_get_priv(dev);
361 	struct ns16550_platdata *plat = com_port->plat;
362 	int clock_divisor;
363 
364 	clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
365 
366 	NS16550_setbrg(com_port, clock_divisor);
367 
368 	return 0;
369 }
370 
371 int ns16550_serial_probe(struct udevice *dev)
372 {
373 	struct NS16550 *const com_port = dev_get_priv(dev);
374 
375 	com_port->plat = dev_get_platdata(dev);
376 	NS16550_init(com_port, -1);
377 
378 	return 0;
379 }
380 
381 #if CONFIG_IS_ENABLED(OF_CONTROL)
382 enum {
383 	PORT_NS16550 = 0,
384 	PORT_JZ4780,
385 };
386 #endif
387 
388 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
389 int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
390 {
391 	struct ns16550_platdata *plat = dev->platdata;
392 	const u32 port_type = dev_get_driver_data(dev);
393 	fdt_addr_t addr;
394 	struct clk clk;
395 	int err;
396 
397 	/* try Processor Local Bus device first */
398 	addr = devfdt_get_addr(dev);
399 #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
400 	if (addr == FDT_ADDR_T_NONE) {
401 		/* then try pci device */
402 		struct fdt_pci_addr pci_addr;
403 		u32 bar;
404 		int ret;
405 
406 		/* we prefer to use a memory-mapped register */
407 		ret = fdtdec_get_pci_addr(gd->fdt_blob, dev_of_offset(dev),
408 					  FDT_PCI_SPACE_MEM32, "reg",
409 					  &pci_addr);
410 		if (ret) {
411 			/* try if there is any i/o-mapped register */
412 			ret = fdtdec_get_pci_addr(gd->fdt_blob,
413 						  dev_of_offset(dev),
414 						  FDT_PCI_SPACE_IO,
415 						  "reg", &pci_addr);
416 			if (ret)
417 				return ret;
418 		}
419 
420 		ret = fdtdec_get_pci_bar32(dev, &pci_addr, &bar);
421 		if (ret)
422 			return ret;
423 
424 		addr = bar;
425 	}
426 #endif
427 
428 	if (addr == FDT_ADDR_T_NONE)
429 		return -EINVAL;
430 
431 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
432 	plat->base = addr;
433 #else
434 	plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);
435 #endif
436 
437 	plat->reg_offset = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
438 				     "reg-offset", 0);
439 	plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
440 					 "reg-shift", 0);
441 
442 	err = clk_get_by_index(dev, 0, &clk);
443 	if (!err) {
444 		err = clk_get_rate(&clk);
445 		if (!IS_ERR_VALUE(err))
446 			plat->clock = err;
447 	} else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
448 		debug("ns16550 failed to get clock\n");
449 		return err;
450 	}
451 
452 	if (!plat->clock)
453 		plat->clock = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
454 					     "clock-frequency",
455 					     CONFIG_SYS_NS16550_CLK);
456 	if (!plat->clock) {
457 		debug("ns16550 clock not defined\n");
458 		return -EINVAL;
459 	}
460 
461 	plat->fcr = UART_FCR_DEFVAL;
462 	if (port_type == PORT_JZ4780)
463 		plat->fcr |= UART_FCR_UME;
464 
465 	return 0;
466 }
467 #endif
468 
469 const struct dm_serial_ops ns16550_serial_ops = {
470 	.putc = ns16550_serial_putc,
471 	.pending = ns16550_serial_pending,
472 	.getc = ns16550_serial_getc,
473 	.setbrg = ns16550_serial_setbrg,
474 };
475 
476 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
477 /*
478  * Please consider existing compatible strings before adding a new
479  * one to keep this table compact. Or you may add a generic "ns16550"
480  * compatible string to your dts.
481  */
482 static const struct udevice_id ns16550_serial_ids[] = {
483 	{ .compatible = "ns16550",		.data = PORT_NS16550 },
484 	{ .compatible = "ns16550a",		.data = PORT_NS16550 },
485 	{ .compatible = "ingenic,jz4780-uart",	.data = PORT_JZ4780  },
486 	{ .compatible = "nvidia,tegra20-uart",	.data = PORT_NS16550 },
487 	{ .compatible = "snps,dw-apb-uart",	.data = PORT_NS16550 },
488 	{ .compatible = "ti,omap2-uart",	.data = PORT_NS16550 },
489 	{ .compatible = "ti,omap3-uart",	.data = PORT_NS16550 },
490 	{ .compatible = "ti,omap4-uart",	.data = PORT_NS16550 },
491 	{ .compatible = "ti,am3352-uart",	.data = PORT_NS16550 },
492 	{ .compatible = "ti,am4372-uart",	.data = PORT_NS16550 },
493 	{ .compatible = "ti,dra742-uart",	.data = PORT_NS16550 },
494 	{}
495 };
496 #endif /* OF_CONTROL && !OF_PLATDATA */
497 
498 #if CONFIG_IS_ENABLED(SERIAL_PRESENT)
499 
500 /* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */
501 #if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL)
502 U_BOOT_DRIVER(ns16550_serial) = {
503 	.name	= "ns16550_serial",
504 	.id	= UCLASS_SERIAL,
505 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
506 	.of_match = ns16550_serial_ids,
507 	.ofdata_to_platdata = ns16550_serial_ofdata_to_platdata,
508 	.platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
509 #endif
510 	.priv_auto_alloc_size = sizeof(struct NS16550),
511 	.probe = ns16550_serial_probe,
512 	.ops	= &ns16550_serial_ops,
513 	.flags	= DM_FLAG_PRE_RELOC,
514 };
515 #endif
516 #endif /* SERIAL_PRESENT */
517 
518 #endif /* CONFIG_DM_SERIAL */
519