xref: /openbmc/u-boot/drivers/serial/ns16550.c (revision 3788b451)
1 /*
2  * COM1 NS16550 support
3  * originally from linux source (arch/powerpc/boot/ns16550.c)
4  * modified to use CONFIG_SYS_ISA_MEM and new defines
5  */
6 
7 #include <common.h>
8 #include <clk.h>
9 #include <dm.h>
10 #include <errno.h>
11 #include <fdtdec.h>
12 #include <ns16550.h>
13 #include <serial.h>
14 #include <watchdog.h>
15 #include <linux/types.h>
16 #include <asm/io.h>
17 
18 DECLARE_GLOBAL_DATA_PTR;
19 
20 #define UART_LCRVAL UART_LCR_8N1		/* 8 data, 1 stop, no parity */
21 #define UART_MCRVAL (UART_MCR_DTR | \
22 		     UART_MCR_RTS)		/* RTS/DTR */
23 
24 #ifndef CONFIG_DM_SERIAL
25 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
26 #define serial_out(x, y)	outb(x, (ulong)y)
27 #define serial_in(y)		inb((ulong)y)
28 #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
29 #define serial_out(x, y)	out_be32(y, x)
30 #define serial_in(y)		in_be32(y)
31 #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
32 #define serial_out(x, y)	out_le32(y, x)
33 #define serial_in(y)		in_le32(y)
34 #else
35 #define serial_out(x, y)	writeb(x, y)
36 #define serial_in(y)		readb(y)
37 #endif
38 #endif /* !CONFIG_DM_SERIAL */
39 
40 #if defined(CONFIG_SOC_KEYSTONE)
41 #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE   0
42 #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
43 #undef UART_MCRVAL
44 #ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
45 #define UART_MCRVAL             (UART_MCR_RTS | UART_MCR_AFE)
46 #else
47 #define UART_MCRVAL             (UART_MCR_RTS)
48 #endif
49 #endif
50 
51 #ifndef CONFIG_SYS_NS16550_IER
52 #define CONFIG_SYS_NS16550_IER  0x00
53 #endif /* CONFIG_SYS_NS16550_IER */
54 
55 static inline void serial_out_shift(void *addr, int shift, int value)
56 {
57 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
58 	outb(value, (ulong)addr);
59 #elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
60 	out_le32(addr, value);
61 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
62 	out_be32(addr, value);
63 #elif defined(CONFIG_SYS_NS16550_MEM32)
64 	writel(value, addr);
65 #elif defined(CONFIG_SYS_BIG_ENDIAN)
66 	writeb(value, addr + (1 << shift) - 1);
67 #else
68 	writeb(value, addr);
69 #endif
70 }
71 
72 static inline int serial_in_shift(void *addr, int shift)
73 {
74 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
75 	return inb((ulong)addr);
76 #elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
77 	return in_le32(addr);
78 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
79 	return in_be32(addr);
80 #elif defined(CONFIG_SYS_NS16550_MEM32)
81 	return readl(addr);
82 #elif defined(CONFIG_SYS_BIG_ENDIAN)
83 	return readb(addr + (1 << shift) - 1);
84 #else
85 	return readb(addr);
86 #endif
87 }
88 
89 #ifdef CONFIG_DM_SERIAL
90 
91 #ifndef CONFIG_SYS_NS16550_CLK
92 #define CONFIG_SYS_NS16550_CLK  0
93 #endif
94 
95 static void ns16550_writeb(NS16550_t port, int offset, int value)
96 {
97 	struct ns16550_platdata *plat = port->plat;
98 	unsigned char *addr;
99 
100 	offset *= 1 << plat->reg_shift;
101 	addr = (unsigned char *)plat->base + offset;
102 
103 	/*
104 	 * As far as we know it doesn't make sense to support selection of
105 	 * these options at run-time, so use the existing CONFIG options.
106 	 */
107 	serial_out_shift(addr + plat->reg_offset, plat->reg_shift, value);
108 }
109 
110 static int ns16550_readb(NS16550_t port, int offset)
111 {
112 	struct ns16550_platdata *plat = port->plat;
113 	unsigned char *addr;
114 
115 	offset *= 1 << plat->reg_shift;
116 	addr = (unsigned char *)plat->base + offset;
117 
118 	return serial_in_shift(addr + plat->reg_offset, plat->reg_shift);
119 }
120 
121 static u32 ns16550_getfcr(NS16550_t port)
122 {
123 	struct ns16550_platdata *plat = port->plat;
124 
125 	return plat->fcr;
126 }
127 
128 /* We can clean these up once everything is moved to driver model */
129 #define serial_out(value, addr)	\
130 	ns16550_writeb(com_port, \
131 		(unsigned char *)addr - (unsigned char *)com_port, value)
132 #define serial_in(addr) \
133 	ns16550_readb(com_port, \
134 		(unsigned char *)addr - (unsigned char *)com_port)
135 #else
136 static u32 ns16550_getfcr(NS16550_t port)
137 {
138 	return UART_FCR_DEFVAL;
139 }
140 #endif
141 
142 int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
143 {
144 	const unsigned int mode_x_div = 16;
145 
146 	return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
147 }
148 
149 static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
150 {
151 	serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr);
152 	serial_out(baud_divisor & 0xff, &com_port->dll);
153 	serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
154 	serial_out(UART_LCRVAL, &com_port->lcr);
155 }
156 
157 void NS16550_init(NS16550_t com_port, int baud_divisor)
158 {
159 #if (defined(CONFIG_SPL_BUILD) && \
160 		(defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
161 	/*
162 	 * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
163 	 * before SPL starts only THRE bit is set. We have to empty the
164 	 * transmitter before initialization starts.
165 	 */
166 	if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE))
167 	     == UART_LSR_THRE) {
168 		if (baud_divisor != -1)
169 			NS16550_setbrg(com_port, baud_divisor);
170 		serial_out(0, &com_port->mdr1);
171 	}
172 #endif
173 
174 	while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
175 		;
176 
177 	serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
178 #if defined(CONFIG_OMAP) || defined(CONFIG_AM33XX) || \
179 			defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX)
180 	serial_out(0x7, &com_port->mdr1);	/* mode select reset TL16C750*/
181 #endif
182 	serial_out(UART_MCRVAL, &com_port->mcr);
183 	serial_out(ns16550_getfcr(com_port), &com_port->fcr);
184 	if (baud_divisor != -1)
185 		NS16550_setbrg(com_port, baud_divisor);
186 #if defined(CONFIG_OMAP) || \
187 	defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX) || \
188 	defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX)
189 
190 	/* /16 is proper to hit 115200 with 48MHz */
191 	serial_out(0, &com_port->mdr1);
192 #endif /* CONFIG_OMAP */
193 #if defined(CONFIG_SOC_KEYSTONE)
194 	serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
195 #endif
196 }
197 
198 #ifndef CONFIG_NS16550_MIN_FUNCTIONS
199 void NS16550_reinit(NS16550_t com_port, int baud_divisor)
200 {
201 	serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
202 	NS16550_setbrg(com_port, 0);
203 	serial_out(UART_MCRVAL, &com_port->mcr);
204 	serial_out(ns16550_getfcr(com_port), &com_port->fcr);
205 	NS16550_setbrg(com_port, baud_divisor);
206 }
207 #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
208 
209 void NS16550_putc(NS16550_t com_port, char c)
210 {
211 	while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
212 		;
213 	serial_out(c, &com_port->thr);
214 
215 	/*
216 	 * Call watchdog_reset() upon newline. This is done here in putc
217 	 * since the environment code uses a single puts() to print the complete
218 	 * environment upon "printenv". So we can't put this watchdog call
219 	 * in puts().
220 	 */
221 	if (c == '\n')
222 		WATCHDOG_RESET();
223 }
224 
225 #ifndef CONFIG_NS16550_MIN_FUNCTIONS
226 char NS16550_getc(NS16550_t com_port)
227 {
228 	while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
229 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
230 		extern void usbtty_poll(void);
231 		usbtty_poll();
232 #endif
233 		WATCHDOG_RESET();
234 	}
235 	return serial_in(&com_port->rbr);
236 }
237 
238 int NS16550_tstc(NS16550_t com_port)
239 {
240 	return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
241 }
242 
243 #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
244 
245 #ifdef CONFIG_DEBUG_UART_NS16550
246 
247 #include <debug_uart.h>
248 
249 #define serial_dout(reg, value)	\
250 	serial_out_shift((char *)com_port + \
251 		((char *)reg - (char *)com_port) * \
252 			(1 << CONFIG_DEBUG_UART_SHIFT), \
253 		CONFIG_DEBUG_UART_SHIFT, value)
254 #define serial_din(reg) \
255 	serial_in_shift((char *)com_port + \
256 		((char *)reg - (char *)com_port) * \
257 			(1 << CONFIG_DEBUG_UART_SHIFT), \
258 		CONFIG_DEBUG_UART_SHIFT)
259 
260 static inline void _debug_uart_init(void)
261 {
262 	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
263 	int baud_divisor;
264 
265 	/*
266 	 * We copy the code from above because it is already horribly messy.
267 	 * Trying to refactor to nicely remove the duplication doesn't seem
268 	 * feasible. The better fix is to move all users of this driver to
269 	 * driver model.
270 	 */
271 	baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
272 					    CONFIG_BAUDRATE);
273 	serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
274 	serial_dout(&com_port->mcr, UART_MCRVAL);
275 	serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
276 
277 	serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
278 	serial_dout(&com_port->dll, baud_divisor & 0xff);
279 	serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
280 	serial_dout(&com_port->lcr, UART_LCRVAL);
281 }
282 
283 static inline void _debug_uart_putc(int ch)
284 {
285 	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
286 
287 	while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
288 		;
289 	serial_dout(&com_port->thr, ch);
290 }
291 
292 DEBUG_UART_FUNCS
293 
294 #endif
295 
296 #ifdef CONFIG_DM_SERIAL
297 static int ns16550_serial_putc(struct udevice *dev, const char ch)
298 {
299 	struct NS16550 *const com_port = dev_get_priv(dev);
300 
301 	if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
302 		return -EAGAIN;
303 	serial_out(ch, &com_port->thr);
304 
305 	/*
306 	 * Call watchdog_reset() upon newline. This is done here in putc
307 	 * since the environment code uses a single puts() to print the complete
308 	 * environment upon "printenv". So we can't put this watchdog call
309 	 * in puts().
310 	 */
311 	if (ch == '\n')
312 		WATCHDOG_RESET();
313 
314 	return 0;
315 }
316 
317 static int ns16550_serial_pending(struct udevice *dev, bool input)
318 {
319 	struct NS16550 *const com_port = dev_get_priv(dev);
320 
321 	if (input)
322 		return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0;
323 	else
324 		return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1;
325 }
326 
327 static int ns16550_serial_getc(struct udevice *dev)
328 {
329 	struct NS16550 *const com_port = dev_get_priv(dev);
330 
331 	if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
332 		return -EAGAIN;
333 
334 	return serial_in(&com_port->rbr);
335 }
336 
337 static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
338 {
339 	struct NS16550 *const com_port = dev_get_priv(dev);
340 	struct ns16550_platdata *plat = com_port->plat;
341 	int clock_divisor;
342 
343 	clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
344 
345 	NS16550_setbrg(com_port, clock_divisor);
346 
347 	return 0;
348 }
349 
350 int ns16550_serial_probe(struct udevice *dev)
351 {
352 	struct NS16550 *const com_port = dev_get_priv(dev);
353 
354 	com_port->plat = dev_get_platdata(dev);
355 	NS16550_init(com_port, -1);
356 
357 	return 0;
358 }
359 
360 #if CONFIG_IS_ENABLED(OF_CONTROL)
361 enum {
362 	PORT_NS16550 = 0,
363 	PORT_JZ4780,
364 };
365 #endif
366 
367 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
368 int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
369 {
370 	struct ns16550_platdata *plat = dev->platdata;
371 	const u32 port_type = dev_get_driver_data(dev);
372 	fdt_addr_t addr;
373 	struct clk clk;
374 	int err;
375 
376 	/* try Processor Local Bus device first */
377 	addr = dev_get_addr(dev);
378 #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
379 	if (addr == FDT_ADDR_T_NONE) {
380 		/* then try pci device */
381 		struct fdt_pci_addr pci_addr;
382 		u32 bar;
383 		int ret;
384 
385 		/* we prefer to use a memory-mapped register */
386 		ret = fdtdec_get_pci_addr(gd->fdt_blob, dev->of_offset,
387 					  FDT_PCI_SPACE_MEM32, "reg",
388 					  &pci_addr);
389 		if (ret) {
390 			/* try if there is any i/o-mapped register */
391 			ret = fdtdec_get_pci_addr(gd->fdt_blob,
392 						  dev->of_offset,
393 						  FDT_PCI_SPACE_IO,
394 						  "reg", &pci_addr);
395 			if (ret)
396 				return ret;
397 		}
398 
399 		ret = fdtdec_get_pci_bar32(dev, &pci_addr, &bar);
400 		if (ret)
401 			return ret;
402 
403 		addr = bar;
404 	}
405 #endif
406 
407 	if (addr == FDT_ADDR_T_NONE)
408 		return -EINVAL;
409 
410 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
411 	plat->base = addr;
412 #else
413 	plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);
414 #endif
415 
416 	plat->reg_offset = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
417 				     "reg-offset", 0);
418 	plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
419 					 "reg-shift", 0);
420 
421 	err = clk_get_by_index(dev, 0, &clk);
422 	if (!err) {
423 		err = clk_get_rate(&clk);
424 		if (!IS_ERR_VALUE(err))
425 			plat->clock = err;
426 	} else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
427 		debug("ns16550 failed to get clock\n");
428 		return err;
429 	}
430 
431 	if (!plat->clock)
432 		plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
433 					     "clock-frequency",
434 					     CONFIG_SYS_NS16550_CLK);
435 	if (!plat->clock) {
436 		debug("ns16550 clock not defined\n");
437 		return -EINVAL;
438 	}
439 
440 	plat->fcr = UART_FCR_DEFVAL;
441 	if (port_type == PORT_JZ4780)
442 		plat->fcr |= UART_FCR_UME;
443 
444 	return 0;
445 }
446 #endif
447 
448 const struct dm_serial_ops ns16550_serial_ops = {
449 	.putc = ns16550_serial_putc,
450 	.pending = ns16550_serial_pending,
451 	.getc = ns16550_serial_getc,
452 	.setbrg = ns16550_serial_setbrg,
453 };
454 
455 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
456 #if CONFIG_IS_ENABLED(OF_CONTROL)
457 /*
458  * Please consider existing compatible strings before adding a new
459  * one to keep this table compact. Or you may add a generic "ns16550"
460  * compatible string to your dts.
461  */
462 static const struct udevice_id ns16550_serial_ids[] = {
463 	{ .compatible = "ns16550",		.data = PORT_NS16550 },
464 	{ .compatible = "ns16550a",		.data = PORT_NS16550 },
465 	{ .compatible = "ingenic,jz4780-uart",	.data = PORT_JZ4780  },
466 	{ .compatible = "nvidia,tegra20-uart",	.data = PORT_NS16550 },
467 	{ .compatible = "snps,dw-apb-uart",	.data = PORT_NS16550 },
468 	{ .compatible = "ti,omap2-uart",	.data = PORT_NS16550 },
469 	{ .compatible = "ti,omap3-uart",	.data = PORT_NS16550 },
470 	{ .compatible = "ti,omap4-uart",	.data = PORT_NS16550 },
471 	{ .compatible = "ti,am3352-uart",	.data = PORT_NS16550 },
472 	{ .compatible = "ti,am4372-uart",	.data = PORT_NS16550 },
473 	{ .compatible = "ti,dra742-uart",	.data = PORT_NS16550 },
474 	{}
475 };
476 #endif
477 
478 #if CONFIG_IS_ENABLED(SERIAL_PRESENT)
479 U_BOOT_DRIVER(ns16550_serial) = {
480 	.name	= "ns16550_serial",
481 	.id	= UCLASS_SERIAL,
482 #if CONFIG_IS_ENABLED(OF_CONTROL)
483 	.of_match = ns16550_serial_ids,
484 	.ofdata_to_platdata = ns16550_serial_ofdata_to_platdata,
485 	.platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
486 #endif
487 	.priv_auto_alloc_size = sizeof(struct NS16550),
488 	.probe = ns16550_serial_probe,
489 	.ops	= &ns16550_serial_ops,
490 	.flags	= DM_FLAG_PRE_RELOC,
491 };
492 #endif
493 #endif /* !OF_PLATDATA */
494 #endif /* CONFIG_DM_SERIAL */
495