1 /* 2 * (C) Copyright 2004-2007 Freescale Semiconductor, Inc. 3 * TsiChung Liew, Tsi-Chung.Liew@freescale.com. 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 * 23 */ 24 25 /* 26 * Minimal serial functions needed to use one of the uart ports 27 * as serial console interface. 28 */ 29 30 #include <common.h> 31 #include <serial.h> 32 #include <linux/compiler.h> 33 34 #include <asm/immap.h> 35 #include <asm/uart.h> 36 37 DECLARE_GLOBAL_DATA_PTR; 38 39 extern void uart_port_conf(int port); 40 41 static int mcf_serial_init(void) 42 { 43 volatile uart_t *uart; 44 u32 counter; 45 46 uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); 47 48 uart_port_conf(CONFIG_SYS_UART_PORT); 49 50 /* write to SICR: SIM2 = uart mode,dcd does not affect rx */ 51 uart->ucr = UART_UCR_RESET_RX; 52 uart->ucr = UART_UCR_RESET_TX; 53 uart->ucr = UART_UCR_RESET_ERROR; 54 uart->ucr = UART_UCR_RESET_MR; 55 __asm__("nop"); 56 57 uart->uimr = 0; 58 59 /* write to CSR: RX/TX baud rate from timers */ 60 uart->ucsr = (UART_UCSR_RCS_SYS_CLK | UART_UCSR_TCS_SYS_CLK); 61 62 uart->umr = (UART_UMR_BC_8 | UART_UMR_PM_NONE); 63 uart->umr = UART_UMR_SB_STOP_BITS_1; 64 65 /* Setting up BaudRate */ 66 counter = (u32) ((gd->bus_clk / 32) + (gd->baudrate / 2)); 67 counter = counter / gd->baudrate; 68 69 /* write to CTUR: divide counter upper byte */ 70 uart->ubg1 = (u8) ((counter & 0xff00) >> 8); 71 /* write to CTLR: divide counter lower byte */ 72 uart->ubg2 = (u8) (counter & 0x00ff); 73 74 uart->ucr = (UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED); 75 76 return (0); 77 } 78 79 static void mcf_serial_putc(const char c) 80 { 81 volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); 82 83 if (c == '\n') 84 serial_putc('\r'); 85 86 /* Wait for last character to go. */ 87 while (!(uart->usr & UART_USR_TXRDY)) ; 88 89 uart->utb = c; 90 } 91 92 static int mcf_serial_getc(void) 93 { 94 volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); 95 96 /* Wait for a character to arrive. */ 97 while (!(uart->usr & UART_USR_RXRDY)) ; 98 return uart->urb; 99 } 100 101 static int mcf_serial_tstc(void) 102 { 103 volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); 104 105 return (uart->usr & UART_USR_RXRDY); 106 } 107 108 static void mcf_serial_setbrg(void) 109 { 110 volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); 111 u32 counter; 112 113 /* Setting up BaudRate */ 114 counter = (u32) ((gd->bus_clk / 32) + (gd->baudrate / 2)); 115 counter = counter / gd->baudrate; 116 117 /* write to CTUR: divide counter upper byte */ 118 uart->ubg1 = ((counter & 0xff00) >> 8); 119 /* write to CTLR: divide counter lower byte */ 120 uart->ubg2 = (counter & 0x00ff); 121 122 uart->ucr = UART_UCR_RESET_RX; 123 uart->ucr = UART_UCR_RESET_TX; 124 125 uart->ucr = UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED; 126 } 127 128 static struct serial_device mcf_serial_drv = { 129 .name = "mcf_serial", 130 .start = mcf_serial_init, 131 .stop = NULL, 132 .setbrg = mcf_serial_setbrg, 133 .putc = mcf_serial_putc, 134 .puts = default_serial_puts, 135 .getc = mcf_serial_getc, 136 .tstc = mcf_serial_tstc, 137 }; 138 139 void mcf_serial_initialize(void) 140 { 141 serial_register(&mcf_serial_drv); 142 } 143 144 __weak struct serial_device *default_serial_console(void) 145 { 146 return &mcf_serial_drv; 147 } 148