1 /* 2 * (C) Copyright 2004-2007 Freescale Semiconductor, Inc. 3 * TsiChung Liew, Tsi-Chung.Liew@freescale.com. 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 * 23 */ 24 25 /* 26 * Minimal serial functions needed to use one of the uart ports 27 * as serial console interface. 28 */ 29 30 #include <common.h> 31 32 #include <asm/immap.h> 33 #include <asm/uart.h> 34 35 DECLARE_GLOBAL_DATA_PTR; 36 37 extern void uart_port_conf(int port); 38 39 static int mcf_serial_init(void) 40 { 41 volatile uart_t *uart; 42 u32 counter; 43 44 uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); 45 46 uart_port_conf(CONFIG_SYS_UART_PORT); 47 48 /* write to SICR: SIM2 = uart mode,dcd does not affect rx */ 49 uart->ucr = UART_UCR_RESET_RX; 50 uart->ucr = UART_UCR_RESET_TX; 51 uart->ucr = UART_UCR_RESET_ERROR; 52 uart->ucr = UART_UCR_RESET_MR; 53 __asm__("nop"); 54 55 uart->uimr = 0; 56 57 /* write to CSR: RX/TX baud rate from timers */ 58 uart->ucsr = (UART_UCSR_RCS_SYS_CLK | UART_UCSR_TCS_SYS_CLK); 59 60 uart->umr = (UART_UMR_BC_8 | UART_UMR_PM_NONE); 61 uart->umr = UART_UMR_SB_STOP_BITS_1; 62 63 /* Setting up BaudRate */ 64 counter = (u32) ((gd->bus_clk / 32) + (gd->baudrate / 2)); 65 counter = counter / gd->baudrate; 66 67 /* write to CTUR: divide counter upper byte */ 68 uart->ubg1 = (u8) ((counter & 0xff00) >> 8); 69 /* write to CTLR: divide counter lower byte */ 70 uart->ubg2 = (u8) (counter & 0x00ff); 71 72 uart->ucr = (UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED); 73 74 return (0); 75 } 76 77 static void mcf_serial_putc(const char c) 78 { 79 volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); 80 81 if (c == '\n') 82 serial_putc('\r'); 83 84 /* Wait for last character to go. */ 85 while (!(uart->usr & UART_USR_TXRDY)) ; 86 87 uart->utb = c; 88 } 89 90 static int mcf_serial_getc(void) 91 { 92 volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); 93 94 /* Wait for a character to arrive. */ 95 while (!(uart->usr & UART_USR_RXRDY)) ; 96 return uart->urb; 97 } 98 99 static int mcf_serial_tstc(void) 100 { 101 volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); 102 103 return (uart->usr & UART_USR_RXRDY); 104 } 105 106 static void mcf_serial_setbrg(void) 107 { 108 volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); 109 u32 counter; 110 111 /* Setting up BaudRate */ 112 counter = (u32) ((gd->bus_clk / 32) + (gd->baudrate / 2)); 113 counter = counter / gd->baudrate; 114 115 /* write to CTUR: divide counter upper byte */ 116 uart->ubg1 = ((counter & 0xff00) >> 8); 117 /* write to CTLR: divide counter lower byte */ 118 uart->ubg2 = (counter & 0x00ff); 119 120 uart->ucr = UART_UCR_RESET_RX; 121 uart->ucr = UART_UCR_RESET_TX; 122 123 uart->ucr = UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED; 124 } 125 126 static struct serial_device mcf_serial_drv = { 127 .name = "mcf_serial", 128 .start = mcf_serial_init, 129 .stop = NULL, 130 .setbrg = mcf_serial_setbrg, 131 .putc = mcf_serial_putc, 132 .puts = default_serial_puts, 133 .getc = mcf_serial_getc, 134 .tstc = mcf_serial_tstc, 135 }; 136 137 void mcf_serial_initialize(void) 138 { 139 serial_register(&mcf_serial_drv); 140 } 141 142 __weak struct serial_device *default_serial_console(void) 143 { 144 return &mcf_serial_drv; 145 } 146