1 /* 2 * Copyright (C) 2004-2006 Atmel Corporation 3 * 4 * Modified to support C structur SoC access by 5 * Andreas Bießmann <biessmann@corscience.de> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 */ 21 #include <common.h> 22 #include <watchdog.h> 23 24 #include <asm/io.h> 25 #include <asm/arch/clk.h> 26 #include <asm/arch/memory-map.h> 27 28 #if defined(CONFIG_USART0) 29 # define USART_ID 0 30 # define USART_BASE USART0_BASE 31 #elif defined(CONFIG_USART1) 32 # define USART_ID 1 33 # define USART_BASE USART1_BASE 34 #elif defined(CONFIG_USART2) 35 # define USART_ID 2 36 # define USART_BASE USART2_BASE 37 #elif defined(CONFIG_USART3) 38 # define USART_ID 3 39 # define USART_BASE USART3_BASE 40 #endif 41 42 #include "atmel_usart.h" 43 44 DECLARE_GLOBAL_DATA_PTR; 45 46 void serial_setbrg(void) 47 { 48 atmel_usart3_t *usart = (atmel_usart3_t*)USART_BASE; 49 unsigned long divisor; 50 unsigned long usart_hz; 51 52 /* 53 * Master Clock 54 * Baud Rate = -------------- 55 * 16 * CD 56 */ 57 usart_hz = get_usart_clk_rate(USART_ID); 58 divisor = (usart_hz / 16 + gd->baudrate / 2) / gd->baudrate; 59 writel(USART3_BF(CD, divisor), &usart->brgr); 60 } 61 62 int serial_init(void) 63 { 64 atmel_usart3_t *usart = (atmel_usart3_t*)USART_BASE; 65 66 writel(USART3_BIT(RSTRX) | USART3_BIT(RSTTX), &usart->cr); 67 68 serial_setbrg(); 69 70 writel(USART3_BIT(RXEN) | USART3_BIT(TXEN), &usart->cr); 71 writel((USART3_BF(USART_MODE, USART3_USART_MODE_NORMAL) 72 | USART3_BF(USCLKS, USART3_USCLKS_MCK) 73 | USART3_BF(CHRL, USART3_CHRL_8) 74 | USART3_BF(PAR, USART3_PAR_NONE) 75 | USART3_BF(NBSTOP, USART3_NBSTOP_1)), 76 &usart->mr); 77 78 return 0; 79 } 80 81 void serial_putc(char c) 82 { 83 atmel_usart3_t *usart = (atmel_usart3_t*)USART_BASE; 84 85 if (c == '\n') 86 serial_putc('\r'); 87 88 while (!(readl(&usart->csr) & USART3_BIT(TXRDY))); 89 writel(c, &usart->thr); 90 } 91 92 void serial_puts(const char *s) 93 { 94 while (*s) 95 serial_putc(*s++); 96 } 97 98 int serial_getc(void) 99 { 100 atmel_usart3_t *usart = (atmel_usart3_t*)USART_BASE; 101 102 while (!(readl(&usart->csr) & USART3_BIT(RXRDY))) 103 WATCHDOG_RESET(); 104 return readl(&usart->rhr); 105 } 106 107 int serial_tstc(void) 108 { 109 atmel_usart3_t *usart = (atmel_usart3_t*)USART_BASE; 110 return (readl(&usart->csr) & USART3_BIT(RXRDY)) != 0; 111 } 112