xref: /openbmc/u-boot/drivers/serial/atmel_usart.c (revision 63495ad7)
1 /*
2  * Copyright (C) 2004-2006 Atmel Corporation
3  *
4  * Modified to support C structur SoC access by
5  * Andreas Bießmann <biessmann@corscience.de>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
20  */
21 #include <common.h>
22 #include <watchdog.h>
23 #include <serial.h>
24 #include <linux/compiler.h>
25 
26 #include <asm/io.h>
27 #include <asm/arch/clk.h>
28 #include <asm/arch/hardware.h>
29 
30 #include "atmel_usart.h"
31 
32 DECLARE_GLOBAL_DATA_PTR;
33 
34 static void atmel_serial_setbrg(void)
35 {
36 	atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
37 	unsigned long divisor;
38 	unsigned long usart_hz;
39 
40 	/*
41 	 *              Master Clock
42 	 * Baud Rate = --------------
43 	 *                16 * CD
44 	 */
45 	usart_hz = get_usart_clk_rate(CONFIG_USART_ID);
46 	divisor = (usart_hz / 16 + gd->baudrate / 2) / gd->baudrate;
47 	writel(USART3_BF(CD, divisor), &usart->brgr);
48 }
49 
50 static int atmel_serial_init(void)
51 {
52 	atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
53 
54 	/*
55 	 * Just in case: drain transmitter register
56 	 * 1000us is enough for baudrate >= 9600
57 	 */
58 	if (!(readl(&usart->csr) & USART3_BIT(TXEMPTY)))
59 		__udelay(1000);
60 
61 	writel(USART3_BIT(RSTRX) | USART3_BIT(RSTTX), &usart->cr);
62 
63 	serial_setbrg();
64 
65 	writel((USART3_BF(USART_MODE, USART3_USART_MODE_NORMAL)
66 			   | USART3_BF(USCLKS, USART3_USCLKS_MCK)
67 			   | USART3_BF(CHRL, USART3_CHRL_8)
68 			   | USART3_BF(PAR, USART3_PAR_NONE)
69 			   | USART3_BF(NBSTOP, USART3_NBSTOP_1)),
70 			   &usart->mr);
71 	writel(USART3_BIT(RXEN) | USART3_BIT(TXEN), &usart->cr);
72 	/* 100us is enough for the new settings to be settled */
73 	__udelay(100);
74 
75 	return 0;
76 }
77 
78 static void atmel_serial_putc(char c)
79 {
80 	atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
81 
82 	if (c == '\n')
83 		serial_putc('\r');
84 
85 	while (!(readl(&usart->csr) & USART3_BIT(TXRDY)));
86 	writel(c, &usart->thr);
87 }
88 
89 static int atmel_serial_getc(void)
90 {
91 	atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
92 
93 	while (!(readl(&usart->csr) & USART3_BIT(RXRDY)))
94 		 WATCHDOG_RESET();
95 	return readl(&usart->rhr);
96 }
97 
98 static int atmel_serial_tstc(void)
99 {
100 	atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
101 	return (readl(&usart->csr) & USART3_BIT(RXRDY)) != 0;
102 }
103 
104 static struct serial_device atmel_serial_drv = {
105 	.name	= "atmel_serial",
106 	.start	= atmel_serial_init,
107 	.stop	= NULL,
108 	.setbrg	= atmel_serial_setbrg,
109 	.putc	= atmel_serial_putc,
110 	.puts	= default_serial_puts,
111 	.getc	= atmel_serial_getc,
112 	.tstc	= atmel_serial_tstc,
113 };
114 
115 void atmel_serial_initialize(void)
116 {
117 	serial_register(&atmel_serial_drv);
118 }
119 
120 __weak struct serial_device *default_serial_console(void)
121 {
122 	return &atmel_serial_drv;
123 }
124