1 /* 2 * Copyright (C) 2004-2006 Atmel Corporation 3 * 4 * Modified to support C structur SoC access by 5 * Andreas Bießmann <biessmann@corscience.de> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 #include <common.h> 10 #include <dm.h> 11 #include <errno.h> 12 #include <watchdog.h> 13 #include <serial.h> 14 #include <debug_uart.h> 15 #include <linux/compiler.h> 16 17 #include <asm/io.h> 18 #ifdef CONFIG_DM_SERIAL 19 #include <asm/arch/atmel_serial.h> 20 #endif 21 #include <asm/arch/clk.h> 22 #include <asm/arch/hardware.h> 23 24 #include "atmel_usart.h" 25 26 DECLARE_GLOBAL_DATA_PTR; 27 28 static void atmel_serial_setbrg_internal(atmel_usart3_t *usart, int id, 29 int baudrate) 30 { 31 unsigned long divisor; 32 unsigned long usart_hz; 33 34 /* 35 * Master Clock 36 * Baud Rate = -------------- 37 * 16 * CD 38 */ 39 usart_hz = get_usart_clk_rate(id); 40 divisor = (usart_hz / 16 + baudrate / 2) / baudrate; 41 writel(USART3_BF(CD, divisor), &usart->brgr); 42 } 43 44 static void atmel_serial_init_internal(atmel_usart3_t *usart) 45 { 46 /* 47 * Just in case: drain transmitter register 48 * 1000us is enough for baudrate >= 9600 49 */ 50 if (!(readl(&usart->csr) & USART3_BIT(TXEMPTY))) 51 __udelay(1000); 52 53 writel(USART3_BIT(RSTRX) | USART3_BIT(RSTTX), &usart->cr); 54 } 55 56 static void atmel_serial_activate(atmel_usart3_t *usart) 57 { 58 writel((USART3_BF(USART_MODE, USART3_USART_MODE_NORMAL) 59 | USART3_BF(USCLKS, USART3_USCLKS_MCK) 60 | USART3_BF(CHRL, USART3_CHRL_8) 61 | USART3_BF(PAR, USART3_PAR_NONE) 62 | USART3_BF(NBSTOP, USART3_NBSTOP_1)), 63 &usart->mr); 64 writel(USART3_BIT(RXEN) | USART3_BIT(TXEN), &usart->cr); 65 /* 100us is enough for the new settings to be settled */ 66 __udelay(100); 67 } 68 69 #ifndef CONFIG_DM_SERIAL 70 static void atmel_serial_setbrg(void) 71 { 72 atmel_serial_setbrg_internal((atmel_usart3_t *)CONFIG_USART_BASE, 73 CONFIG_USART_ID, gd->baudrate); 74 } 75 76 static int atmel_serial_init(void) 77 { 78 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE; 79 80 atmel_serial_init_internal(usart); 81 serial_setbrg(); 82 atmel_serial_activate(usart); 83 84 return 0; 85 } 86 87 static void atmel_serial_putc(char c) 88 { 89 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE; 90 91 if (c == '\n') 92 serial_putc('\r'); 93 94 while (!(readl(&usart->csr) & USART3_BIT(TXRDY))); 95 writel(c, &usart->thr); 96 } 97 98 static int atmel_serial_getc(void) 99 { 100 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE; 101 102 while (!(readl(&usart->csr) & USART3_BIT(RXRDY))) 103 WATCHDOG_RESET(); 104 return readl(&usart->rhr); 105 } 106 107 static int atmel_serial_tstc(void) 108 { 109 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE; 110 return (readl(&usart->csr) & USART3_BIT(RXRDY)) != 0; 111 } 112 113 static struct serial_device atmel_serial_drv = { 114 .name = "atmel_serial", 115 .start = atmel_serial_init, 116 .stop = NULL, 117 .setbrg = atmel_serial_setbrg, 118 .putc = atmel_serial_putc, 119 .puts = default_serial_puts, 120 .getc = atmel_serial_getc, 121 .tstc = atmel_serial_tstc, 122 }; 123 124 void atmel_serial_initialize(void) 125 { 126 serial_register(&atmel_serial_drv); 127 } 128 129 __weak struct serial_device *default_serial_console(void) 130 { 131 return &atmel_serial_drv; 132 } 133 #endif 134 135 #ifdef CONFIG_DM_SERIAL 136 137 struct atmel_serial_priv { 138 atmel_usart3_t *usart; 139 }; 140 141 int atmel_serial_setbrg(struct udevice *dev, int baudrate) 142 { 143 struct atmel_serial_priv *priv = dev_get_priv(dev); 144 145 atmel_serial_setbrg_internal(priv->usart, 0 /* ignored */, baudrate); 146 atmel_serial_activate(priv->usart); 147 148 return 0; 149 } 150 151 static int atmel_serial_getc(struct udevice *dev) 152 { 153 struct atmel_serial_priv *priv = dev_get_priv(dev); 154 155 if (!(readl(&priv->usart->csr) & USART3_BIT(RXRDY))) 156 return -EAGAIN; 157 158 return readl(&priv->usart->rhr); 159 } 160 161 static int atmel_serial_putc(struct udevice *dev, const char ch) 162 { 163 struct atmel_serial_priv *priv = dev_get_priv(dev); 164 165 if (!(readl(&priv->usart->csr) & USART3_BIT(TXRDY))) 166 return -EAGAIN; 167 168 writel(ch, &priv->usart->thr); 169 170 return 0; 171 } 172 173 static int atmel_serial_pending(struct udevice *dev, bool input) 174 { 175 struct atmel_serial_priv *priv = dev_get_priv(dev); 176 uint32_t csr = readl(&priv->usart->csr); 177 178 if (input) 179 return csr & USART3_BIT(RXRDY) ? 1 : 0; 180 else 181 return csr & USART3_BIT(TXEMPTY) ? 0 : 1; 182 } 183 184 static const struct dm_serial_ops atmel_serial_ops = { 185 .putc = atmel_serial_putc, 186 .pending = atmel_serial_pending, 187 .getc = atmel_serial_getc, 188 .setbrg = atmel_serial_setbrg, 189 }; 190 191 static int atmel_serial_probe(struct udevice *dev) 192 { 193 struct atmel_serial_platdata *plat = dev->platdata; 194 struct atmel_serial_priv *priv = dev_get_priv(dev); 195 #if CONFIG_IS_ENABLED(OF_CONTROL) 196 fdt_addr_t addr_base; 197 198 addr_base = dev_get_addr(dev); 199 if (addr_base == FDT_ADDR_T_NONE) 200 return -ENODEV; 201 202 plat->base_addr = (uint32_t)addr_base; 203 #endif 204 priv->usart = (atmel_usart3_t *)plat->base_addr; 205 atmel_serial_init_internal(priv->usart); 206 207 return 0; 208 } 209 210 #if CONFIG_IS_ENABLED(OF_CONTROL) 211 static const struct udevice_id atmel_serial_ids[] = { 212 { .compatible = "atmel,at91sam9260-usart" }, 213 { } 214 }; 215 #endif 216 217 U_BOOT_DRIVER(serial_atmel) = { 218 .name = "serial_atmel", 219 .id = UCLASS_SERIAL, 220 #if CONFIG_IS_ENABLED(OF_CONTROL) 221 .of_match = atmel_serial_ids, 222 .platdata_auto_alloc_size = sizeof(struct atmel_serial_platdata), 223 #endif 224 .probe = atmel_serial_probe, 225 .ops = &atmel_serial_ops, 226 .flags = DM_FLAG_PRE_RELOC, 227 .priv_auto_alloc_size = sizeof(struct atmel_serial_priv), 228 }; 229 #endif 230 231 #ifdef CONFIG_DEBUG_UART_ATMEL 232 static inline void _debug_uart_init(void) 233 { 234 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_DEBUG_UART_BASE; 235 236 atmel_serial_setbrg_internal(usart, 0, CONFIG_BAUDRATE); 237 } 238 239 static inline void _debug_uart_putc(int ch) 240 { 241 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_DEBUG_UART_BASE; 242 243 while (!(readl(&usart->csr) & USART3_BIT(TXRDY))) 244 ; 245 246 writel(ch, &usart->thr); 247 } 248 249 DEBUG_UART_FUNCS 250 #endif 251