xref: /openbmc/u-boot/drivers/serial/arm_dcc.c (revision 29b103c7)
1 /*
2  * Copyright (C) 2004-2007 ARM Limited.
3  * Copyright (C) 2008 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
4  *
5  * This program is free software; you can redistribute it and/or
6  * modify it under the terms of the GNU General Public License version 2
7  * as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
17  *
18  * As a special exception, if other files instantiate templates or use macros
19  * or inline functions from this file, or you compile this file and link it
20  * with other works to produce a work based on this file, this file does not
21  * by itself cause the resulting work to be covered by the GNU General Public
22  * License. However the source code for this file must still be made available
23  * in accordance with section (3) of the GNU General Public License.
24 
25  * This exception does not invalidate any other reasons why a work based on
26  * this file might be covered by the GNU General Public License.
27  */
28 
29 #include <common.h>
30 #include <serial.h>
31 
32 #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V7)
33 /*
34  * ARMV6 & ARMV7
35  */
36 #define DCC_RBIT	(1 << 30)
37 #define DCC_WBIT	(1 << 29)
38 
39 #define write_dcc(x)	\
40 		__asm__ volatile ("mcr p14, 0, %0, c0, c5, 0\n" : : "r" (x))
41 
42 #define read_dcc(x)	\
43 		__asm__ volatile ("mrc p14, 0, %0, c0, c5, 0\n" : "=r" (x))
44 
45 #define status_dcc(x)	\
46 		__asm__ volatile ("mrc p14, 0, %0, c0, c1, 0\n" : "=r" (x))
47 
48 #elif defined(CONFIG_CPU_XSCALE)
49 /*
50  * XSCALE
51  */
52 #define DCC_RBIT	(1 << 31)
53 #define DCC_WBIT	(1 << 28)
54 
55 #define write_dcc(x)	\
56 		__asm__ volatile ("mcr p14, 0, %0, c8, c0, 0\n" : : "r" (x))
57 
58 #define read_dcc(x)	\
59 		__asm__ volatile ("mrc p14, 0, %0, c9, c0, 0\n" : "=r" (x))
60 
61 #define status_dcc(x)	\
62 		__asm__ volatile ("mrc p14, 0, %0, c14, c0, 0\n" : "=r" (x))
63 
64 #elif defined(CONFIG_CPU_ARMV8)
65 /*
66  * ARMV8
67  */
68 #define DCC_RBIT	(1 << 30)
69 #define DCC_WBIT	(1 << 29)
70 
71 #define write_dcc(x)   \
72 		__asm__ volatile ("msr dbgdtrtx_el0, %0\n" : : "r" (x))
73 
74 #define read_dcc(x)    \
75 		__asm__ volatile ("mrs %0, dbgdtrrx_el0\n" : "=r" (x))
76 
77 #define status_dcc(x)  \
78 		__asm__ volatile ("mrs %0, mdccsr_el0\n" : "=r" (x))
79 
80 #else
81 #define DCC_RBIT	(1 << 0)
82 #define DCC_WBIT	(1 << 1)
83 
84 #define write_dcc(x)	\
85 		__asm__ volatile ("mcr p14, 0, %0, c1, c0, 0\n" : : "r" (x))
86 
87 #define read_dcc(x)	\
88 		__asm__ volatile ("mrc p14, 0, %0, c1, c0, 0\n" : "=r" (x))
89 
90 #define status_dcc(x)	\
91 		__asm__ volatile ("mrc p14, 0, %0, c0, c0, 0\n" : "=r" (x))
92 
93 #endif
94 
95 #define can_read_dcc(x)	do {	\
96 		status_dcc(x);	\
97 		x &= DCC_RBIT;	\
98 		} while (0);
99 
100 #define can_write_dcc(x) do {	\
101 		status_dcc(x);	\
102 		x &= DCC_WBIT;	\
103 		x = (x == 0);	\
104 		} while (0);
105 
106 #define TIMEOUT_COUNT 0x4000000
107 
108 static int arm_dcc_init(void)
109 {
110 	return 0;
111 }
112 
113 static int arm_dcc_getc(void)
114 {
115 	int ch;
116 	register unsigned int reg;
117 
118 	do {
119 		can_read_dcc(reg);
120 	} while (!reg);
121 	read_dcc(ch);
122 
123 	return ch;
124 }
125 
126 static void arm_dcc_putc(char ch)
127 {
128 	register unsigned int reg;
129 	unsigned int timeout_count = TIMEOUT_COUNT;
130 
131 	while (--timeout_count) {
132 		can_write_dcc(reg);
133 		if (reg)
134 			break;
135 	}
136 	if (timeout_count == 0)
137 		return;
138 	else
139 		write_dcc(ch);
140 }
141 
142 static int arm_dcc_tstc(void)
143 {
144 	register unsigned int reg;
145 
146 	can_read_dcc(reg);
147 
148 	return reg;
149 }
150 
151 static void arm_dcc_setbrg(void)
152 {
153 }
154 
155 static struct serial_device arm_dcc_drv = {
156 	.name	= "arm_dcc",
157 	.start	= arm_dcc_init,
158 	.stop	= NULL,
159 	.setbrg	= arm_dcc_setbrg,
160 	.putc	= arm_dcc_putc,
161 	.puts	= default_serial_puts,
162 	.getc	= arm_dcc_getc,
163 	.tstc	= arm_dcc_tstc,
164 };
165 
166 void arm_dcc_initialize(void)
167 {
168 	serial_register(&arm_dcc_drv);
169 }
170 
171 __weak struct serial_device *default_serial_console(void)
172 {
173 	return &arm_dcc_drv;
174 }
175