xref: /openbmc/u-boot/drivers/serial/altera_uart.c (revision c39fcad7)
1 /*
2  * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
3  * Scott McNutt <smcnutt@psyent.com>
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #include <common.h>
9 #include <dm.h>
10 #include <errno.h>
11 #include <asm/io.h>
12 #include <linux/compiler.h>
13 #include <serial.h>
14 
15 struct altera_uart_regs {
16 	u32	rxdata;		/* Rx data reg */
17 	u32	txdata;		/* Tx data reg */
18 	u32	status;		/* Status reg */
19 	u32	control;	/* Control reg */
20 	u32	divisor;	/* Baud rate divisor reg */
21 	u32	endofpacket;	/* End-of-packet reg */
22 };
23 
24 struct altera_uart_platdata {
25 	struct altera_uart_regs *regs;
26 	unsigned int uartclk;
27 };
28 
29 /* status register */
30 #define ALTERA_UART_TMT		(1 << 5)	/* tx empty */
31 #define ALTERA_UART_TRDY	(1 << 6)	/* tx ready */
32 #define ALTERA_UART_RRDY	(1 << 7)	/* rx ready */
33 
34 DECLARE_GLOBAL_DATA_PTR;
35 
36 static int altera_uart_setbrg(struct udevice *dev, int baudrate)
37 {
38 	struct altera_uart_platdata *plat = dev->platdata;
39 	struct altera_uart_regs *const regs = plat->regs;
40 	u32 div;
41 
42 	div = (plat->uartclk / baudrate) - 1;
43 	writel(div, &regs->divisor);
44 
45 	return 0;
46 }
47 
48 static int altera_uart_putc(struct udevice *dev, const char ch)
49 {
50 	struct altera_uart_platdata *plat = dev->platdata;
51 	struct altera_uart_regs *const regs = plat->regs;
52 
53 	if (!(readl(&regs->status) & ALTERA_UART_TRDY))
54 		return -EAGAIN;
55 
56 	writel(ch, &regs->txdata);
57 
58 	return 0;
59 }
60 
61 static int altera_uart_pending(struct udevice *dev, bool input)
62 {
63 	struct altera_uart_platdata *plat = dev->platdata;
64 	struct altera_uart_regs *const regs = plat->regs;
65 	u32 st = readl(&regs->status);
66 
67 	if (input)
68 		return st & ALTERA_UART_RRDY ? 1 : 0;
69 	else
70 		return !(st & ALTERA_UART_TMT);
71 }
72 
73 static int altera_uart_getc(struct udevice *dev)
74 {
75 	struct altera_uart_platdata *plat = dev->platdata;
76 	struct altera_uart_regs *const regs = plat->regs;
77 
78 	if (!(readl(&regs->status) & ALTERA_UART_RRDY))
79 		return -EAGAIN;
80 
81 	return readl(&regs->rxdata) & 0xff;
82 }
83 
84 static int altera_uart_probe(struct udevice *dev)
85 {
86 	return 0;
87 }
88 
89 static int altera_uart_ofdata_to_platdata(struct udevice *dev)
90 {
91 	struct altera_uart_platdata *plat = dev_get_platdata(dev);
92 
93 	plat->regs = ioremap(dev_get_addr(dev),
94 		sizeof(struct altera_uart_regs));
95 	plat->uartclk = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
96 		"clock-frequency", 0);
97 
98 	return 0;
99 }
100 
101 static const struct dm_serial_ops altera_uart_ops = {
102 	.putc = altera_uart_putc,
103 	.pending = altera_uart_pending,
104 	.getc = altera_uart_getc,
105 	.setbrg = altera_uart_setbrg,
106 };
107 
108 static const struct udevice_id altera_uart_ids[] = {
109 	{ .compatible = "altr,uart-1.0", },
110 	{ }
111 };
112 
113 U_BOOT_DRIVER(altera_uart) = {
114 	.name	= "altera_uart",
115 	.id	= UCLASS_SERIAL,
116 	.of_match = altera_uart_ids,
117 	.ofdata_to_platdata = altera_uart_ofdata_to_platdata,
118 	.platdata_auto_alloc_size = sizeof(struct altera_uart_platdata),
119 	.probe = altera_uart_probe,
120 	.ops	= &altera_uart_ops,
121 	.flags = DM_FLAG_PRE_RELOC,
122 };
123 
124 #ifdef CONFIG_DEBUG_UART_ALTERA_UART
125 
126 #include <debug_uart.h>
127 
128 void debug_uart_init(void)
129 {
130 	struct altera_uart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE;
131 	u32 div;
132 
133 	div = (CONFIG_DEBUG_UART_CLOCK / CONFIG_BAUDRATE) - 1;
134 	writel(div, &regs->divisor);
135 }
136 
137 static inline void _debug_uart_putc(int ch)
138 {
139 	struct altera_uart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE;
140 
141 	while (1) {
142 		u32 st = readl(&regs->status);
143 
144 		if (st & ALTERA_UART_TRDY)
145 			break;
146 	}
147 
148 	writel(ch, &regs->txdata);
149 }
150 
151 DEBUG_UART_FUNCS
152 
153 #endif
154