1 /* 2 * (C) Copyright 2004, Psyent Corporation <www.psyent.com> 3 * Scott McNutt <smcnutt@psyent.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <common.h> 9 #include <dm.h> 10 #include <errno.h> 11 #include <serial.h> 12 #include <asm/io.h> 13 14 DECLARE_GLOBAL_DATA_PTR; 15 16 /* status register */ 17 #define ALTERA_UART_TMT BIT(5) /* tx empty */ 18 #define ALTERA_UART_TRDY BIT(6) /* tx ready */ 19 #define ALTERA_UART_RRDY BIT(7) /* rx ready */ 20 21 struct altera_uart_regs { 22 u32 rxdata; /* Rx data reg */ 23 u32 txdata; /* Tx data reg */ 24 u32 status; /* Status reg */ 25 u32 control; /* Control reg */ 26 u32 divisor; /* Baud rate divisor reg */ 27 u32 endofpacket; /* End-of-packet reg */ 28 }; 29 30 struct altera_uart_platdata { 31 struct altera_uart_regs *regs; 32 unsigned int uartclk; 33 }; 34 35 static int altera_uart_setbrg(struct udevice *dev, int baudrate) 36 { 37 struct altera_uart_platdata *plat = dev->platdata; 38 struct altera_uart_regs *const regs = plat->regs; 39 u32 div; 40 41 div = (plat->uartclk / baudrate) - 1; 42 writel(div, ®s->divisor); 43 44 return 0; 45 } 46 47 static int altera_uart_putc(struct udevice *dev, const char ch) 48 { 49 struct altera_uart_platdata *plat = dev->platdata; 50 struct altera_uart_regs *const regs = plat->regs; 51 52 if (!(readl(®s->status) & ALTERA_UART_TRDY)) 53 return -EAGAIN; 54 55 writel(ch, ®s->txdata); 56 57 return 0; 58 } 59 60 static int altera_uart_pending(struct udevice *dev, bool input) 61 { 62 struct altera_uart_platdata *plat = dev->platdata; 63 struct altera_uart_regs *const regs = plat->regs; 64 u32 st = readl(®s->status); 65 66 if (input) 67 return st & ALTERA_UART_RRDY ? 1 : 0; 68 else 69 return !(st & ALTERA_UART_TMT); 70 } 71 72 static int altera_uart_getc(struct udevice *dev) 73 { 74 struct altera_uart_platdata *plat = dev->platdata; 75 struct altera_uart_regs *const regs = plat->regs; 76 77 if (!(readl(®s->status) & ALTERA_UART_RRDY)) 78 return -EAGAIN; 79 80 return readl(®s->rxdata) & 0xff; 81 } 82 83 static int altera_uart_probe(struct udevice *dev) 84 { 85 return 0; 86 } 87 88 static int altera_uart_ofdata_to_platdata(struct udevice *dev) 89 { 90 struct altera_uart_platdata *plat = dev_get_platdata(dev); 91 92 plat->regs = map_physmem(dev_get_addr(dev), 93 sizeof(struct altera_uart_regs), 94 MAP_NOCACHE); 95 plat->uartclk = fdtdec_get_int(gd->fdt_blob, dev->of_offset, 96 "clock-frequency", 0); 97 98 return 0; 99 } 100 101 static const struct dm_serial_ops altera_uart_ops = { 102 .putc = altera_uart_putc, 103 .pending = altera_uart_pending, 104 .getc = altera_uart_getc, 105 .setbrg = altera_uart_setbrg, 106 }; 107 108 static const struct udevice_id altera_uart_ids[] = { 109 { .compatible = "altr,uart-1.0" }, 110 {} 111 }; 112 113 U_BOOT_DRIVER(altera_uart) = { 114 .name = "altera_uart", 115 .id = UCLASS_SERIAL, 116 .of_match = altera_uart_ids, 117 .ofdata_to_platdata = altera_uart_ofdata_to_platdata, 118 .platdata_auto_alloc_size = sizeof(struct altera_uart_platdata), 119 .probe = altera_uart_probe, 120 .ops = &altera_uart_ops, 121 .flags = DM_FLAG_PRE_RELOC, 122 }; 123 124 #ifdef CONFIG_DEBUG_UART_ALTERA_UART 125 126 #include <debug_uart.h> 127 128 static inline void _debug_uart_init(void) 129 { 130 struct altera_uart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE; 131 u32 div; 132 133 div = (CONFIG_DEBUG_UART_CLOCK / CONFIG_BAUDRATE) - 1; 134 writel(div, ®s->divisor); 135 } 136 137 static inline void _debug_uart_putc(int ch) 138 { 139 struct altera_uart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE; 140 141 while (1) { 142 u32 st = readl(®s->status); 143 144 if (st & ALTERA_UART_TRDY) 145 break; 146 } 147 148 writel(ch, ®s->txdata); 149 } 150 151 DEBUG_UART_FUNCS 152 153 #endif 154