xref: /openbmc/u-boot/drivers/rtc/s35392a.c (revision e8f80a5a)
1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0
2da5337a6SNandor Han /*
3da5337a6SNandor Han  * SII Semiconductor Corporation S35392A RTC driver.
4da5337a6SNandor Han  *
5da5337a6SNandor Han  * Copyright (c) 2017, General Electric Company
6da5337a6SNandor Han  *
7da5337a6SNandor Han  * This program is free software; you can redistribute it and/or modify it
8da5337a6SNandor Han  * under the terms and conditions of the GNU General Public License,
9da5337a6SNandor Han  * version 2, as published by the Free Software Foundation.
10da5337a6SNandor Han  *
11da5337a6SNandor Han  * This program is distributed in the hope it will be useful, but WITHOUT
12da5337a6SNandor Han  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13da5337a6SNandor Han  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14da5337a6SNandor Han  * more details.
15da5337a6SNandor Han  *
16da5337a6SNandor Han  * You should have received a copy of the GNU General Public License
17da5337a6SNandor Han  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
18da5337a6SNandor Han  */
19da5337a6SNandor Han 
20da5337a6SNandor Han #include <command.h>
21da5337a6SNandor Han #include <common.h>
22da5337a6SNandor Han #include <dm.h>
23da5337a6SNandor Han #include <i2c.h>
24da5337a6SNandor Han #include <linux/bitrev.h>
25da5337a6SNandor Han #include <rtc.h>
26da5337a6SNandor Han 
27da5337a6SNandor Han #define S35390A_CMD_STATUS1		0x30
28da5337a6SNandor Han #define S35390A_CMD_STATUS2		0x31
29da5337a6SNandor Han #define S35390A_CMD_TIME1		0x32
30da5337a6SNandor Han #define S35390A_CMD_TIME2		0x33
31da5337a6SNandor Han #define S35390A_CMD_INT2_REG1	0x35
32da5337a6SNandor Han 
33da5337a6SNandor Han #define S35390A_BYTE_YEAR	0
34da5337a6SNandor Han #define S35390A_BYTE_MONTH	1
35da5337a6SNandor Han #define S35390A_BYTE_DAY	2
36da5337a6SNandor Han #define S35390A_BYTE_WDAY	3
37da5337a6SNandor Han #define S35390A_BYTE_HOURS	4
38da5337a6SNandor Han #define S35390A_BYTE_MINS	5
39da5337a6SNandor Han #define S35390A_BYTE_SECS	6
40da5337a6SNandor Han 
41da5337a6SNandor Han /* flags for STATUS1 */
42da5337a6SNandor Han #define S35390A_FLAG_POC	0x01
43da5337a6SNandor Han #define S35390A_FLAG_BLD	0x02
44da5337a6SNandor Han #define S35390A_FLAG_INT2	0x04
45da5337a6SNandor Han #define S35390A_FLAG_24H	0x40
46da5337a6SNandor Han #define S35390A_FLAG_RESET	0x80
47da5337a6SNandor Han 
48da5337a6SNandor Han /*
49da5337a6SNandor Han  * If either BLD or POC is set, then the chip has lost power long enough for
50da5337a6SNandor Han  * the time value to become invalid.
51da5337a6SNandor Han  */
52da5337a6SNandor Han #define S35390A_LOW_VOLTAGE (S35390A_FLAG_POC | S35390A_FLAG_BLD)
53da5337a6SNandor Han 
54da5337a6SNandor Han /*---------------------------------------------------------------------*/
55da5337a6SNandor Han #undef DEBUG_RTC
56da5337a6SNandor Han 
57da5337a6SNandor Han #ifdef DEBUG_RTC
58da5337a6SNandor Han #define DEBUGR(fmt, args...) printf(fmt, ##args)
59da5337a6SNandor Han #else
60da5337a6SNandor Han #define DEBUGR(fmt, args...)
61da5337a6SNandor Han #endif
62da5337a6SNandor Han /*---------------------------------------------------------------------*/
63da5337a6SNandor Han 
64da5337a6SNandor Han #ifdef CONFIG_DM_RTC
65da5337a6SNandor Han #define DEV_TYPE struct udevice
66da5337a6SNandor Han #else
67da5337a6SNandor Han /* Local udevice */
68da5337a6SNandor Han struct ludevice {
69da5337a6SNandor Han 	u8 chip;
70da5337a6SNandor Han };
71da5337a6SNandor Han 
72da5337a6SNandor Han #define DEV_TYPE struct ludevice
73da5337a6SNandor Han struct ludevice dev;
74da5337a6SNandor Han 
75da5337a6SNandor Han #endif
76da5337a6SNandor Han 
77da5337a6SNandor Han #define msleep(a) udelay(a * 1000)
78da5337a6SNandor Han 
79da5337a6SNandor Han int lowvoltage;
80da5337a6SNandor Han 
81da5337a6SNandor Han static int s35392a_rtc_reset(DEV_TYPE *dev);
82da5337a6SNandor Han 
s35392a_rtc_read(DEV_TYPE * dev,u8 reg,u8 * buf,int len)83da5337a6SNandor Han static int s35392a_rtc_read(DEV_TYPE *dev, u8 reg, u8 *buf, int len)
84da5337a6SNandor Han {
85da5337a6SNandor Han 	int ret;
86da5337a6SNandor Han 
87da5337a6SNandor Han #ifdef CONFIG_DM_RTC
88da5337a6SNandor Han 	/* TODO: we need to tweak the chip address to reg */
89da5337a6SNandor Han 	ret = dm_i2c_read(dev, 0, buf, len);
90da5337a6SNandor Han #else
91da5337a6SNandor Han 	(void)dev;
92da5337a6SNandor Han 	ret = i2c_read(reg, 0, -1, buf, len);
93da5337a6SNandor Han #endif
94da5337a6SNandor Han 
95da5337a6SNandor Han 	return ret;
96da5337a6SNandor Han }
97da5337a6SNandor Han 
s35392a_rtc_write(DEV_TYPE * dev,u8 reg,u8 * buf,int len)98da5337a6SNandor Han static int s35392a_rtc_write(DEV_TYPE *dev, u8 reg, u8 *buf, int len)
99da5337a6SNandor Han {
100da5337a6SNandor Han 	int ret;
101da5337a6SNandor Han 
102da5337a6SNandor Han #ifdef CONFIG_DM_RTC
103da5337a6SNandor Han 	/* TODO: we need to tweak the chip address to reg */
104da5337a6SNandor Han 	ret = dm_i2c_write(dev, 0, buf, 1);
105da5337a6SNandor Han #else
106da5337a6SNandor Han 	(void)dev;
107da5337a6SNandor Han 	ret = i2c_write(reg, 0, 0, buf, len);
108da5337a6SNandor Han #endif
109da5337a6SNandor Han 
110da5337a6SNandor Han 	return ret;
111da5337a6SNandor Han }
112da5337a6SNandor Han 
s35392a_rtc_read8(DEV_TYPE * dev,unsigned int reg)113da5337a6SNandor Han static int s35392a_rtc_read8(DEV_TYPE *dev, unsigned int reg)
114da5337a6SNandor Han {
115da5337a6SNandor Han 	u8 val;
116da5337a6SNandor Han 	int ret;
117da5337a6SNandor Han 
118da5337a6SNandor Han 	ret = s35392a_rtc_read(dev, reg, &val, sizeof(val));
119da5337a6SNandor Han 	return ret < 0 ? ret : val;
120da5337a6SNandor Han }
121da5337a6SNandor Han 
s35392a_rtc_write8(DEV_TYPE * dev,unsigned int reg,int val)122da5337a6SNandor Han static int s35392a_rtc_write8(DEV_TYPE *dev, unsigned int reg, int val)
123da5337a6SNandor Han {
124da5337a6SNandor Han 	int ret;
125da5337a6SNandor Han 	u8 lval = val;
126da5337a6SNandor Han 
127da5337a6SNandor Han 	ret = s35392a_rtc_write(dev, reg, &lval, sizeof(lval));
128da5337a6SNandor Han 	return ret < 0 ? ret : 0;
129da5337a6SNandor Han }
130da5337a6SNandor Han 
validate_time(const struct rtc_time * tm)131da5337a6SNandor Han static int validate_time(const struct rtc_time *tm)
132da5337a6SNandor Han {
133da5337a6SNandor Han 	if ((tm->tm_year < 2000) || (tm->tm_year > 2099))
134da5337a6SNandor Han 		return -EINVAL;
135da5337a6SNandor Han 
136da5337a6SNandor Han 	if ((tm->tm_mon < 1) || (tm->tm_mon > 12))
137da5337a6SNandor Han 		return -EINVAL;
138da5337a6SNandor Han 
139da5337a6SNandor Han 	if ((tm->tm_mday < 1) || (tm->tm_mday > 31))
140da5337a6SNandor Han 		return -EINVAL;
141da5337a6SNandor Han 
142da5337a6SNandor Han 	if ((tm->tm_wday < 0) || (tm->tm_wday > 6))
143da5337a6SNandor Han 		return -EINVAL;
144da5337a6SNandor Han 
145da5337a6SNandor Han 	if ((tm->tm_hour < 0) || (tm->tm_hour > 23))
146da5337a6SNandor Han 		return -EINVAL;
147da5337a6SNandor Han 
148da5337a6SNandor Han 	if ((tm->tm_min < 0) || (tm->tm_min > 59))
149da5337a6SNandor Han 		return -EINVAL;
150da5337a6SNandor Han 
151da5337a6SNandor Han 	if ((tm->tm_sec < 0) || (tm->tm_sec > 59))
152da5337a6SNandor Han 		return -EINVAL;
153da5337a6SNandor Han 
154da5337a6SNandor Han 	return 0;
155da5337a6SNandor Han }
156da5337a6SNandor Han 
s35392a_rtc_init(DEV_TYPE * dev)157da5337a6SNandor Han void s35392a_rtc_init(DEV_TYPE *dev)
158da5337a6SNandor Han {
159da5337a6SNandor Han 	int status;
160da5337a6SNandor Han 
161da5337a6SNandor Han 	status = s35392a_rtc_read8(dev, S35390A_CMD_STATUS1);
162da5337a6SNandor Han 	if (status < 0)
163da5337a6SNandor Han 		goto error;
164da5337a6SNandor Han 
165da5337a6SNandor Han 	DEBUGR("init: S35390A_CMD_STATUS1: 0x%x\n", status);
166da5337a6SNandor Han 
167da5337a6SNandor Han 	lowvoltage = status & S35390A_LOW_VOLTAGE ? 1 : 0;
168da5337a6SNandor Han 
169da5337a6SNandor Han 	if (status & S35390A_FLAG_POC)
170da5337a6SNandor Han 		/*
171da5337a6SNandor Han 		 * Do not communicate for 0.5 seconds since the power-on
172da5337a6SNandor Han 		 * detection circuit is in operation.
173da5337a6SNandor Han 		 */
174da5337a6SNandor Han 		msleep(500);
175da5337a6SNandor Han 
176da5337a6SNandor Han 	else if (!lowvoltage)
177da5337a6SNandor Han 		/*
178da5337a6SNandor Han 		 * If both POC and BLD are unset everything is fine.
179da5337a6SNandor Han 		 */
180da5337a6SNandor Han 		return;
181da5337a6SNandor Han 
182da5337a6SNandor Han 	if (lowvoltage)
183da5337a6SNandor Han 		printf("RTC low voltage detected\n");
184da5337a6SNandor Han 
185da5337a6SNandor Han 	if (!s35392a_rtc_reset(dev))
186da5337a6SNandor Han 		return;
187da5337a6SNandor Han 
188da5337a6SNandor Han error:
189da5337a6SNandor Han 	printf("Error RTC init.\n");
190da5337a6SNandor Han }
191da5337a6SNandor Han 
192da5337a6SNandor Han /* Get the current time from the RTC */
s35392a_rtc_get(DEV_TYPE * dev,struct rtc_time * tm)193da5337a6SNandor Han static int s35392a_rtc_get(DEV_TYPE *dev, struct rtc_time *tm)
194da5337a6SNandor Han {
195da5337a6SNandor Han 	u8 date[7];
196da5337a6SNandor Han 	int ret, i;
197da5337a6SNandor Han 
198da5337a6SNandor Han 	if (lowvoltage) {
199da5337a6SNandor Han 		DEBUGR("RTC low voltage detected\n");
200da5337a6SNandor Han 		return -EINVAL;
201da5337a6SNandor Han 	}
202da5337a6SNandor Han 
203da5337a6SNandor Han 	ret = s35392a_rtc_read(dev, S35390A_CMD_TIME1, date, sizeof(date));
204da5337a6SNandor Han 	if (ret < 0) {
205da5337a6SNandor Han 		DEBUGR("Error reading date from RTC\n");
206da5337a6SNandor Han 		return -EIO;
207da5337a6SNandor Han 	}
208da5337a6SNandor Han 
209da5337a6SNandor Han 	/* This chip returns the bits of each byte in reverse order */
210da5337a6SNandor Han 	for (i = 0; i < 7; ++i)
211da5337a6SNandor Han 		date[i] = bitrev8(date[i]);
212da5337a6SNandor Han 
213da5337a6SNandor Han 	tm->tm_sec  = bcd2bin(date[S35390A_BYTE_SECS]);
214da5337a6SNandor Han 	tm->tm_min  = bcd2bin(date[S35390A_BYTE_MINS]);
215da5337a6SNandor Han 	tm->tm_hour = bcd2bin(date[S35390A_BYTE_HOURS] & ~S35390A_FLAG_24H);
216da5337a6SNandor Han 	tm->tm_wday = bcd2bin(date[S35390A_BYTE_WDAY]);
217da5337a6SNandor Han 	tm->tm_mday = bcd2bin(date[S35390A_BYTE_DAY]);
218da5337a6SNandor Han 	tm->tm_mon  = bcd2bin(date[S35390A_BYTE_MONTH]);
219da5337a6SNandor Han 	tm->tm_year = bcd2bin(date[S35390A_BYTE_YEAR]) + 2000;
220da5337a6SNandor Han 
221da5337a6SNandor Han 	DEBUGR("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
222da5337a6SNandor Han 	       tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
223da5337a6SNandor Han 	       tm->tm_hour, tm->tm_min, tm->tm_sec);
224da5337a6SNandor Han 
225da5337a6SNandor Han 	return 0;
226da5337a6SNandor Han }
227da5337a6SNandor Han 
228da5337a6SNandor Han /* Set the RTC */
s35392a_rtc_set(DEV_TYPE * dev,const struct rtc_time * tm)229da5337a6SNandor Han static int s35392a_rtc_set(DEV_TYPE *dev, const struct rtc_time *tm)
230da5337a6SNandor Han {
231da5337a6SNandor Han 	int i, ret;
232da5337a6SNandor Han 	int status;
233da5337a6SNandor Han 	u8 date[7];
234da5337a6SNandor Han 
235da5337a6SNandor Han 	DEBUGR("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
236da5337a6SNandor Han 	       tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
237da5337a6SNandor Han 	       tm->tm_hour, tm->tm_min, tm->tm_sec);
238da5337a6SNandor Han 
239da5337a6SNandor Han 	ret = validate_time(tm);
240da5337a6SNandor Han 	if (ret < 0)
241da5337a6SNandor Han 		return -EINVAL;
242da5337a6SNandor Han 
243da5337a6SNandor Han 	/* We support only 24h mode */
244da5337a6SNandor Han 	ret = s35392a_rtc_read8(dev, S35390A_CMD_STATUS1);
245da5337a6SNandor Han 	if (ret < 0)
246da5337a6SNandor Han 		return -EIO;
247da5337a6SNandor Han 	status = ret;
248da5337a6SNandor Han 
249da5337a6SNandor Han 	ret = s35392a_rtc_write8(dev, S35390A_CMD_STATUS1,
250da5337a6SNandor Han 				 status | S35390A_FLAG_24H);
251da5337a6SNandor Han 	if (ret < 0)
252da5337a6SNandor Han 		return -EIO;
253da5337a6SNandor Han 
254da5337a6SNandor Han 	date[S35390A_BYTE_YEAR]  = bin2bcd(tm->tm_year - 2000);
255da5337a6SNandor Han 	date[S35390A_BYTE_MONTH] = bin2bcd(tm->tm_mon);
256da5337a6SNandor Han 	date[S35390A_BYTE_DAY]   = bin2bcd(tm->tm_mday);
257da5337a6SNandor Han 	date[S35390A_BYTE_WDAY]  = bin2bcd(tm->tm_wday);
258da5337a6SNandor Han 	date[S35390A_BYTE_HOURS] = bin2bcd(tm->tm_hour);
259da5337a6SNandor Han 	date[S35390A_BYTE_MINS]  = bin2bcd(tm->tm_min);
260da5337a6SNandor Han 	date[S35390A_BYTE_SECS]  = bin2bcd(tm->tm_sec);
261da5337a6SNandor Han 
262da5337a6SNandor Han 	/* This chip expects the bits of each byte to be in reverse order */
263da5337a6SNandor Han 	for (i = 0; i < 7; ++i)
264da5337a6SNandor Han 		date[i] = bitrev8(date[i]);
265da5337a6SNandor Han 
266da5337a6SNandor Han 	ret = s35392a_rtc_write(dev, S35390A_CMD_TIME1, date, sizeof(date));
267da5337a6SNandor Han 	if (ret < 0) {
268da5337a6SNandor Han 		DEBUGR("Error writing date to RTC\n");
269da5337a6SNandor Han 		return -EIO;
270da5337a6SNandor Han 	}
271da5337a6SNandor Han 
272da5337a6SNandor Han 	/* Now we have time. Reset the low voltage status */
273da5337a6SNandor Han 	lowvoltage = 0;
274da5337a6SNandor Han 
275da5337a6SNandor Han 	return 0;
276da5337a6SNandor Han }
277da5337a6SNandor Han 
278da5337a6SNandor Han /* Reset the RTC. */
s35392a_rtc_reset(DEV_TYPE * dev)279da5337a6SNandor Han static int s35392a_rtc_reset(DEV_TYPE *dev)
280da5337a6SNandor Han {
281da5337a6SNandor Han 	int buf;
282da5337a6SNandor Han 	int ret;
283da5337a6SNandor Han 	unsigned int initcount = 0;
284da5337a6SNandor Han 
285da5337a6SNandor Han 	buf = S35390A_FLAG_RESET;
286da5337a6SNandor Han 
287da5337a6SNandor Han initialize:
288da5337a6SNandor Han 	ret = s35392a_rtc_write8(dev, S35390A_CMD_STATUS1, buf);
289da5337a6SNandor Han 	if (ret < 0)
290da5337a6SNandor Han 		return -EIO;
291da5337a6SNandor Han 
292da5337a6SNandor Han 	ret = s35392a_rtc_read8(dev, S35390A_CMD_STATUS1);
293da5337a6SNandor Han 	if (ret < 0)
294da5337a6SNandor Han 		return -EIO;
295da5337a6SNandor Han 	buf = ret;
296da5337a6SNandor Han 
297da5337a6SNandor Han 	if (!lowvoltage)
298da5337a6SNandor Han 		lowvoltage = buf & S35390A_LOW_VOLTAGE ? 1 : 0;
299da5337a6SNandor Han 
300da5337a6SNandor Han 	if (buf & S35390A_LOW_VOLTAGE) {
301da5337a6SNandor Han 		/* Try up to five times to reset the chip */
302da5337a6SNandor Han 		if (initcount < 5) {
303da5337a6SNandor Han 			++initcount;
304da5337a6SNandor Han 			goto initialize;
305da5337a6SNandor Han 		} else {
306da5337a6SNandor Han 			return -EIO;
307da5337a6SNandor Han 		}
308da5337a6SNandor Han 	}
309da5337a6SNandor Han 
310da5337a6SNandor Han 	return 0;
311da5337a6SNandor Han }
312da5337a6SNandor Han 
313da5337a6SNandor Han #ifndef CONFIG_DM_RTC
314da5337a6SNandor Han 
rtc_get(struct rtc_time * tm)315da5337a6SNandor Han int rtc_get(struct rtc_time *tm)
316da5337a6SNandor Han {
317da5337a6SNandor Han 	return s35392a_rtc_get(&dev, tm);
318da5337a6SNandor Han }
319da5337a6SNandor Han 
rtc_set(struct rtc_time * tm)320da5337a6SNandor Han int rtc_set(struct rtc_time *tm)
321da5337a6SNandor Han {
322da5337a6SNandor Han 	return s35392a_rtc_set(&dev, tm);
323da5337a6SNandor Han }
324da5337a6SNandor Han 
rtc_reset(void)325da5337a6SNandor Han void rtc_reset(void)
326da5337a6SNandor Han {
327da5337a6SNandor Han 	s35392a_rtc_reset(&dev);
328da5337a6SNandor Han }
329da5337a6SNandor Han 
rtc_init(void)330da5337a6SNandor Han void rtc_init(void)
331da5337a6SNandor Han {
332da5337a6SNandor Han 	s35392a_rtc_init(&dev);
333da5337a6SNandor Han }
334da5337a6SNandor Han 
335da5337a6SNandor Han #else
336da5337a6SNandor Han 
s35392a_probe(struct udevice * dev)337da5337a6SNandor Han static int s35392a_probe(struct udevice *dev)
338da5337a6SNandor Han {
339da5337a6SNandor Han 	s35392a_rtc_init(dev);
340da5337a6SNandor Han 	return 0;
341da5337a6SNandor Han }
342da5337a6SNandor Han 
343da5337a6SNandor Han static const struct rtc_ops s35392a_rtc_ops = {
344da5337a6SNandor Han 	.get = s35392a_rtc_get,
345da5337a6SNandor Han 	.set = s35392a_rtc_set,
346da5337a6SNandor Han 	.read8 = s35392a_rtc_read8,
347da5337a6SNandor Han 	.write8 = s35392a_rtc_write8,
348da5337a6SNandor Han 	.reset = s35392a_rtc_reset,
349da5337a6SNandor Han };
350da5337a6SNandor Han 
351da5337a6SNandor Han static const struct udevice_id s35392a_rtc_ids[] = {
352da5337a6SNandor Han 	{ .compatible = "sii,s35392a-rtc" },
353da5337a6SNandor Han 	{ }
354da5337a6SNandor Han };
355da5337a6SNandor Han 
356da5337a6SNandor Han U_BOOT_DRIVER(s35392a_rtc) = {
357da5337a6SNandor Han 	.name	  = "s35392a_rtc",
358da5337a6SNandor Han 	.id	      = UCLASS_RTC,
359da5337a6SNandor Han 	.probe    = s35392a_probe,
360da5337a6SNandor Han 	.of_match = s35392a_rtc_ids,
361da5337a6SNandor Han 	.ops	  = &s35392a_rtc_ops,
362da5337a6SNandor Han };
363da5337a6SNandor Han 
364da5337a6SNandor Han #endif
365