xref: /openbmc/u-boot/drivers/rtc/pt7c4338.c (revision c6af2e7d)
1 /*
2  * Copyright 2010 Freescale Semiconductor, Inc.
3  *
4  * Author:	Priyanka Jain <Priyanka.Jain@freescale.com>
5  *
6  * See file CREDITS for list of people who contributed to this
7  * project.
8  *
9  * This program is free software; you can redistribute it and/or
10  * modify it under the terms of the GNU General Public License as
11  * published by the Free Software Foundation; either version 2 of
12  * the License, or (at your option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
17  * GNU General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22  * MA 02111-1307 USA
23  */
24 
25 /*
26  * This file provides Date & Time support (no alarms) for PT7C4338 chip.
27  *
28  * This file is based on drivers/rtc/ds1337.c
29  *
30  * PT7C4338 chip is manufactured by Pericom Technology Inc.
31  * It is a serial real-time clock which provides
32  * 1)Low-power clock/calendar.
33  * 2)Programmable square-wave output.
34  * It has 56 bytes of nonvolatile RAM.
35  */
36 
37 #include <common.h>
38 #include <command.h>
39 #include <rtc.h>
40 #include <i2c.h>
41 
42 /* RTC register addresses */
43 #define RTC_SEC_REG_ADDR        0x0
44 #define RTC_MIN_REG_ADDR        0x1
45 #define RTC_HR_REG_ADDR         0x2
46 #define RTC_DAY_REG_ADDR        0x3
47 #define RTC_DATE_REG_ADDR       0x4
48 #define RTC_MON_REG_ADDR        0x5
49 #define RTC_YR_REG_ADDR         0x6
50 #define RTC_CTL_STAT_REG_ADDR   0x7
51 
52 /* RTC second register address bit */
53 #define RTC_SEC_BIT_CH		0x80	/* Clock Halt (in Register 0) */
54 
55 /* RTC control and status register bits */
56 #define RTC_CTL_STAT_BIT_RS0    0x1	/* Rate select 0 */
57 #define RTC_CTL_STAT_BIT_RS1    0x2	/* Rate select 1 */
58 #define RTC_CTL_STAT_BIT_SQWE   0x10	/* Square Wave Enable */
59 #define RTC_CTL_STAT_BIT_OSF    0x20	/* Oscillator Stop Flag */
60 #define RTC_CTL_STAT_BIT_OUT    0x80	/* Output Level Control */
61 
62 /* RTC reset value */
63 #define RTC_PT7C4338_RESET_VAL \
64 	(RTC_CTL_STAT_BIT_RS0 | RTC_CTL_STAT_BIT_RS1 | RTC_CTL_STAT_BIT_OUT)
65 
66 /****** Helper functions ****************************************/
67 static u8 rtc_read(u8 reg)
68 {
69 	return i2c_reg_read(CONFIG_SYS_I2C_RTC_ADDR, reg);
70 }
71 
72 static void rtc_write(u8 reg, u8 val)
73 {
74 	i2c_reg_write(CONFIG_SYS_I2C_RTC_ADDR, reg, val);
75 }
76 /****************************************************************/
77 
78 /* Get the current time from the RTC */
79 int rtc_get(struct rtc_time *tmp)
80 {
81 	int ret = 0;
82 	u8 sec, min, hour, mday, wday, mon, year, ctl_stat;
83 
84 	ctl_stat = rtc_read(RTC_CTL_STAT_REG_ADDR);
85 	sec = rtc_read(RTC_SEC_REG_ADDR);
86 	min = rtc_read(RTC_MIN_REG_ADDR);
87 	hour = rtc_read(RTC_HR_REG_ADDR);
88 	wday = rtc_read(RTC_DAY_REG_ADDR);
89 	mday = rtc_read(RTC_DATE_REG_ADDR);
90 	mon = rtc_read(RTC_MON_REG_ADDR);
91 	year = rtc_read(RTC_YR_REG_ADDR);
92 	debug("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
93 		"hr: %02x min: %02x sec: %02x control_status: %02x\n",
94 		year, mon, mday, wday, hour, min, sec, ctl_stat);
95 
96 	if (ctl_stat & RTC_CTL_STAT_BIT_OSF) {
97 		printf("### Warning: RTC oscillator has stopped\n");
98 		/* clear the OSF flag */
99 		rtc_write(RTC_CTL_STAT_REG_ADDR,
100 			rtc_read(RTC_CTL_STAT_REG_ADDR)\
101 			& ~RTC_CTL_STAT_BIT_OSF);
102 		ret = -1;
103 	}
104 
105 	tmp->tm_sec = bcd2bin(sec & 0x7F);
106 	tmp->tm_min = bcd2bin(min & 0x7F);
107 	tmp->tm_hour = bcd2bin(hour & 0x3F);
108 	tmp->tm_mday = bcd2bin(mday & 0x3F);
109 	tmp->tm_mon = bcd2bin(mon & 0x1F);
110 	tmp->tm_year = bcd2bin(year) + 2000;
111 	tmp->tm_wday = bcd2bin((wday - 1) & 0x07);
112 	tmp->tm_yday = 0;
113 	tmp->tm_isdst = 0;
114 	debug("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
115 		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
116 		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
117 
118 	return ret;
119 }
120 
121 /* Set the RTC */
122 int rtc_set(struct rtc_time *tmp)
123 {
124 	debug("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
125 		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
126 		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
127 
128 	rtc_write(RTC_YR_REG_ADDR, bin2bcd(tmp->tm_year % 100));
129 	rtc_write(RTC_MON_REG_ADDR, bin2bcd(tmp->tm_mon));
130 	rtc_write(RTC_DAY_REG_ADDR, bin2bcd(tmp->tm_wday + 1));
131 	rtc_write(RTC_DATE_REG_ADDR, bin2bcd(tmp->tm_mday));
132 	rtc_write(RTC_HR_REG_ADDR, bin2bcd(tmp->tm_hour));
133 	rtc_write(RTC_MIN_REG_ADDR, bin2bcd(tmp->tm_min));
134 	rtc_write(RTC_SEC_REG_ADDR, bin2bcd(tmp->tm_sec));
135 
136 	return 0;
137 }
138 
139 /* Reset the RTC */
140 void rtc_reset(void)
141 {
142 	rtc_write(RTC_SEC_REG_ADDR, 0x00);	/* clearing Clock Halt	*/
143 	rtc_write(RTC_CTL_STAT_REG_ADDR, RTC_PT7C4338_RESET_VAL);
144 }
145