1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * (C) Copyright 2001 4 * Denis Peter MPL AG Switzerland. d.peter@mpl.ch 5 */ 6 7 /* 8 * Date & Time support for the MC146818 (PIXX4) RTC 9 */ 10 11 #include <common.h> 12 #include <command.h> 13 #include <dm.h> 14 #include <rtc.h> 15 16 #if defined(CONFIG_X86) || defined(CONFIG_MALTA) 17 #include <asm/io.h> 18 #define in8(p) inb(p) 19 #define out8(p, v) outb(v, p) 20 #endif 21 22 #if defined(CONFIG_CMD_DATE) 23 24 /* Set this to 1 to clear the CMOS RAM */ 25 #define CLEAR_CMOS 0 26 27 #define RTC_PORT_MC146818 CONFIG_SYS_ISA_IO_BASE_ADDRESS + 0x70 28 #define RTC_SECONDS 0x00 29 #define RTC_SECONDS_ALARM 0x01 30 #define RTC_MINUTES 0x02 31 #define RTC_MINUTES_ALARM 0x03 32 #define RTC_HOURS 0x04 33 #define RTC_HOURS_ALARM 0x05 34 #define RTC_DAY_OF_WEEK 0x06 35 #define RTC_DATE_OF_MONTH 0x07 36 #define RTC_MONTH 0x08 37 #define RTC_YEAR 0x09 38 #define RTC_CONFIG_A 0x0a 39 #define RTC_CONFIG_B 0x0b 40 #define RTC_CONFIG_C 0x0c 41 #define RTC_CONFIG_D 0x0d 42 #define RTC_REG_SIZE 0x80 43 44 #define RTC_CONFIG_A_REF_CLCK_32KHZ (1 << 5) 45 #define RTC_CONFIG_A_RATE_1024HZ 6 46 47 #define RTC_CONFIG_B_24H (1 << 1) 48 49 #define RTC_CONFIG_D_VALID_RAM_AND_TIME 0x80 50 51 static int mc146818_read8(int reg) 52 { 53 #ifdef CONFIG_SYS_RTC_REG_BASE_ADDR 54 return in8(CONFIG_SYS_RTC_REG_BASE_ADDR + reg); 55 #else 56 int ofs = 0; 57 58 if (reg >= 128) { 59 ofs = 2; 60 reg -= 128; 61 } 62 out8(RTC_PORT_MC146818 + ofs, reg); 63 64 return in8(RTC_PORT_MC146818 + ofs + 1); 65 #endif 66 } 67 68 static void mc146818_write8(int reg, uchar val) 69 { 70 #ifdef CONFIG_SYS_RTC_REG_BASE_ADDR 71 out8(CONFIG_SYS_RTC_REG_BASE_ADDR + reg, val); 72 #else 73 int ofs = 0; 74 75 if (reg >= 128) { 76 ofs = 2; 77 reg -= 128; 78 } 79 out8(RTC_PORT_MC146818 + ofs, reg); 80 out8(RTC_PORT_MC146818 + ofs + 1, val); 81 #endif 82 } 83 84 static int mc146818_get(struct rtc_time *tmp) 85 { 86 uchar sec, min, hour, mday, wday, mon, year; 87 88 /* here check if rtc can be accessed */ 89 while ((mc146818_read8(RTC_CONFIG_A) & 0x80) == 0x80) 90 ; 91 92 sec = mc146818_read8(RTC_SECONDS); 93 min = mc146818_read8(RTC_MINUTES); 94 hour = mc146818_read8(RTC_HOURS); 95 mday = mc146818_read8(RTC_DATE_OF_MONTH); 96 wday = mc146818_read8(RTC_DAY_OF_WEEK); 97 mon = mc146818_read8(RTC_MONTH); 98 year = mc146818_read8(RTC_YEAR); 99 #ifdef RTC_DEBUG 100 printf("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x hr: %02x min: %02x sec: %02x\n", 101 year, mon, mday, wday, hour, min, sec); 102 printf("Alarms: mday: %02x hour: %02x min: %02x sec: %02x\n", 103 mc146818_read8(RTC_CONFIG_D) & 0x3f, 104 mc146818_read8(RTC_HOURS_ALARM), 105 mc146818_read8(RTC_MINUTES_ALARM), 106 mc146818_read8(RTC_SECONDS_ALARM)); 107 #endif 108 tmp->tm_sec = bcd2bin(sec & 0x7f); 109 tmp->tm_min = bcd2bin(min & 0x7f); 110 tmp->tm_hour = bcd2bin(hour & 0x3f); 111 tmp->tm_mday = bcd2bin(mday & 0x3f); 112 tmp->tm_mon = bcd2bin(mon & 0x1f); 113 tmp->tm_year = bcd2bin(year); 114 tmp->tm_wday = bcd2bin(wday & 0x07); 115 116 if (tmp->tm_year < 70) 117 tmp->tm_year += 2000; 118 else 119 tmp->tm_year += 1900; 120 121 tmp->tm_yday = 0; 122 tmp->tm_isdst = 0; 123 #ifdef RTC_DEBUG 124 printf("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", 125 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, 126 tmp->tm_hour, tmp->tm_min, tmp->tm_sec); 127 #endif 128 129 return 0; 130 } 131 132 static int mc146818_set(struct rtc_time *tmp) 133 { 134 #ifdef RTC_DEBUG 135 printf("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", 136 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, 137 tmp->tm_hour, tmp->tm_min, tmp->tm_sec); 138 #endif 139 /* Disable the RTC to update the regs */ 140 mc146818_write8(RTC_CONFIG_B, 0x82); 141 142 mc146818_write8(RTC_YEAR, bin2bcd(tmp->tm_year % 100)); 143 mc146818_write8(RTC_MONTH, bin2bcd(tmp->tm_mon)); 144 mc146818_write8(RTC_DAY_OF_WEEK, bin2bcd(tmp->tm_wday)); 145 mc146818_write8(RTC_DATE_OF_MONTH, bin2bcd(tmp->tm_mday)); 146 mc146818_write8(RTC_HOURS, bin2bcd(tmp->tm_hour)); 147 mc146818_write8(RTC_MINUTES, bin2bcd(tmp->tm_min)); 148 mc146818_write8(RTC_SECONDS, bin2bcd(tmp->tm_sec)); 149 150 /* Enable the RTC to update the regs */ 151 mc146818_write8(RTC_CONFIG_B, 0x02); 152 153 return 0; 154 } 155 156 static void mc146818_reset(void) 157 { 158 /* Disable the RTC to update the regs */ 159 mc146818_write8(RTC_CONFIG_B, 0x82); 160 161 /* Normal OP */ 162 mc146818_write8(RTC_CONFIG_A, 0x20); 163 mc146818_write8(RTC_CONFIG_B, 0x00); 164 mc146818_write8(RTC_CONFIG_B, 0x00); 165 166 /* Enable the RTC to update the regs */ 167 mc146818_write8(RTC_CONFIG_B, 0x02); 168 } 169 170 static void mc146818_init(void) 171 { 172 #if CLEAR_CMOS 173 int i; 174 175 rtc_write8(RTC_SECONDS_ALARM, 0); 176 rtc_write8(RTC_MINUTES_ALARM, 0); 177 rtc_write8(RTC_HOURS_ALARM, 0); 178 for (i = RTC_CONFIG_A; i < RTC_REG_SIZE; i++) 179 rtc_write8(i, 0); 180 printf("RTC: zeroing CMOS RAM\n"); 181 #endif 182 183 /* Setup the real time clock */ 184 mc146818_write8(RTC_CONFIG_B, RTC_CONFIG_B_24H); 185 /* Setup the frequency it operates at */ 186 mc146818_write8(RTC_CONFIG_A, RTC_CONFIG_A_REF_CLCK_32KHZ | 187 RTC_CONFIG_A_RATE_1024HZ); 188 /* Ensure all reserved bits are 0 in register D */ 189 mc146818_write8(RTC_CONFIG_D, RTC_CONFIG_D_VALID_RAM_AND_TIME); 190 191 /* Clear any pending interrupts */ 192 mc146818_read8(RTC_CONFIG_C); 193 } 194 #endif /* CONFIG_CMD_DATE */ 195 196 #ifdef CONFIG_DM_RTC 197 198 static int rtc_mc146818_get(struct udevice *dev, struct rtc_time *time) 199 { 200 return mc146818_get(time); 201 } 202 203 static int rtc_mc146818_set(struct udevice *dev, const struct rtc_time *time) 204 { 205 return mc146818_set((struct rtc_time *)time); 206 } 207 208 static int rtc_mc146818_reset(struct udevice *dev) 209 { 210 mc146818_reset(); 211 212 return 0; 213 } 214 215 static int rtc_mc146818_read8(struct udevice *dev, unsigned int reg) 216 { 217 return mc146818_read8(reg); 218 } 219 220 static int rtc_mc146818_write8(struct udevice *dev, unsigned int reg, int val) 221 { 222 mc146818_write8(reg, val); 223 224 return 0; 225 } 226 227 static int rtc_mc146818_probe(struct udevice *dev) 228 { 229 mc146818_init(); 230 231 return 0; 232 } 233 234 static const struct rtc_ops rtc_mc146818_ops = { 235 .get = rtc_mc146818_get, 236 .set = rtc_mc146818_set, 237 .reset = rtc_mc146818_reset, 238 .read8 = rtc_mc146818_read8, 239 .write8 = rtc_mc146818_write8, 240 }; 241 242 static const struct udevice_id rtc_mc146818_ids[] = { 243 { .compatible = "motorola,mc146818" }, 244 { } 245 }; 246 247 U_BOOT_DRIVER(rtc_mc146818) = { 248 .name = "rtc_mc146818", 249 .id = UCLASS_RTC, 250 .of_match = rtc_mc146818_ids, 251 .probe = rtc_mc146818_probe, 252 .ops = &rtc_mc146818_ops, 253 }; 254 255 #else /* !CONFIG_DM_RTC */ 256 257 int rtc_get(struct rtc_time *tmp) 258 { 259 return mc146818_get(tmp); 260 } 261 262 int rtc_set(struct rtc_time *tmp) 263 { 264 return mc146818_set(tmp); 265 } 266 267 void rtc_reset(void) 268 { 269 mc146818_reset(); 270 } 271 272 int rtc_read8(int reg) 273 { 274 return mc146818_read8(reg); 275 } 276 277 void rtc_write8(int reg, uchar val) 278 { 279 mc146818_write8(reg, val); 280 } 281 282 u32 rtc_read32(int reg) 283 { 284 u32 value = 0; 285 int i; 286 287 for (i = 0; i < sizeof(value); i++) 288 value |= rtc_read8(reg + i) << (i << 3); 289 290 return value; 291 } 292 293 void rtc_write32(int reg, u32 value) 294 { 295 int i; 296 297 for (i = 0; i < sizeof(value); i++) 298 rtc_write8(reg + i, (value >> (i << 3)) & 0xff); 299 } 300 301 void rtc_init(void) 302 { 303 mc146818_init(); 304 } 305 306 #endif /* CONFIG_DM_RTC */ 307