1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * (C) Copyright 2001 4 * Denis Peter MPL AG Switzerland. d.peter@mpl.ch 5 */ 6 7 /* 8 * Date & Time support for the MC146818 (PIXX4) RTC 9 */ 10 11 #include <common.h> 12 #include <command.h> 13 #include <dm.h> 14 #include <rtc.h> 15 16 #if defined(CONFIG_X86) || defined(CONFIG_MALTA) 17 #include <asm/io.h> 18 #define in8(p) inb(p) 19 #define out8(p, v) outb(v, p) 20 #endif 21 22 #if defined(CONFIG_CMD_DATE) 23 24 /* Set this to 1 to clear the CMOS RAM */ 25 #define CLEAR_CMOS 0 26 27 #define RTC_PORT_MC146818 CONFIG_SYS_ISA_IO_BASE_ADDRESS + 0x70 28 #define RTC_SECONDS 0x00 29 #define RTC_SECONDS_ALARM 0x01 30 #define RTC_MINUTES 0x02 31 #define RTC_MINUTES_ALARM 0x03 32 #define RTC_HOURS 0x04 33 #define RTC_HOURS_ALARM 0x05 34 #define RTC_DAY_OF_WEEK 0x06 35 #define RTC_DATE_OF_MONTH 0x07 36 #define RTC_MONTH 0x08 37 #define RTC_YEAR 0x09 38 #define RTC_CONFIG_A 0x0a 39 #define RTC_CONFIG_B 0x0b 40 #define RTC_CONFIG_C 0x0c 41 #define RTC_CONFIG_D 0x0d 42 #define RTC_REG_SIZE 0x80 43 44 #define RTC_CONFIG_A_REF_CLCK_32KHZ (1 << 5) 45 #define RTC_CONFIG_A_RATE_1024HZ 6 46 47 #define RTC_CONFIG_B_24H (1 << 1) 48 49 #define RTC_CONFIG_D_VALID_RAM_AND_TIME 0x80 50 51 static int mc146818_read8(int reg) 52 { 53 #ifdef CONFIG_SYS_RTC_REG_BASE_ADDR 54 return in8(CONFIG_SYS_RTC_REG_BASE_ADDR + reg); 55 #else 56 int ofs = 0; 57 58 if (reg >= 128) { 59 ofs = 2; 60 reg -= 128; 61 } 62 out8(RTC_PORT_MC146818 + ofs, reg); 63 64 return in8(RTC_PORT_MC146818 + ofs + 1); 65 #endif 66 } 67 68 static void mc146818_write8(int reg, uchar val) 69 { 70 #ifdef CONFIG_SYS_RTC_REG_BASE_ADDR 71 out8(CONFIG_SYS_RTC_REG_BASE_ADDR + reg, val); 72 #else 73 int ofs = 0; 74 75 if (reg >= 128) { 76 ofs = 2; 77 reg -= 128; 78 } 79 out8(RTC_PORT_MC146818 + ofs, reg); 80 out8(RTC_PORT_MC146818 + ofs + 1, val); 81 #endif 82 } 83 84 static int mc146818_get(struct rtc_time *tmp) 85 { 86 uchar sec, min, hour, mday, wday __attribute__((unused)),mon, year; 87 88 /* here check if rtc can be accessed */ 89 while ((mc146818_read8(RTC_CONFIG_A) & 0x80) == 0x80) 90 ; 91 92 sec = mc146818_read8(RTC_SECONDS); 93 min = mc146818_read8(RTC_MINUTES); 94 hour = mc146818_read8(RTC_HOURS); 95 mday = mc146818_read8(RTC_DATE_OF_MONTH); 96 wday = mc146818_read8(RTC_DAY_OF_WEEK); 97 mon = mc146818_read8(RTC_MONTH); 98 year = mc146818_read8(RTC_YEAR); 99 #ifdef RTC_DEBUG 100 printf("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x hr: %02x min: %02x sec: %02x\n", 101 year, mon, mday, wday, hour, min, sec); 102 printf("Alarms: mday: %02x hour: %02x min: %02x sec: %02x\n", 103 mc146818_read8(RTC_CONFIG_D) & 0x3f, 104 mc146818_read8(RTC_HOURS_ALARM), 105 mc146818_read8(RTC_MINUTES_ALARM), 106 mc146818_read8(RTC_SECONDS_ALARM)); 107 #endif 108 tmp->tm_sec = bcd2bin(sec & 0x7f); 109 tmp->tm_min = bcd2bin(min & 0x7f); 110 tmp->tm_hour = bcd2bin(hour & 0x3f); 111 tmp->tm_mday = bcd2bin(mday & 0x3f); 112 tmp->tm_mon = bcd2bin(mon & 0x1f); 113 tmp->tm_year = bcd2bin(year); 114 115 if (tmp->tm_year < 70) 116 tmp->tm_year += 2000; 117 else 118 tmp->tm_year += 1900; 119 120 tmp->tm_yday = 0; 121 tmp->tm_isdst = 0; 122 /* 123 * The mc146818 only updates wday if it is non-zero, sunday is 1 124 * saturday is 7. So let's use our library routine. 125 */ 126 rtc_calc_weekday(tmp); 127 #ifdef RTC_DEBUG 128 printf("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", 129 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, 130 tmp->tm_hour, tmp->tm_min, tmp->tm_sec); 131 #endif 132 133 return 0; 134 } 135 136 static int mc146818_set(struct rtc_time *tmp) 137 { 138 #ifdef RTC_DEBUG 139 printf("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", 140 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, 141 tmp->tm_hour, tmp->tm_min, tmp->tm_sec); 142 #endif 143 /* Disable the RTC to update the regs */ 144 mc146818_write8(RTC_CONFIG_B, 0x82); 145 146 mc146818_write8(RTC_YEAR, bin2bcd(tmp->tm_year % 100)); 147 mc146818_write8(RTC_MONTH, bin2bcd(tmp->tm_mon)); 148 mc146818_write8(RTC_DAY_OF_WEEK, bin2bcd(tmp->tm_wday)); 149 mc146818_write8(RTC_DATE_OF_MONTH, bin2bcd(tmp->tm_mday)); 150 mc146818_write8(RTC_HOURS, bin2bcd(tmp->tm_hour)); 151 mc146818_write8(RTC_MINUTES, bin2bcd(tmp->tm_min)); 152 mc146818_write8(RTC_SECONDS, bin2bcd(tmp->tm_sec)); 153 154 /* Enable the RTC to update the regs */ 155 mc146818_write8(RTC_CONFIG_B, 0x02); 156 157 return 0; 158 } 159 160 static void mc146818_reset(void) 161 { 162 /* Disable the RTC to update the regs */ 163 mc146818_write8(RTC_CONFIG_B, 0x82); 164 165 /* Normal OP */ 166 mc146818_write8(RTC_CONFIG_A, 0x20); 167 mc146818_write8(RTC_CONFIG_B, 0x00); 168 mc146818_write8(RTC_CONFIG_B, 0x00); 169 170 /* Enable the RTC to update the regs */ 171 mc146818_write8(RTC_CONFIG_B, 0x02); 172 } 173 174 static void mc146818_init(void) 175 { 176 #if CLEAR_CMOS 177 int i; 178 179 rtc_write8(RTC_SECONDS_ALARM, 0); 180 rtc_write8(RTC_MINUTES_ALARM, 0); 181 rtc_write8(RTC_HOURS_ALARM, 0); 182 for (i = RTC_CONFIG_A; i < RTC_REG_SIZE; i++) 183 rtc_write8(i, 0); 184 printf("RTC: zeroing CMOS RAM\n"); 185 #endif 186 187 /* Setup the real time clock */ 188 mc146818_write8(RTC_CONFIG_B, RTC_CONFIG_B_24H); 189 /* Setup the frequency it operates at */ 190 mc146818_write8(RTC_CONFIG_A, RTC_CONFIG_A_REF_CLCK_32KHZ | 191 RTC_CONFIG_A_RATE_1024HZ); 192 /* Ensure all reserved bits are 0 in register D */ 193 mc146818_write8(RTC_CONFIG_D, RTC_CONFIG_D_VALID_RAM_AND_TIME); 194 195 /* Clear any pending interrupts */ 196 mc146818_read8(RTC_CONFIG_C); 197 } 198 #endif /* CONFIG_CMD_DATE */ 199 200 #ifdef CONFIG_DM_RTC 201 202 static int rtc_mc146818_get(struct udevice *dev, struct rtc_time *time) 203 { 204 return mc146818_get(time); 205 } 206 207 static int rtc_mc146818_set(struct udevice *dev, const struct rtc_time *time) 208 { 209 return mc146818_set((struct rtc_time *)time); 210 } 211 212 static int rtc_mc146818_reset(struct udevice *dev) 213 { 214 mc146818_reset(); 215 216 return 0; 217 } 218 219 static int rtc_mc146818_read8(struct udevice *dev, unsigned int reg) 220 { 221 return mc146818_read8(reg); 222 } 223 224 static int rtc_mc146818_write8(struct udevice *dev, unsigned int reg, int val) 225 { 226 mc146818_write8(reg, val); 227 228 return 0; 229 } 230 231 static int rtc_mc146818_probe(struct udevice *dev) 232 { 233 mc146818_init(); 234 235 return 0; 236 } 237 238 static const struct rtc_ops rtc_mc146818_ops = { 239 .get = rtc_mc146818_get, 240 .set = rtc_mc146818_set, 241 .reset = rtc_mc146818_reset, 242 .read8 = rtc_mc146818_read8, 243 .write8 = rtc_mc146818_write8, 244 }; 245 246 static const struct udevice_id rtc_mc146818_ids[] = { 247 { .compatible = "motorola,mc146818" }, 248 { } 249 }; 250 251 U_BOOT_DRIVER(rtc_mc146818) = { 252 .name = "rtc_mc146818", 253 .id = UCLASS_RTC, 254 .of_match = rtc_mc146818_ids, 255 .probe = rtc_mc146818_probe, 256 .ops = &rtc_mc146818_ops, 257 }; 258 259 #else /* !CONFIG_DM_RTC */ 260 261 int rtc_get(struct rtc_time *tmp) 262 { 263 return mc146818_get(tmp); 264 } 265 266 int rtc_set(struct rtc_time *tmp) 267 { 268 return mc146818_set(tmp); 269 } 270 271 void rtc_reset(void) 272 { 273 mc146818_reset(); 274 } 275 276 int rtc_read8(int reg) 277 { 278 return mc146818_read8(reg); 279 } 280 281 void rtc_write8(int reg, uchar val) 282 { 283 mc146818_write8(reg, val); 284 } 285 286 u32 rtc_read32(int reg) 287 { 288 u32 value = 0; 289 int i; 290 291 for (i = 0; i < sizeof(value); i++) 292 value |= rtc_read8(reg + i) << (i << 3); 293 294 return value; 295 } 296 297 void rtc_write32(int reg, u32 value) 298 { 299 int i; 300 301 for (i = 0; i < sizeof(value); i++) 302 rtc_write8(reg + i, (value >> (i << 3)) & 0xff); 303 } 304 305 void rtc_init(void) 306 { 307 mc146818_init(); 308 } 309 310 #endif /* CONFIG_DM_RTC */ 311