xref: /openbmc/u-boot/drivers/rtc/m48t35ax.c (revision 33b1d3f4)
1 /*
2  * (C) Copyright 2001
3  * Erik Theisen,  Wave 7 Optics, etheisen@mindspring.com.
4  *
5  * See file CREDITS for list of people who contributed to this
6  * project.
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License as
10  * published by the Free Software Foundation; either version 2 of
11  * the License, or (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21  * MA 02111-1307 USA
22  */
23 
24 /*
25  * Date & Time support for ST Electronics M48T35Ax RTC
26  */
27 
28 /*#define       DEBUG */
29 
30 
31 #include <common.h>
32 #include <command.h>
33 #include <rtc.h>
34 #include <config.h>
35 
36 #if defined(CONFIG_CMD_DATE)
37 
38 static uchar rtc_read  (uchar reg);
39 static void  rtc_write (uchar reg, uchar val);
40 static uchar bin2bcd   (unsigned int n);
41 static unsigned bcd2bin(uchar c);
42 
43 /* ------------------------------------------------------------------------- */
44 
45 int rtc_get (struct rtc_time *tmp)
46 {
47 	uchar sec, min, hour, cent_day, date, month, year;
48 	uchar ccr;			/* Clock control register */
49 
50 	/* Lock RTC for read using clock control register */
51 	ccr = rtc_read(0);
52 	ccr = ccr | 0x40;
53 	rtc_write(0, ccr);
54 
55 	sec	= rtc_read (0x1);
56 	min	= rtc_read (0x2);
57 	hour	= rtc_read (0x3);
58 	cent_day= rtc_read (0x4);
59 	date	= rtc_read (0x5);
60 	month   = rtc_read (0x6);
61 	year	= rtc_read (0x7);
62 
63 	/* UNLock RTC */
64 	ccr = rtc_read(0);
65 	ccr = ccr & 0xBF;
66 	rtc_write(0, ccr);
67 
68 	debug ( "Get RTC year: %02x month: %02x date: %02x cent_day: %02x "
69 		"hr: %02x min: %02x sec: %02x\n",
70 		year, month, date, cent_day,
71 		hour, min, sec );
72 
73 	tmp->tm_sec  = bcd2bin (sec  & 0x7F);
74 	tmp->tm_min  = bcd2bin (min  & 0x7F);
75 	tmp->tm_hour = bcd2bin (hour & 0x3F);
76 	tmp->tm_mday = bcd2bin (date & 0x3F);
77 	tmp->tm_mon  = bcd2bin (month & 0x1F);
78 	tmp->tm_year = bcd2bin (year) + ((cent_day & 0x10) ? 2000 : 1900);
79 	tmp->tm_wday = bcd2bin (cent_day & 0x07);
80 	tmp->tm_yday = 0;
81 	tmp->tm_isdst= 0;
82 
83 	debug ( "Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
84 		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
85 		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
86 
87 	return 0;
88 }
89 
90 int rtc_set (struct rtc_time *tmp)
91 {
92 	uchar ccr;			/* Clock control register */
93 	uchar century;
94 
95 	debug ( "Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
96 		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
97 		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
98 
99 	/* Lock RTC for write using clock control register */
100 	ccr = rtc_read(0);
101 	ccr = ccr | 0x80;
102 	rtc_write(0, ccr);
103 
104 	rtc_write (0x07, bin2bcd(tmp->tm_year % 100));
105 	rtc_write (0x06, bin2bcd(tmp->tm_mon));
106 	rtc_write (0x05, bin2bcd(tmp->tm_mday));
107 
108 	century = ((tmp->tm_year >= 2000) ? 0x10 : 0) | 0x20;
109 	rtc_write (0x04, bin2bcd(tmp->tm_wday) | century);
110 
111 	rtc_write (0x03, bin2bcd(tmp->tm_hour));
112 	rtc_write (0x02, bin2bcd(tmp->tm_min ));
113 	rtc_write (0x01, bin2bcd(tmp->tm_sec ));
114 
115 	/* UNLock RTC */
116 	ccr = rtc_read(0);
117 	ccr = ccr & 0x7F;
118 	rtc_write(0, ccr);
119 
120 	return 0;
121 }
122 
123 void rtc_reset (void)
124 {
125 	uchar val;
126 
127 	/* Clear all clock control registers */
128 	rtc_write (0x0, 0x80);		/* No Read Lock or calibration */
129 
130 	/* Clear stop bit */
131 	val = rtc_read (0x1);
132 	val &= 0x7f;
133 	rtc_write(0x1, val);
134 
135 	/* Enable century / disable frequency test */
136 	val = rtc_read (0x4);
137 	val = (val & 0xBF) | 0x20;
138 	rtc_write(0x4, val);
139 
140 	/* Clear write lock */
141 	rtc_write(0x0, 0);
142 }
143 
144 /* ------------------------------------------------------------------------- */
145 
146 static uchar rtc_read (uchar reg)
147 {
148 	uchar val;
149 	val = *(unsigned char *)
150 		((CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE - 8) + reg);
151 	return val;
152 }
153 
154 static void rtc_write (uchar reg, uchar val)
155 {
156 	*(unsigned char *)
157 		((CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE - 8) + reg) = val;
158 }
159 
160 static unsigned bcd2bin (uchar n)
161 {
162 	return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
163 }
164 
165 static unsigned char bin2bcd (unsigned int n)
166 {
167 	return (((n / 10) << 4) | (n % 10));
168 }
169 
170 #endif
171