xref: /openbmc/u-boot/drivers/rtc/m41t62.c (revision 90c08fa0)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2008
4  * Stefan Roese, DENX Software Engineering, sr@denx.de.
5  *
6  * based on a the Linux rtc-m41t80.c driver which is:
7  *   Alexander Bigga <ab@mycable.de>, 2006 (c) mycable GmbH
8  */
9 
10 /*
11  * Date & Time support for STMicroelectronics M41T62
12  */
13 
14 /* #define	DEBUG	*/
15 
16 #include <common.h>
17 #include <command.h>
18 #include <rtc.h>
19 #include <i2c.h>
20 
21 #if defined(CONFIG_CMD_DATE)
22 
23 #define M41T62_REG_SSEC	0
24 #define M41T62_REG_SEC	1
25 #define M41T62_REG_MIN	2
26 #define M41T62_REG_HOUR	3
27 #define M41T62_REG_WDAY	4
28 #define M41T62_REG_DAY	5
29 #define M41T62_REG_MON	6
30 #define M41T62_REG_YEAR	7
31 #define M41T62_REG_ALARM_MON	0xa
32 #define M41T62_REG_ALARM_DAY	0xb
33 #define M41T62_REG_ALARM_HOUR	0xc
34 #define M41T62_REG_ALARM_MIN	0xd
35 #define M41T62_REG_ALARM_SEC	0xe
36 #define M41T62_REG_FLAGS	0xf
37 
38 #define M41T62_DATETIME_REG_SIZE	(M41T62_REG_YEAR + 1)
39 #define M41T62_ALARM_REG_SIZE	\
40 	(M41T62_REG_ALARM_SEC + 1 - M41T62_REG_ALARM_MON)
41 
42 #define M41T62_SEC_ST		(1 << 7)	/* ST: Stop Bit */
43 #define M41T62_ALMON_AFE	(1 << 7)	/* AFE: AF Enable Bit */
44 #define M41T62_ALMON_SQWE	(1 << 6)	/* SQWE: SQW Enable Bit */
45 #define M41T62_ALHOUR_HT	(1 << 6)	/* HT: Halt Update Bit */
46 #define M41T62_FLAGS_AF		(1 << 6)	/* AF: Alarm Flag Bit */
47 #define M41T62_FLAGS_BATT_LOW	(1 << 4)	/* BL: Battery Low Bit */
48 
49 #define M41T62_FEATURE_HT	(1 << 0)
50 #define M41T62_FEATURE_BL	(1 << 1)
51 
52 #define M41T80_ALHOUR_HT	(1 << 6)	/* HT: Halt Update Bit */
53 
54 int rtc_get(struct rtc_time *tm)
55 {
56 	u8 buf[M41T62_DATETIME_REG_SIZE];
57 
58 	i2c_read(CONFIG_SYS_I2C_RTC_ADDR, 0, 1, buf, M41T62_DATETIME_REG_SIZE);
59 
60 	debug("%s: raw read data - sec=%02x, min=%02x, hr=%02x, "
61 	      "mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n",
62 	      __FUNCTION__,
63 	      buf[0], buf[1], buf[2], buf[3],
64 	      buf[4], buf[5], buf[6], buf[7]);
65 
66 	tm->tm_sec = bcd2bin(buf[M41T62_REG_SEC] & 0x7f);
67 	tm->tm_min = bcd2bin(buf[M41T62_REG_MIN] & 0x7f);
68 	tm->tm_hour = bcd2bin(buf[M41T62_REG_HOUR] & 0x3f);
69 	tm->tm_mday = bcd2bin(buf[M41T62_REG_DAY] & 0x3f);
70 	tm->tm_wday = buf[M41T62_REG_WDAY] & 0x07;
71 	tm->tm_mon = bcd2bin(buf[M41T62_REG_MON] & 0x1f);
72 
73 	/* assume 20YY not 19YY, and ignore the Century Bit */
74 	/* U-Boot needs to add 1900 here */
75 	tm->tm_year = bcd2bin(buf[M41T62_REG_YEAR]) + 100 + 1900;
76 
77 	debug("%s: tm is secs=%d, mins=%d, hours=%d, "
78 	      "mday=%d, mon=%d, year=%d, wday=%d\n",
79 	      __FUNCTION__,
80 	      tm->tm_sec, tm->tm_min, tm->tm_hour,
81 	      tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
82 
83 	return 0;
84 }
85 
86 int rtc_set(struct rtc_time *tm)
87 {
88 	u8 buf[M41T62_DATETIME_REG_SIZE];
89 
90 	debug("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
91 	      tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
92 	      tm->tm_hour, tm->tm_min, tm->tm_sec);
93 
94 	i2c_read(CONFIG_SYS_I2C_RTC_ADDR, 0, 1, buf, M41T62_DATETIME_REG_SIZE);
95 
96 	/* Merge time-data and register flags into buf[0..7] */
97 	buf[M41T62_REG_SSEC] = 0;
98 	buf[M41T62_REG_SEC] =
99 		bin2bcd(tm->tm_sec) | (buf[M41T62_REG_SEC] & ~0x7f);
100 	buf[M41T62_REG_MIN] =
101 		bin2bcd(tm->tm_min) | (buf[M41T62_REG_MIN] & ~0x7f);
102 	buf[M41T62_REG_HOUR] =
103 		bin2bcd(tm->tm_hour) | (buf[M41T62_REG_HOUR] & ~0x3f) ;
104 	buf[M41T62_REG_WDAY] =
105 		(tm->tm_wday & 0x07) | (buf[M41T62_REG_WDAY] & ~0x07);
106 	buf[M41T62_REG_DAY] =
107 		bin2bcd(tm->tm_mday) | (buf[M41T62_REG_DAY] & ~0x3f);
108 	buf[M41T62_REG_MON] =
109 		bin2bcd(tm->tm_mon) | (buf[M41T62_REG_MON] & ~0x1f);
110 	/* assume 20YY not 19YY */
111 	buf[M41T62_REG_YEAR] = bin2bcd(tm->tm_year % 100);
112 
113 	if (i2c_write(CONFIG_SYS_I2C_RTC_ADDR, 0, 1, buf, M41T62_DATETIME_REG_SIZE)) {
114 		printf("I2C write failed in %s()\n", __func__);
115 		return -1;
116 	}
117 
118 	return 0;
119 }
120 
121 void rtc_reset(void)
122 {
123 	u8 val;
124 
125 	/*
126 	 * M41T82: Make sure HT (Halt Update) bit is cleared.
127 	 * This bit is 0 in M41T62 so its save to clear it always.
128 	 */
129 	i2c_read(CONFIG_SYS_I2C_RTC_ADDR, M41T62_REG_ALARM_HOUR, 1, &val, 1);
130 	val &= ~M41T80_ALHOUR_HT;
131 	i2c_write(CONFIG_SYS_I2C_RTC_ADDR, M41T62_REG_ALARM_HOUR, 1, &val, 1);
132 }
133 
134 #endif
135