xref: /openbmc/u-boot/drivers/rtc/isl1208.c (revision 844fb498)
1 /*
2  * (C) Copyright 2008
3  * Tor Krill, Excito Elektronik i Skåne , tor@excito.com
4  *
5  * Modelled after the ds1337 driver
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 /*
11  * Date & Time support (no alarms) for Intersil
12  * ISL1208 Real Time Clock (RTC).
13  */
14 
15 #include <common.h>
16 #include <command.h>
17 #include <dm.h>
18 #include <rtc.h>
19 #include <i2c.h>
20 
21 /*---------------------------------------------------------------------*/
22 #ifdef DEBUG_RTC
23 #define DEBUGR(fmt,args...) printf(fmt ,##args)
24 #else
25 #define DEBUGR(fmt,args...)
26 #endif
27 /*---------------------------------------------------------------------*/
28 
29 /*
30  * RTC register addresses
31  */
32 
33 #define RTC_SEC_REG_ADDR	0x0
34 #define RTC_MIN_REG_ADDR	0x1
35 #define RTC_HR_REG_ADDR		0x2
36 #define RTC_DATE_REG_ADDR	0x3
37 #define RTC_MON_REG_ADDR	0x4
38 #define RTC_YR_REG_ADDR		0x5
39 #define RTC_DAY_REG_ADDR	0x6
40 #define RTC_STAT_REG_ADDR	0x7
41 /*
42  * RTC control register bits
43  */
44 
45 /*
46  * RTC status register bits
47  */
48 #define RTC_STAT_BIT_ARST	0x80	/* AUTO RESET ENABLE BIT */
49 #define RTC_STAT_BIT_XTOSCB	0x40	/* CRYSTAL OSCILLATOR ENABLE BIT */
50 #define RTC_STAT_BIT_WRTC	0x10	/* WRITE RTC ENABLE BIT */
51 #define RTC_STAT_BIT_ALM	0x04	/* ALARM BIT */
52 #define RTC_STAT_BIT_BAT	0x02	/* BATTERY BIT */
53 #define RTC_STAT_BIT_RTCF	0x01	/* REAL TIME CLOCK FAIL BIT */
54 
55 /*
56  * Get the current time from the RTC
57  */
58 
59 static int isl1208_rtc_get(struct udevice *dev, struct rtc_time *tmp)
60 {
61 	int ret;
62 	uchar buf[8], val;
63 
64 	ret = dm_i2c_read(dev, 0, buf, sizeof(buf));
65 	if (ret < 0)
66 		return ret;
67 
68 	if (buf[RTC_STAT_REG_ADDR] & RTC_STAT_BIT_RTCF) {
69 		printf ("### Warning: RTC oscillator has stopped\n");
70 		ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val));
71 		if (ret < 0)
72 			return ret;
73 
74 		val = val & ~(RTC_STAT_BIT_BAT | RTC_STAT_BIT_RTCF);
75 		ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val));
76 		if (ret < 0)
77 			return ret;
78 	}
79 
80 	tmp->tm_sec  = bcd2bin(buf[RTC_SEC_REG_ADDR] & 0x7F);
81 	tmp->tm_min  = bcd2bin(buf[RTC_MIN_REG_ADDR] & 0x7F);
82 	tmp->tm_hour = bcd2bin(buf[RTC_HR_REG_ADDR] & 0x3F);
83 	tmp->tm_mday = bcd2bin(buf[RTC_DATE_REG_ADDR] & 0x3F);
84 	tmp->tm_mon  = bcd2bin(buf[RTC_MON_REG_ADDR] & 0x1F);
85 	tmp->tm_year = bcd2bin(buf[RTC_YR_REG_ADDR]) + 2000;
86 	tmp->tm_wday = bcd2bin(buf[RTC_DAY_REG_ADDR] & 0x07);
87 	tmp->tm_yday = 0;
88 	tmp->tm_isdst= 0;
89 
90 	DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
91 		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
92 		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
93 
94 	return 0;
95 }
96 
97 /*
98  * Set the RTC
99  */
100 static int isl1208_rtc_set(struct udevice *dev, const struct rtc_time *tmp)
101 {
102 	int ret;
103 	uchar val, buf[7];
104 
105 	DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
106 		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
107 		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
108 
109 	if (tmp->tm_year < 2000 || tmp->tm_year > 2099)
110 		printf("WARNING: year should be between 2000 and 2099!\n");
111 
112 	/* enable write */
113 	ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val));
114 	if (ret < 0)
115 		return ret;
116 
117 	val = val | RTC_STAT_BIT_WRTC;
118 
119 	ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val));
120 	if (ret < 0)
121 		return ret;
122 
123 	buf[RTC_YR_REG_ADDR] = bin2bcd(tmp->tm_year % 100);
124 	buf[RTC_MON_REG_ADDR] = bin2bcd(tmp->tm_mon);
125 	buf[RTC_DAY_REG_ADDR] = bin2bcd(tmp->tm_wday);
126 	buf[RTC_DATE_REG_ADDR] = bin2bcd(tmp->tm_mday);
127 	buf[RTC_HR_REG_ADDR] = bin2bcd(tmp->tm_hour) | 0x80; /* 24h clock */
128 	buf[RTC_MIN_REG_ADDR] = bin2bcd(tmp->tm_min);
129 	buf[RTC_SEC_REG_ADDR] = bin2bcd(tmp->tm_sec);
130 
131 	ret = dm_i2c_write(dev, 0, buf, sizeof(buf));
132 	if (ret < 0)
133 		return ret;
134 
135 	/* disable write */
136 	ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val));
137 	if (ret < 0)
138 		return ret;
139 
140 	val = val & ~RTC_STAT_BIT_WRTC;
141 	ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val));
142 	if (ret < 0)
143 		return ret;
144 
145 	return 0;
146 }
147 
148 static int isl1208_rtc_reset(struct udevice *dev)
149 {
150 	return 0;
151 }
152 
153 static int isl1208_probe(struct udevice *dev)
154 {
155 	i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS |
156 			   DM_I2C_CHIP_WR_ADDRESS);
157 
158 	return 0;
159 }
160 
161 static const struct rtc_ops isl1208_rtc_ops = {
162 	.get = isl1208_rtc_get,
163 	.set = isl1208_rtc_set,
164 	.reset = isl1208_rtc_reset,
165 };
166 
167 static const struct udevice_id isl1208_rtc_ids[] = {
168 	{ .compatible = "isil,isl1208" },
169 	{ }
170 };
171 
172 U_BOOT_DRIVER(rtc_isl1208) = {
173 	.name	= "rtc-isl1208",
174 	.id	= UCLASS_RTC,
175 	.probe	= isl1208_probe,
176 	.of_match = isl1208_rtc_ids,
177 	.ops	= &isl1208_rtc_ops,
178 };
179