1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * (C) Copyright 2008 4 * Tor Krill, Excito Elektronik i Skåne , tor@excito.com 5 * 6 * Modelled after the ds1337 driver 7 */ 8 9 /* 10 * Date & Time support (no alarms) for Intersil 11 * ISL1208 Real Time Clock (RTC). 12 */ 13 14 #include <common.h> 15 #include <command.h> 16 #include <dm.h> 17 #include <rtc.h> 18 #include <i2c.h> 19 20 /*---------------------------------------------------------------------*/ 21 #ifdef DEBUG_RTC 22 #define DEBUGR(fmt,args...) printf(fmt ,##args) 23 #else 24 #define DEBUGR(fmt,args...) 25 #endif 26 /*---------------------------------------------------------------------*/ 27 28 /* 29 * RTC register addresses 30 */ 31 32 #define RTC_SEC_REG_ADDR 0x0 33 #define RTC_MIN_REG_ADDR 0x1 34 #define RTC_HR_REG_ADDR 0x2 35 #define RTC_DATE_REG_ADDR 0x3 36 #define RTC_MON_REG_ADDR 0x4 37 #define RTC_YR_REG_ADDR 0x5 38 #define RTC_DAY_REG_ADDR 0x6 39 #define RTC_STAT_REG_ADDR 0x7 40 /* 41 * RTC control register bits 42 */ 43 44 /* 45 * RTC status register bits 46 */ 47 #define RTC_STAT_BIT_ARST 0x80 /* AUTO RESET ENABLE BIT */ 48 #define RTC_STAT_BIT_XTOSCB 0x40 /* CRYSTAL OSCILLATOR ENABLE BIT */ 49 #define RTC_STAT_BIT_WRTC 0x10 /* WRITE RTC ENABLE BIT */ 50 #define RTC_STAT_BIT_ALM 0x04 /* ALARM BIT */ 51 #define RTC_STAT_BIT_BAT 0x02 /* BATTERY BIT */ 52 #define RTC_STAT_BIT_RTCF 0x01 /* REAL TIME CLOCK FAIL BIT */ 53 54 /* 55 * Read an RTC register 56 */ 57 58 static int isl1208_rtc_read8(struct udevice *dev, unsigned int reg) 59 { 60 return dm_i2c_reg_read(dev, reg); 61 } 62 63 /* 64 * Write an RTC register 65 */ 66 67 static int isl1208_rtc_write8(struct udevice *dev, unsigned int reg, int val) 68 { 69 return dm_i2c_reg_write(dev, reg, val); 70 } 71 72 /* 73 * Get the current time from the RTC 74 */ 75 76 static int isl1208_rtc_get(struct udevice *dev, struct rtc_time *tmp) 77 { 78 int ret; 79 uchar buf[8], val; 80 81 ret = dm_i2c_read(dev, 0, buf, sizeof(buf)); 82 if (ret < 0) 83 return ret; 84 85 if (buf[RTC_STAT_REG_ADDR] & RTC_STAT_BIT_RTCF) { 86 printf ("### Warning: RTC oscillator has stopped\n"); 87 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); 88 if (ret < 0) 89 return ret; 90 91 val = val & ~(RTC_STAT_BIT_BAT | RTC_STAT_BIT_RTCF); 92 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); 93 if (ret < 0) 94 return ret; 95 } 96 97 tmp->tm_sec = bcd2bin(buf[RTC_SEC_REG_ADDR] & 0x7F); 98 tmp->tm_min = bcd2bin(buf[RTC_MIN_REG_ADDR] & 0x7F); 99 tmp->tm_hour = bcd2bin(buf[RTC_HR_REG_ADDR] & 0x3F); 100 tmp->tm_mday = bcd2bin(buf[RTC_DATE_REG_ADDR] & 0x3F); 101 tmp->tm_mon = bcd2bin(buf[RTC_MON_REG_ADDR] & 0x1F); 102 tmp->tm_year = bcd2bin(buf[RTC_YR_REG_ADDR]) + 2000; 103 tmp->tm_wday = bcd2bin(buf[RTC_DAY_REG_ADDR] & 0x07); 104 tmp->tm_yday = 0; 105 tmp->tm_isdst= 0; 106 107 DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", 108 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, 109 tmp->tm_hour, tmp->tm_min, tmp->tm_sec); 110 111 return 0; 112 } 113 114 /* 115 * Set the RTC 116 */ 117 static int isl1208_rtc_set(struct udevice *dev, const struct rtc_time *tmp) 118 { 119 int ret; 120 uchar val, buf[7]; 121 122 DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", 123 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, 124 tmp->tm_hour, tmp->tm_min, tmp->tm_sec); 125 126 if (tmp->tm_year < 2000 || tmp->tm_year > 2099) 127 printf("WARNING: year should be between 2000 and 2099!\n"); 128 129 /* enable write */ 130 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); 131 if (ret < 0) 132 return ret; 133 134 val = val | RTC_STAT_BIT_WRTC; 135 136 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); 137 if (ret < 0) 138 return ret; 139 140 buf[RTC_YR_REG_ADDR] = bin2bcd(tmp->tm_year % 100); 141 buf[RTC_MON_REG_ADDR] = bin2bcd(tmp->tm_mon); 142 buf[RTC_DAY_REG_ADDR] = bin2bcd(tmp->tm_wday); 143 buf[RTC_DATE_REG_ADDR] = bin2bcd(tmp->tm_mday); 144 buf[RTC_HR_REG_ADDR] = bin2bcd(tmp->tm_hour) | 0x80; /* 24h clock */ 145 buf[RTC_MIN_REG_ADDR] = bin2bcd(tmp->tm_min); 146 buf[RTC_SEC_REG_ADDR] = bin2bcd(tmp->tm_sec); 147 148 ret = dm_i2c_write(dev, 0, buf, sizeof(buf)); 149 if (ret < 0) 150 return ret; 151 152 /* disable write */ 153 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); 154 if (ret < 0) 155 return ret; 156 157 val = val & ~RTC_STAT_BIT_WRTC; 158 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); 159 if (ret < 0) 160 return ret; 161 162 return 0; 163 } 164 165 static int isl1208_rtc_reset(struct udevice *dev) 166 { 167 return 0; 168 } 169 170 static int isl1208_probe(struct udevice *dev) 171 { 172 i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS | 173 DM_I2C_CHIP_WR_ADDRESS); 174 175 return 0; 176 } 177 178 static const struct rtc_ops isl1208_rtc_ops = { 179 .get = isl1208_rtc_get, 180 .set = isl1208_rtc_set, 181 .reset = isl1208_rtc_reset, 182 .read8 = isl1208_rtc_read8, 183 .write8 = isl1208_rtc_write8, 184 }; 185 186 static const struct udevice_id isl1208_rtc_ids[] = { 187 { .compatible = "isil,isl1208" }, 188 { } 189 }; 190 191 U_BOOT_DRIVER(rtc_isl1208) = { 192 .name = "rtc-isl1208", 193 .id = UCLASS_RTC, 194 .probe = isl1208_probe, 195 .of_match = isl1208_rtc_ids, 196 .ops = &isl1208_rtc_ops, 197 }; 198