xref: /openbmc/u-boot/drivers/rtc/isl1208.c (revision 12308b12)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2008
4  * Tor Krill, Excito Elektronik i Skåne , tor@excito.com
5  *
6  * Modelled after the ds1337 driver
7  */
8 
9 /*
10  * Date & Time support (no alarms) for Intersil
11  * ISL1208 Real Time Clock (RTC).
12  */
13 
14 #include <common.h>
15 #include <command.h>
16 #include <dm.h>
17 #include <rtc.h>
18 #include <i2c.h>
19 
20 /*---------------------------------------------------------------------*/
21 #ifdef DEBUG_RTC
22 #define DEBUGR(fmt,args...) printf(fmt ,##args)
23 #else
24 #define DEBUGR(fmt,args...)
25 #endif
26 /*---------------------------------------------------------------------*/
27 
28 /*
29  * RTC register addresses
30  */
31 
32 #define RTC_SEC_REG_ADDR	0x0
33 #define RTC_MIN_REG_ADDR	0x1
34 #define RTC_HR_REG_ADDR		0x2
35 #define RTC_DATE_REG_ADDR	0x3
36 #define RTC_MON_REG_ADDR	0x4
37 #define RTC_YR_REG_ADDR		0x5
38 #define RTC_DAY_REG_ADDR	0x6
39 #define RTC_STAT_REG_ADDR	0x7
40 /*
41  * RTC control register bits
42  */
43 
44 /*
45  * RTC status register bits
46  */
47 #define RTC_STAT_BIT_ARST	0x80	/* AUTO RESET ENABLE BIT */
48 #define RTC_STAT_BIT_XTOSCB	0x40	/* CRYSTAL OSCILLATOR ENABLE BIT */
49 #define RTC_STAT_BIT_WRTC	0x10	/* WRITE RTC ENABLE BIT */
50 #define RTC_STAT_BIT_ALM	0x04	/* ALARM BIT */
51 #define RTC_STAT_BIT_BAT	0x02	/* BATTERY BIT */
52 #define RTC_STAT_BIT_RTCF	0x01	/* REAL TIME CLOCK FAIL BIT */
53 
54 /*
55  * Get the current time from the RTC
56  */
57 
58 static int isl1208_rtc_get(struct udevice *dev, struct rtc_time *tmp)
59 {
60 	int ret;
61 	uchar buf[8], val;
62 
63 	ret = dm_i2c_read(dev, 0, buf, sizeof(buf));
64 	if (ret < 0)
65 		return ret;
66 
67 	if (buf[RTC_STAT_REG_ADDR] & RTC_STAT_BIT_RTCF) {
68 		printf ("### Warning: RTC oscillator has stopped\n");
69 		ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val));
70 		if (ret < 0)
71 			return ret;
72 
73 		val = val & ~(RTC_STAT_BIT_BAT | RTC_STAT_BIT_RTCF);
74 		ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val));
75 		if (ret < 0)
76 			return ret;
77 	}
78 
79 	tmp->tm_sec  = bcd2bin(buf[RTC_SEC_REG_ADDR] & 0x7F);
80 	tmp->tm_min  = bcd2bin(buf[RTC_MIN_REG_ADDR] & 0x7F);
81 	tmp->tm_hour = bcd2bin(buf[RTC_HR_REG_ADDR] & 0x3F);
82 	tmp->tm_mday = bcd2bin(buf[RTC_DATE_REG_ADDR] & 0x3F);
83 	tmp->tm_mon  = bcd2bin(buf[RTC_MON_REG_ADDR] & 0x1F);
84 	tmp->tm_year = bcd2bin(buf[RTC_YR_REG_ADDR]) + 2000;
85 	tmp->tm_wday = bcd2bin(buf[RTC_DAY_REG_ADDR] & 0x07);
86 	tmp->tm_yday = 0;
87 	tmp->tm_isdst= 0;
88 
89 	DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
90 		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
91 		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
92 
93 	return 0;
94 }
95 
96 /*
97  * Set the RTC
98  */
99 static int isl1208_rtc_set(struct udevice *dev, const struct rtc_time *tmp)
100 {
101 	int ret;
102 	uchar val, buf[7];
103 
104 	DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
105 		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
106 		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
107 
108 	if (tmp->tm_year < 2000 || tmp->tm_year > 2099)
109 		printf("WARNING: year should be between 2000 and 2099!\n");
110 
111 	/* enable write */
112 	ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val));
113 	if (ret < 0)
114 		return ret;
115 
116 	val = val | RTC_STAT_BIT_WRTC;
117 
118 	ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val));
119 	if (ret < 0)
120 		return ret;
121 
122 	buf[RTC_YR_REG_ADDR] = bin2bcd(tmp->tm_year % 100);
123 	buf[RTC_MON_REG_ADDR] = bin2bcd(tmp->tm_mon);
124 	buf[RTC_DAY_REG_ADDR] = bin2bcd(tmp->tm_wday);
125 	buf[RTC_DATE_REG_ADDR] = bin2bcd(tmp->tm_mday);
126 	buf[RTC_HR_REG_ADDR] = bin2bcd(tmp->tm_hour) | 0x80; /* 24h clock */
127 	buf[RTC_MIN_REG_ADDR] = bin2bcd(tmp->tm_min);
128 	buf[RTC_SEC_REG_ADDR] = bin2bcd(tmp->tm_sec);
129 
130 	ret = dm_i2c_write(dev, 0, buf, sizeof(buf));
131 	if (ret < 0)
132 		return ret;
133 
134 	/* disable write */
135 	ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val));
136 	if (ret < 0)
137 		return ret;
138 
139 	val = val & ~RTC_STAT_BIT_WRTC;
140 	ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val));
141 	if (ret < 0)
142 		return ret;
143 
144 	return 0;
145 }
146 
147 static int isl1208_rtc_reset(struct udevice *dev)
148 {
149 	return 0;
150 }
151 
152 static int isl1208_probe(struct udevice *dev)
153 {
154 	i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS |
155 			   DM_I2C_CHIP_WR_ADDRESS);
156 
157 	return 0;
158 }
159 
160 static const struct rtc_ops isl1208_rtc_ops = {
161 	.get = isl1208_rtc_get,
162 	.set = isl1208_rtc_set,
163 	.reset = isl1208_rtc_reset,
164 };
165 
166 static const struct udevice_id isl1208_rtc_ids[] = {
167 	{ .compatible = "isil,isl1208" },
168 	{ }
169 };
170 
171 U_BOOT_DRIVER(rtc_isl1208) = {
172 	.name	= "rtc-isl1208",
173 	.id	= UCLASS_RTC,
174 	.probe	= isl1208_probe,
175 	.of_match = isl1208_rtc_ids,
176 	.ops	= &isl1208_rtc_ops,
177 };
178