xref: /openbmc/u-boot/drivers/rtc/ds3231.c (revision 843a7ee8)
1 /*
2  * (C) Copyright 2006
3  * Markus Klotzbuecher, mk@denx.de
4  *
5  * See file CREDITS for list of people who contributed to this
6  * project.
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License as
10  * published by the Free Software Foundation; either version 2 of
11  * the License, or (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21  * MA 02111-1307 USA
22  */
23 
24 /*
25  * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
26  * Extremly Accurate DS3231 Real Time Clock (RTC).
27  *
28  * copied from ds1337.c
29  */
30 
31 #include <common.h>
32 #include <command.h>
33 #include <rtc.h>
34 #include <i2c.h>
35 
36 #if defined(CONFIG_CMD_DATE)
37 
38 /*
39  * RTC register addresses
40  */
41 #define RTC_SEC_REG_ADDR	0x0
42 #define RTC_MIN_REG_ADDR	0x1
43 #define RTC_HR_REG_ADDR		0x2
44 #define RTC_DAY_REG_ADDR	0x3
45 #define RTC_DATE_REG_ADDR	0x4
46 #define RTC_MON_REG_ADDR	0x5
47 #define RTC_YR_REG_ADDR		0x6
48 #define RTC_CTL_REG_ADDR	0x0e
49 #define RTC_STAT_REG_ADDR	0x0f
50 
51 
52 /*
53  * RTC control register bits
54  */
55 #define RTC_CTL_BIT_A1IE	0x1	/* Alarm 1 interrupt enable     */
56 #define RTC_CTL_BIT_A2IE	0x2	/* Alarm 2 interrupt enable     */
57 #define RTC_CTL_BIT_INTCN	0x4	/* Interrupt control            */
58 #define RTC_CTL_BIT_RS1		0x8	/* Rate select 1                */
59 #define RTC_CTL_BIT_RS2		0x10	/* Rate select 2                */
60 #define RTC_CTL_BIT_DOSC	0x80	/* Disable Oscillator           */
61 
62 /*
63  * RTC status register bits
64  */
65 #define RTC_STAT_BIT_A1F	0x1	/* Alarm 1 flag                 */
66 #define RTC_STAT_BIT_A2F	0x2	/* Alarm 2 flag                 */
67 #define RTC_STAT_BIT_OSF	0x80	/* Oscillator stop flag         */
68 
69 
70 static uchar rtc_read (uchar reg);
71 static void rtc_write (uchar reg, uchar val);
72 
73 
74 /*
75  * Get the current time from the RTC
76  */
77 int rtc_get (struct rtc_time *tmp)
78 {
79 	int rel = 0;
80 	uchar sec, min, hour, mday, wday, mon_cent, year, control, status;
81 
82 	control = rtc_read (RTC_CTL_REG_ADDR);
83 	status = rtc_read (RTC_STAT_REG_ADDR);
84 	sec = rtc_read (RTC_SEC_REG_ADDR);
85 	min = rtc_read (RTC_MIN_REG_ADDR);
86 	hour = rtc_read (RTC_HR_REG_ADDR);
87 	wday = rtc_read (RTC_DAY_REG_ADDR);
88 	mday = rtc_read (RTC_DATE_REG_ADDR);
89 	mon_cent = rtc_read (RTC_MON_REG_ADDR);
90 	year = rtc_read (RTC_YR_REG_ADDR);
91 
92 	debug("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
93 		"hr: %02x min: %02x sec: %02x control: %02x status: %02x\n",
94 		year, mon_cent, mday, wday, hour, min, sec, control, status);
95 
96 	if (status & RTC_STAT_BIT_OSF) {
97 		printf ("### Warning: RTC oscillator has stopped\n");
98 		/* clear the OSF flag */
99 		rtc_write (RTC_STAT_REG_ADDR,
100 			   rtc_read (RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_OSF);
101 		rel = -1;
102 	}
103 
104 	tmp->tm_sec  = bcd2bin (sec & 0x7F);
105 	tmp->tm_min  = bcd2bin (min & 0x7F);
106 	tmp->tm_hour = bcd2bin (hour & 0x3F);
107 	tmp->tm_mday = bcd2bin (mday & 0x3F);
108 	tmp->tm_mon  = bcd2bin (mon_cent & 0x1F);
109 	tmp->tm_year = bcd2bin (year) + ((mon_cent & 0x80) ? 2000 : 1900);
110 	tmp->tm_wday = bcd2bin ((wday - 1) & 0x07);
111 	tmp->tm_yday = 0;
112 	tmp->tm_isdst= 0;
113 
114 	debug("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
115 		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
116 		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
117 
118 	return rel;
119 }
120 
121 
122 /*
123  * Set the RTC
124  */
125 int rtc_set (struct rtc_time *tmp)
126 {
127 	uchar century;
128 
129 	debug("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
130 		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
131 		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
132 
133 	rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100));
134 
135 	century = (tmp->tm_year >= 2000) ? 0x80 : 0;
136 	rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon) | century);
137 
138 	rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1));
139 	rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday));
140 	rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour));
141 	rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min));
142 	rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec));
143 
144 	return 0;
145 }
146 
147 
148 /*
149  * Reset the RTC.  We also enable the oscillator output on the
150  * SQW/INTB* pin and program it for 32,768 Hz output. Note that
151  * according to the datasheet, turning on the square wave output
152  * increases the current drain on the backup battery from about
153  * 600 nA to 2uA.
154  */
155 void rtc_reset (void)
156 {
157 	rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2);
158 }
159 
160 
161 /*
162  * Helper functions
163  */
164 
165 static
166 uchar rtc_read (uchar reg)
167 {
168 	return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg));
169 }
170 
171 
172 static void rtc_write (uchar reg, uchar val)
173 {
174 	i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
175 }
176 
177 #endif
178