xref: /openbmc/u-boot/drivers/rtc/ds1337.c (revision 8ee59472)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2001-2008
4  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5  * Keith Outwater, keith_outwater@mvis.com`
6  */
7 
8 /*
9  * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
10  * DS1337 Real Time Clock (RTC).
11  */
12 
13 #include <common.h>
14 #include <command.h>
15 #include <rtc.h>
16 #include <i2c.h>
17 
18 #if defined(CONFIG_CMD_DATE)
19 
20 /*
21  * RTC register addresses
22  */
23 #if defined CONFIG_RTC_DS1337
24 #define RTC_SEC_REG_ADDR	0x0
25 #define RTC_MIN_REG_ADDR	0x1
26 #define RTC_HR_REG_ADDR		0x2
27 #define RTC_DAY_REG_ADDR	0x3
28 #define RTC_DATE_REG_ADDR	0x4
29 #define RTC_MON_REG_ADDR	0x5
30 #define RTC_YR_REG_ADDR		0x6
31 #define RTC_CTL_REG_ADDR	0x0e
32 #define RTC_STAT_REG_ADDR	0x0f
33 #define RTC_TC_REG_ADDR		0x10
34 #elif defined CONFIG_RTC_DS1388
35 #define RTC_SEC_REG_ADDR	0x1
36 #define RTC_MIN_REG_ADDR	0x2
37 #define RTC_HR_REG_ADDR		0x3
38 #define RTC_DAY_REG_ADDR	0x4
39 #define RTC_DATE_REG_ADDR	0x5
40 #define RTC_MON_REG_ADDR	0x6
41 #define RTC_YR_REG_ADDR		0x7
42 #define RTC_CTL_REG_ADDR	0x0c
43 #define RTC_STAT_REG_ADDR	0x0b
44 #define RTC_TC_REG_ADDR		0x0a
45 #endif
46 
47 /*
48  * RTC control register bits
49  */
50 #define RTC_CTL_BIT_A1IE	0x1	/* Alarm 1 interrupt enable	*/
51 #define RTC_CTL_BIT_A2IE	0x2	/* Alarm 2 interrupt enable	*/
52 #define RTC_CTL_BIT_INTCN	0x4	/* Interrupt control		*/
53 #define RTC_CTL_BIT_RS1		0x8	/* Rate select 1		*/
54 #define RTC_CTL_BIT_RS2		0x10	/* Rate select 2		*/
55 #define RTC_CTL_BIT_DOSC	0x80	/* Disable Oscillator		*/
56 
57 /*
58  * RTC status register bits
59  */
60 #define RTC_STAT_BIT_A1F	0x1	/* Alarm 1 flag			*/
61 #define RTC_STAT_BIT_A2F	0x2	/* Alarm 2 flag			*/
62 #define RTC_STAT_BIT_OSF	0x80	/* Oscillator stop flag		*/
63 
64 
65 static uchar rtc_read (uchar reg);
66 static void rtc_write (uchar reg, uchar val);
67 
68 /*
69  * Get the current time from the RTC
70  */
71 int rtc_get (struct rtc_time *tmp)
72 {
73 	int rel = 0;
74 	uchar sec, min, hour, mday, wday, mon_cent, year, control, status;
75 
76 	control = rtc_read (RTC_CTL_REG_ADDR);
77 	status = rtc_read (RTC_STAT_REG_ADDR);
78 	sec = rtc_read (RTC_SEC_REG_ADDR);
79 	min = rtc_read (RTC_MIN_REG_ADDR);
80 	hour = rtc_read (RTC_HR_REG_ADDR);
81 	wday = rtc_read (RTC_DAY_REG_ADDR);
82 	mday = rtc_read (RTC_DATE_REG_ADDR);
83 	mon_cent = rtc_read (RTC_MON_REG_ADDR);
84 	year = rtc_read (RTC_YR_REG_ADDR);
85 
86 	/* No century bit, assume year 2000 */
87 #ifdef CONFIG_RTC_DS1388
88 	mon_cent |= 0x80;
89 #endif
90 
91 	debug("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
92 		"hr: %02x min: %02x sec: %02x control: %02x status: %02x\n",
93 		year, mon_cent, mday, wday, hour, min, sec, control, status);
94 
95 	if (status & RTC_STAT_BIT_OSF) {
96 		printf ("### Warning: RTC oscillator has stopped\n");
97 		/* clear the OSF flag */
98 		rtc_write (RTC_STAT_REG_ADDR,
99 			   rtc_read (RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_OSF);
100 		rel = -1;
101 	}
102 
103 	tmp->tm_sec  = bcd2bin (sec & 0x7F);
104 	tmp->tm_min  = bcd2bin (min & 0x7F);
105 	tmp->tm_hour = bcd2bin (hour & 0x3F);
106 	tmp->tm_mday = bcd2bin (mday & 0x3F);
107 	tmp->tm_mon  = bcd2bin (mon_cent & 0x1F);
108 	tmp->tm_year = bcd2bin (year) + ((mon_cent & 0x80) ? 2000 : 1900);
109 	tmp->tm_wday = bcd2bin ((wday - 1) & 0x07);
110 	tmp->tm_yday = 0;
111 	tmp->tm_isdst= 0;
112 
113 	debug("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
114 		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
115 		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
116 
117 	return rel;
118 }
119 
120 
121 /*
122  * Set the RTC
123  */
124 int rtc_set (struct rtc_time *tmp)
125 {
126 	uchar century;
127 
128 	debug("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
129 		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
130 		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
131 
132 	rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100));
133 
134 	century = (tmp->tm_year >= 2000) ? 0x80 : 0;
135 	rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon) | century);
136 
137 	rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1));
138 	rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday));
139 	rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour));
140 	rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min));
141 	rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec));
142 
143 	return 0;
144 }
145 
146 
147 /*
148  * Reset the RTC.  We also enable the oscillator output on the
149  * SQW/INTB* pin and program it for 32,768 Hz output. Note that
150  * according to the datasheet, turning on the square wave output
151  * increases the current drain on the backup battery from about
152  * 600 nA to 2uA. Define CONFIG_RTC_DS1337_NOOSC if you wish to turn
153  * off the OSC output.
154  */
155 
156 #ifdef CONFIG_RTC_DS1337_NOOSC
157  #define RTC_DS1337_RESET_VAL \
158 	(RTC_CTL_BIT_INTCN | RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2)
159 #else
160  #define RTC_DS1337_RESET_VAL (RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2)
161 #endif
162 void rtc_reset (void)
163 {
164 #ifdef CONFIG_RTC_DS1337
165 	rtc_write (RTC_CTL_REG_ADDR, RTC_DS1337_RESET_VAL);
166 #elif defined CONFIG_RTC_DS1388
167 	rtc_write(RTC_CTL_REG_ADDR, 0x0); /* hw default */
168 #endif
169 #ifdef CONFIG_RTC_DS1339_TCR_VAL
170 	rtc_write (RTC_TC_REG_ADDR, CONFIG_RTC_DS1339_TCR_VAL);
171 #endif
172 #ifdef CONFIG_RTC_DS1388_TCR_VAL
173 	rtc_write(RTC_TC_REG_ADDR, CONFIG_RTC_DS1388_TCR_VAL);
174 #endif
175 }
176 
177 
178 /*
179  * Helper functions
180  */
181 
182 static
183 uchar rtc_read (uchar reg)
184 {
185 	return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg));
186 }
187 
188 
189 static void rtc_write (uchar reg, uchar val)
190 {
191 	i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
192 }
193 
194 #endif
195