xref: /openbmc/u-boot/drivers/rtc/ds1337.c (revision 1ac559d4)
1 /*
2  * (C) Copyright 2001, 2002
3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4  * Keith Outwater, keith_outwater@mvis.com`
5  *
6  * See file CREDITS for list of people who contributed to this
7  * project.
8  *
9  * This program is free software; you can redistribute it and/or
10  * modify it under the terms of the GNU General Public License as
11  * published by the Free Software Foundation; either version 2 of
12  * the License, or (at your option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  * GNU General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22  * MA 02111-1307 USA
23  */
24 
25 /*
26  * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
27  * DS1337 Real Time Clock (RTC).
28  */
29 
30 #include <common.h>
31 #include <command.h>
32 #include <rtc.h>
33 #include <i2c.h>
34 
35 #if defined(CONFIG_RTC_DS1337) && defined(CONFIG_CMD_DATE)
36 
37 /*---------------------------------------------------------------------*/
38 #undef DEBUG_RTC
39 
40 #ifdef DEBUG_RTC
41 #define DEBUGR(fmt,args...) printf(fmt ,##args)
42 #else
43 #define DEBUGR(fmt,args...)
44 #endif
45 /*---------------------------------------------------------------------*/
46 
47 /*
48  * RTC register addresses
49  */
50 #define RTC_SEC_REG_ADDR	0x0
51 #define RTC_MIN_REG_ADDR	0x1
52 #define RTC_HR_REG_ADDR		0x2
53 #define RTC_DAY_REG_ADDR	0x3
54 #define RTC_DATE_REG_ADDR	0x4
55 #define RTC_MON_REG_ADDR	0x5
56 #define RTC_YR_REG_ADDR		0x6
57 #define RTC_CTL_REG_ADDR	0x0e
58 #define RTC_STAT_REG_ADDR	0x0f
59 
60 /*
61  * RTC control register bits
62  */
63 #define RTC_CTL_BIT_A1IE	0x1	/* Alarm 1 interrupt enable     */
64 #define RTC_CTL_BIT_A2IE	0x2	/* Alarm 2 interrupt enable     */
65 #define RTC_CTL_BIT_INTCN	0x4	/* Interrupt control            */
66 #define RTC_CTL_BIT_RS1		0x8	/* Rate select 1                */
67 #define RTC_CTL_BIT_RS2		0x10	/* Rate select 2                */
68 #define RTC_CTL_BIT_DOSC	0x80	/* Disable Oscillator           */
69 
70 /*
71  * RTC status register bits
72  */
73 #define RTC_STAT_BIT_A1F	0x1	/* Alarm 1 flag                 */
74 #define RTC_STAT_BIT_A2F	0x2	/* Alarm 2 flag                 */
75 #define RTC_STAT_BIT_OSF	0x80	/* Oscillator stop flag         */
76 
77 
78 static uchar rtc_read (uchar reg);
79 static void rtc_write (uchar reg, uchar val);
80 static uchar bin2bcd (unsigned int n);
81 static unsigned bcd2bin (uchar c);
82 
83 
84 /*
85  * Get the current time from the RTC
86  */
87 void rtc_get (struct rtc_time *tmp)
88 {
89 	uchar sec, min, hour, mday, wday, mon_cent, year, control, status;
90 
91 	control = rtc_read (RTC_CTL_REG_ADDR);
92 	status = rtc_read (RTC_STAT_REG_ADDR);
93 	sec = rtc_read (RTC_SEC_REG_ADDR);
94 	min = rtc_read (RTC_MIN_REG_ADDR);
95 	hour = rtc_read (RTC_HR_REG_ADDR);
96 	wday = rtc_read (RTC_DAY_REG_ADDR);
97 	mday = rtc_read (RTC_DATE_REG_ADDR);
98 	mon_cent = rtc_read (RTC_MON_REG_ADDR);
99 	year = rtc_read (RTC_YR_REG_ADDR);
100 
101 	DEBUGR ("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
102 		"hr: %02x min: %02x sec: %02x control: %02x status: %02x\n",
103 		year, mon_cent, mday, wday, hour, min, sec, control, status);
104 
105 	if (status & RTC_STAT_BIT_OSF) {
106 		printf ("### Warning: RTC oscillator has stopped\n");
107 		/* clear the OSF flag */
108 		rtc_write (RTC_STAT_REG_ADDR,
109 			   rtc_read (RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_OSF);
110 	}
111 
112 	tmp->tm_sec  = bcd2bin (sec & 0x7F);
113 	tmp->tm_min  = bcd2bin (min & 0x7F);
114 	tmp->tm_hour = bcd2bin (hour & 0x3F);
115 	tmp->tm_mday = bcd2bin (mday & 0x3F);
116 	tmp->tm_mon  = bcd2bin (mon_cent & 0x1F);
117 	tmp->tm_year = bcd2bin (year) + ((mon_cent & 0x80) ? 2000 : 1900);
118 	tmp->tm_wday = bcd2bin ((wday - 1) & 0x07);
119 	tmp->tm_yday = 0;
120 	tmp->tm_isdst= 0;
121 
122 	DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
123 		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
124 		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
125 }
126 
127 
128 /*
129  * Set the RTC
130  */
131 void rtc_set (struct rtc_time *tmp)
132 {
133 	uchar century;
134 
135 	DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
136 		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
137 		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
138 
139 	rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100));
140 
141 	century = (tmp->tm_year >= 2000) ? 0x80 : 0;
142 	rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon) | century);
143 
144 	rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1));
145 	rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday));
146 	rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour));
147 	rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min));
148 	rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec));
149 }
150 
151 
152 /*
153  * Reset the RTC.  We also enable the oscillator output on the
154  * SQW/INTB* pin and program it for 32,768 Hz output. Note that
155  * according to the datasheet, turning on the square wave output
156  * increases the current drain on the backup battery from about
157  * 600 nA to 2uA.
158  */
159 void rtc_reset (void)
160 {
161 	rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2);
162 }
163 
164 
165 /*
166  * Helper functions
167  */
168 
169 static
170 uchar rtc_read (uchar reg)
171 {
172 	return (i2c_reg_read (CFG_I2C_RTC_ADDR, reg));
173 }
174 
175 
176 static void rtc_write (uchar reg, uchar val)
177 {
178 	i2c_reg_write (CFG_I2C_RTC_ADDR, reg, val);
179 }
180 
181 static unsigned bcd2bin (uchar n)
182 {
183 	return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
184 }
185 
186 static unsigned char bin2bcd (unsigned int n)
187 {
188 	return (((n / 10) << 4) | (n % 10));
189 }
190 
191 #endif
192