1 /* 2 * (C) Copyright 2002 SIXNET, dge@sixnetio.com. 3 * 4 * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net> 5 * Stephan Linz <linz@li-pro.net> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 /* 11 * Date & Time support for DS1306 RTC using SPI: 12 * 13 * - SXNI855T: it uses its own soft SPI here in this file 14 * - all other: use the external spi_xfer() function 15 * (see include/spi.h) 16 */ 17 18 #include <common.h> 19 #include <command.h> 20 #include <rtc.h> 21 #include <spi.h> 22 23 #if defined(CONFIG_CMD_DATE) 24 25 #define RTC_SECONDS 0x00 26 #define RTC_MINUTES 0x01 27 #define RTC_HOURS 0x02 28 #define RTC_DAY_OF_WEEK 0x03 29 #define RTC_DATE_OF_MONTH 0x04 30 #define RTC_MONTH 0x05 31 #define RTC_YEAR 0x06 32 33 #define RTC_SECONDS_ALARM0 0x07 34 #define RTC_MINUTES_ALARM0 0x08 35 #define RTC_HOURS_ALARM0 0x09 36 #define RTC_DAY_OF_WEEK_ALARM0 0x0a 37 38 #define RTC_SECONDS_ALARM1 0x0b 39 #define RTC_MINUTES_ALARM1 0x0c 40 #define RTC_HOURS_ALARM1 0x0d 41 #define RTC_DAY_OF_WEEK_ALARM1 0x0e 42 43 #define RTC_CONTROL 0x0f 44 #define RTC_STATUS 0x10 45 #define RTC_TRICKLE_CHARGER 0x11 46 47 #define RTC_USER_RAM_BASE 0x20 48 49 /* ************************************************************************* */ 50 #ifdef CONFIG_SXNI855T /* !!! SHOULD BE CHANGED TO NEW CODE !!! */ 51 52 static void soft_spi_send (unsigned char n); 53 static unsigned char soft_spi_read (void); 54 static void init_spi (void); 55 56 /*----------------------------------------------------------------------- 57 * Definitions 58 */ 59 60 #define PB_SPISCK 0x00000002 /* PB 30 */ 61 #define PB_SPIMOSI 0x00000004 /* PB 29 */ 62 #define PB_SPIMISO 0x00000008 /* PB 28 */ 63 #define PB_SPI_CE 0x00010000 /* PB 15 */ 64 65 /* ------------------------------------------------------------------------- */ 66 67 /* read clock time from DS1306 and return it in *tmp */ 68 int rtc_get (struct rtc_time *tmp) 69 { 70 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; 71 unsigned char spi_byte; /* Data Byte */ 72 73 init_spi (); /* set port B for software SPI */ 74 75 /* Now we can enable the DS1306 RTC */ 76 immap->im_cpm.cp_pbdat |= PB_SPI_CE; 77 udelay (10); 78 79 /* Shift out the address (0) of the time in the Clock Chip */ 80 soft_spi_send (0); 81 82 /* Put the clock readings into the rtc_time structure */ 83 tmp->tm_sec = bcd2bin (soft_spi_read ()); /* Read seconds */ 84 tmp->tm_min = bcd2bin (soft_spi_read ()); /* Read minutes */ 85 86 /* Hours are trickier */ 87 spi_byte = soft_spi_read (); /* Read Hours into temporary value */ 88 if (spi_byte & 0x40) { 89 /* 12 hour mode bit is set (time is in 1-12 format) */ 90 if (spi_byte & 0x20) { 91 /* since PM we add 11 to get 0-23 for hours */ 92 tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) + 11; 93 } else { 94 /* since AM we subtract 1 to get 0-23 for hours */ 95 tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) - 1; 96 } 97 } else { 98 /* Otherwise, 0-23 hour format */ 99 tmp->tm_hour = (bcd2bin (spi_byte & 0x3F)); 100 } 101 102 soft_spi_read (); /* Read and discard Day of week */ 103 tmp->tm_mday = bcd2bin (soft_spi_read ()); /* Read Day of the Month */ 104 tmp->tm_mon = bcd2bin (soft_spi_read ()); /* Read Month */ 105 106 /* Read Year and convert to this century */ 107 tmp->tm_year = bcd2bin (soft_spi_read ()) + 2000; 108 109 /* Now we can disable the DS1306 RTC */ 110 immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */ 111 udelay (10); 112 113 rtc_calc_weekday(tmp); /* Determine the day of week */ 114 115 debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", 116 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, 117 tmp->tm_hour, tmp->tm_min, tmp->tm_sec); 118 119 return 0; 120 } 121 122 /* ------------------------------------------------------------------------- */ 123 124 /* set clock time in DS1306 RTC and in MPC8xx RTC */ 125 int rtc_set (struct rtc_time *tmp) 126 { 127 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; 128 129 init_spi (); /* set port B for software SPI */ 130 131 /* Now we can enable the DS1306 RTC */ 132 immap->im_cpm.cp_pbdat |= PB_SPI_CE; /* Enable DS1306 Chip */ 133 udelay (10); 134 135 /* First disable write protect in the clock chip control register */ 136 soft_spi_send (0x8F); /* send address of the control register */ 137 soft_spi_send (0x00); /* send control register contents */ 138 139 /* Now disable the DS1306 to terminate the write */ 140 immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; 141 udelay (10); 142 143 /* Now enable the DS1306 to initiate a new write */ 144 immap->im_cpm.cp_pbdat |= PB_SPI_CE; 145 udelay (10); 146 147 /* Next, send the address of the clock time write registers */ 148 soft_spi_send (0x80); /* send address of the first time register */ 149 150 /* Use Burst Mode to send all of the time data to the clock */ 151 bin2bcd (tmp->tm_sec); 152 soft_spi_send (bin2bcd (tmp->tm_sec)); /* Send Seconds */ 153 soft_spi_send (bin2bcd (tmp->tm_min)); /* Send Minutes */ 154 soft_spi_send (bin2bcd (tmp->tm_hour)); /* Send Hour */ 155 soft_spi_send (bin2bcd (tmp->tm_wday)); /* Send Day of the Week */ 156 soft_spi_send (bin2bcd (tmp->tm_mday)); /* Send Day of Month */ 157 soft_spi_send (bin2bcd (tmp->tm_mon)); /* Send Month */ 158 soft_spi_send (bin2bcd (tmp->tm_year - 2000)); /* Send Year */ 159 160 /* Now we can disable the Clock chip to terminate the burst write */ 161 immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */ 162 udelay (10); 163 164 /* Now we can enable the Clock chip to initiate a new write */ 165 immap->im_cpm.cp_pbdat |= PB_SPI_CE; /* Enable DS1306 Chip */ 166 udelay (10); 167 168 /* First we Enable write protect in the clock chip control register */ 169 soft_spi_send (0x8F); /* send address of the control register */ 170 soft_spi_send (0x40); /* send out Control Register contents */ 171 172 /* Now disable the DS1306 */ 173 immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */ 174 udelay (10); 175 176 /* Set standard MPC8xx clock to the same time so Linux will 177 * see the time even if it doesn't have a DS1306 clock driver. 178 * This helps with experimenting with standard kernels. 179 */ 180 { 181 ulong tim; 182 183 tim = rtc_mktime(tmp); 184 185 immap->im_sitk.sitk_rtck = KAPWR_KEY; 186 immap->im_sit.sit_rtc = tim; 187 } 188 189 debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", 190 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, 191 tmp->tm_hour, tmp->tm_min, tmp->tm_sec); 192 193 return 0; 194 } 195 196 /* ------------------------------------------------------------------------- */ 197 198 /* Initialize Port B for software SPI */ 199 static void init_spi (void) 200 { 201 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; 202 203 /* Force output pins to begin at logic 0 */ 204 immap->im_cpm.cp_pbdat &= ~(PB_SPI_CE | PB_SPIMOSI | PB_SPISCK); 205 206 /* Set these 3 signals as outputs */ 207 immap->im_cpm.cp_pbdir |= (PB_SPIMOSI | PB_SPI_CE | PB_SPISCK); 208 209 immap->im_cpm.cp_pbdir &= ~PB_SPIMISO; /* Make MISO pin an input */ 210 udelay (10); 211 } 212 213 /* ------------------------------------------------------------------------- */ 214 215 /* NOTE: soft_spi_send() assumes that the I/O lines are configured already */ 216 static void soft_spi_send (unsigned char n) 217 { 218 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; 219 unsigned char bitpos; /* bit position to receive */ 220 unsigned char i; /* Loop Control */ 221 222 /* bit position to send, start with most significant bit */ 223 bitpos = 0x80; 224 225 /* Send 8 bits to software SPI */ 226 for (i = 0; i < 8; i++) { /* Loop for 8 bits */ 227 immap->im_cpm.cp_pbdat |= PB_SPISCK; /* Raise SCK */ 228 229 if (n & bitpos) 230 immap->im_cpm.cp_pbdat |= PB_SPIMOSI; /* Set MOSI to 1 */ 231 else 232 immap->im_cpm.cp_pbdat &= ~PB_SPIMOSI; /* Set MOSI to 0 */ 233 udelay (10); 234 235 immap->im_cpm.cp_pbdat &= ~PB_SPISCK; /* Lower SCK */ 236 udelay (10); 237 238 bitpos >>= 1; /* Shift for next bit position */ 239 } 240 } 241 242 /* ------------------------------------------------------------------------- */ 243 244 /* NOTE: soft_spi_read() assumes that the I/O lines are configured already */ 245 static unsigned char soft_spi_read (void) 246 { 247 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; 248 249 unsigned char spi_byte = 0; /* Return value, assume success */ 250 unsigned char bitpos; /* bit position to receive */ 251 unsigned char i; /* Loop Control */ 252 253 /* bit position to receive, start with most significant bit */ 254 bitpos = 0x80; 255 256 /* Read 8 bits here */ 257 for (i = 0; i < 8; i++) { /* Do 8 bits in loop */ 258 immap->im_cpm.cp_pbdat |= PB_SPISCK; /* Raise SCK */ 259 udelay (10); 260 if (immap->im_cpm.cp_pbdat & PB_SPIMISO) /* Get a bit of data */ 261 spi_byte |= bitpos; /* Set data accordingly */ 262 immap->im_cpm.cp_pbdat &= ~PB_SPISCK; /* Lower SCK */ 263 udelay (10); 264 bitpos >>= 1; /* Shift for next bit position */ 265 } 266 267 return spi_byte; /* Return the byte read */ 268 } 269 270 /* ------------------------------------------------------------------------- */ 271 272 void rtc_reset (void) 273 { 274 return; /* nothing to do */ 275 } 276 277 #else /* not CONFIG_SXNI855T */ 278 /* ************************************************************************* */ 279 280 static unsigned char rtc_read (unsigned char reg); 281 static void rtc_write (unsigned char reg, unsigned char val); 282 283 static struct spi_slave *slave; 284 285 /* read clock time from DS1306 and return it in *tmp */ 286 int rtc_get (struct rtc_time *tmp) 287 { 288 unsigned char sec, min, hour, mday, wday, mon, year; 289 290 /* 291 * Assuming Vcc = 2.0V (lowest speed) 292 * 293 * REVISIT: If we add an rtc_init() function we can do this 294 * step just once. 295 */ 296 if (!slave) { 297 slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000, 298 SPI_MODE_3 | SPI_CS_HIGH); 299 if (!slave) 300 return; 301 } 302 303 if (spi_claim_bus(slave)) 304 return; 305 306 sec = rtc_read (RTC_SECONDS); 307 min = rtc_read (RTC_MINUTES); 308 hour = rtc_read (RTC_HOURS); 309 mday = rtc_read (RTC_DATE_OF_MONTH); 310 wday = rtc_read (RTC_DAY_OF_WEEK); 311 mon = rtc_read (RTC_MONTH); 312 year = rtc_read (RTC_YEAR); 313 314 spi_release_bus(slave); 315 316 debug ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x " 317 "hr: %02x min: %02x sec: %02x\n", 318 year, mon, mday, wday, hour, min, sec); 319 debug ("Alarms[0]: wday: %02x hour: %02x min: %02x sec: %02x\n", 320 rtc_read (RTC_DAY_OF_WEEK_ALARM0), 321 rtc_read (RTC_HOURS_ALARM0), 322 rtc_read (RTC_MINUTES_ALARM0), rtc_read (RTC_SECONDS_ALARM0)); 323 debug ("Alarms[1]: wday: %02x hour: %02x min: %02x sec: %02x\n", 324 rtc_read (RTC_DAY_OF_WEEK_ALARM1), 325 rtc_read (RTC_HOURS_ALARM1), 326 rtc_read (RTC_MINUTES_ALARM1), rtc_read (RTC_SECONDS_ALARM1)); 327 328 tmp->tm_sec = bcd2bin (sec & 0x7F); /* convert Seconds */ 329 tmp->tm_min = bcd2bin (min & 0x7F); /* convert Minutes */ 330 331 /* convert Hours */ 332 tmp->tm_hour = (hour & 0x40) 333 ? ((hour & 0x20) /* 12 hour mode */ 334 ? bcd2bin (hour & 0x1F) + 11 /* PM */ 335 : bcd2bin (hour & 0x1F) - 1 /* AM */ 336 ) 337 : bcd2bin (hour & 0x3F); /* 24 hour mode */ 338 339 tmp->tm_mday = bcd2bin (mday & 0x3F); /* convert Day of the Month */ 340 tmp->tm_mon = bcd2bin (mon & 0x1F); /* convert Month */ 341 tmp->tm_year = bcd2bin (year) + 2000; /* convert Year */ 342 tmp->tm_wday = bcd2bin (wday & 0x07) - 1; /* convert Day of the Week */ 343 tmp->tm_yday = 0; 344 tmp->tm_isdst = 0; 345 346 debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", 347 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, 348 tmp->tm_hour, tmp->tm_min, tmp->tm_sec); 349 350 return 0; 351 } 352 353 /* ------------------------------------------------------------------------- */ 354 355 /* set clock time from *tmp in DS1306 RTC */ 356 int rtc_set (struct rtc_time *tmp) 357 { 358 /* Assuming Vcc = 2.0V (lowest speed) */ 359 if (!slave) { 360 slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000, 361 SPI_MODE_3 | SPI_CS_HIGH); 362 if (!slave) 363 return; 364 } 365 366 if (spi_claim_bus(slave)) 367 return; 368 369 debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", 370 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, 371 tmp->tm_hour, tmp->tm_min, tmp->tm_sec); 372 373 rtc_write (RTC_SECONDS, bin2bcd (tmp->tm_sec)); 374 rtc_write (RTC_MINUTES, bin2bcd (tmp->tm_min)); 375 rtc_write (RTC_HOURS, bin2bcd (tmp->tm_hour)); 376 rtc_write (RTC_DAY_OF_WEEK, bin2bcd (tmp->tm_wday + 1)); 377 rtc_write (RTC_DATE_OF_MONTH, bin2bcd (tmp->tm_mday)); 378 rtc_write (RTC_MONTH, bin2bcd (tmp->tm_mon)); 379 rtc_write (RTC_YEAR, bin2bcd (tmp->tm_year - 2000)); 380 381 spi_release_bus(slave); 382 } 383 384 /* ------------------------------------------------------------------------- */ 385 386 /* reset the DS1306 */ 387 void rtc_reset (void) 388 { 389 /* Assuming Vcc = 2.0V (lowest speed) */ 390 if (!slave) { 391 slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000, 392 SPI_MODE_3 | SPI_CS_HIGH); 393 if (!slave) 394 return; 395 } 396 397 if (spi_claim_bus(slave)) 398 return; 399 400 /* clear the control register */ 401 rtc_write (RTC_CONTROL, 0x00); /* 1st step: reset WP */ 402 rtc_write (RTC_CONTROL, 0x00); /* 2nd step: reset 1Hz, AIE1, AIE0 */ 403 404 /* reset all alarms */ 405 rtc_write (RTC_SECONDS_ALARM0, 0x00); 406 rtc_write (RTC_SECONDS_ALARM1, 0x00); 407 rtc_write (RTC_MINUTES_ALARM0, 0x00); 408 rtc_write (RTC_MINUTES_ALARM1, 0x00); 409 rtc_write (RTC_HOURS_ALARM0, 0x00); 410 rtc_write (RTC_HOURS_ALARM1, 0x00); 411 rtc_write (RTC_DAY_OF_WEEK_ALARM0, 0x00); 412 rtc_write (RTC_DAY_OF_WEEK_ALARM1, 0x00); 413 414 spi_release_bus(slave); 415 } 416 417 /* ------------------------------------------------------------------------- */ 418 419 static unsigned char rtc_read (unsigned char reg) 420 { 421 int ret; 422 423 ret = spi_w8r8(slave, reg); 424 return ret < 0 ? 0 : ret; 425 } 426 427 /* ------------------------------------------------------------------------- */ 428 429 static void rtc_write (unsigned char reg, unsigned char val) 430 { 431 unsigned char dout[2]; /* SPI Output Data Bytes */ 432 unsigned char din[2]; /* SPI Input Data Bytes */ 433 434 dout[0] = 0x80 | reg; 435 dout[1] = val; 436 437 spi_xfer (slave, 16, dout, din, SPI_XFER_BEGIN | SPI_XFER_END); 438 } 439 440 #endif /* end of code exclusion (see #ifdef CONFIG_SXNI855T above) */ 441 442 #endif 443