1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * (C) Copyright 2002 SIXNET, dge@sixnetio.com. 4 * 5 * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net> 6 * Stephan Linz <linz@li-pro.net> 7 */ 8 9 /* 10 * Date & Time support for DS1306 RTC using SPI: 11 * 12 * - SXNI855T: it uses its own soft SPI here in this file 13 * - all other: use the external spi_xfer() function 14 * (see include/spi.h) 15 */ 16 17 #include <common.h> 18 #include <command.h> 19 #include <rtc.h> 20 #include <spi.h> 21 22 #if defined(CONFIG_CMD_DATE) 23 24 #define RTC_SECONDS 0x00 25 #define RTC_MINUTES 0x01 26 #define RTC_HOURS 0x02 27 #define RTC_DAY_OF_WEEK 0x03 28 #define RTC_DATE_OF_MONTH 0x04 29 #define RTC_MONTH 0x05 30 #define RTC_YEAR 0x06 31 32 #define RTC_SECONDS_ALARM0 0x07 33 #define RTC_MINUTES_ALARM0 0x08 34 #define RTC_HOURS_ALARM0 0x09 35 #define RTC_DAY_OF_WEEK_ALARM0 0x0a 36 37 #define RTC_SECONDS_ALARM1 0x0b 38 #define RTC_MINUTES_ALARM1 0x0c 39 #define RTC_HOURS_ALARM1 0x0d 40 #define RTC_DAY_OF_WEEK_ALARM1 0x0e 41 42 #define RTC_CONTROL 0x0f 43 #define RTC_STATUS 0x10 44 #define RTC_TRICKLE_CHARGER 0x11 45 46 #define RTC_USER_RAM_BASE 0x20 47 48 /* ************************************************************************* */ 49 #ifdef CONFIG_SXNI855T /* !!! SHOULD BE CHANGED TO NEW CODE !!! */ 50 51 static void soft_spi_send (unsigned char n); 52 static unsigned char soft_spi_read (void); 53 static void init_spi (void); 54 55 /*----------------------------------------------------------------------- 56 * Definitions 57 */ 58 59 #define PB_SPISCK 0x00000002 /* PB 30 */ 60 #define PB_SPIMOSI 0x00000004 /* PB 29 */ 61 #define PB_SPIMISO 0x00000008 /* PB 28 */ 62 #define PB_SPI_CE 0x00010000 /* PB 15 */ 63 64 /* ------------------------------------------------------------------------- */ 65 66 /* read clock time from DS1306 and return it in *tmp */ 67 int rtc_get (struct rtc_time *tmp) 68 { 69 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; 70 unsigned char spi_byte; /* Data Byte */ 71 72 init_spi (); /* set port B for software SPI */ 73 74 /* Now we can enable the DS1306 RTC */ 75 immap->im_cpm.cp_pbdat |= PB_SPI_CE; 76 udelay (10); 77 78 /* Shift out the address (0) of the time in the Clock Chip */ 79 soft_spi_send (0); 80 81 /* Put the clock readings into the rtc_time structure */ 82 tmp->tm_sec = bcd2bin (soft_spi_read ()); /* Read seconds */ 83 tmp->tm_min = bcd2bin (soft_spi_read ()); /* Read minutes */ 84 85 /* Hours are trickier */ 86 spi_byte = soft_spi_read (); /* Read Hours into temporary value */ 87 if (spi_byte & 0x40) { 88 /* 12 hour mode bit is set (time is in 1-12 format) */ 89 if (spi_byte & 0x20) { 90 /* since PM we add 11 to get 0-23 for hours */ 91 tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) + 11; 92 } else { 93 /* since AM we subtract 1 to get 0-23 for hours */ 94 tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) - 1; 95 } 96 } else { 97 /* Otherwise, 0-23 hour format */ 98 tmp->tm_hour = (bcd2bin (spi_byte & 0x3F)); 99 } 100 101 soft_spi_read (); /* Read and discard Day of week */ 102 tmp->tm_mday = bcd2bin (soft_spi_read ()); /* Read Day of the Month */ 103 tmp->tm_mon = bcd2bin (soft_spi_read ()); /* Read Month */ 104 105 /* Read Year and convert to this century */ 106 tmp->tm_year = bcd2bin (soft_spi_read ()) + 2000; 107 108 /* Now we can disable the DS1306 RTC */ 109 immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */ 110 udelay (10); 111 112 rtc_calc_weekday(tmp); /* Determine the day of week */ 113 114 debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", 115 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, 116 tmp->tm_hour, tmp->tm_min, tmp->tm_sec); 117 118 return 0; 119 } 120 121 /* ------------------------------------------------------------------------- */ 122 123 /* set clock time in DS1306 RTC and in MPC8xx RTC */ 124 int rtc_set (struct rtc_time *tmp) 125 { 126 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; 127 128 init_spi (); /* set port B for software SPI */ 129 130 /* Now we can enable the DS1306 RTC */ 131 immap->im_cpm.cp_pbdat |= PB_SPI_CE; /* Enable DS1306 Chip */ 132 udelay (10); 133 134 /* First disable write protect in the clock chip control register */ 135 soft_spi_send (0x8F); /* send address of the control register */ 136 soft_spi_send (0x00); /* send control register contents */ 137 138 /* Now disable the DS1306 to terminate the write */ 139 immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; 140 udelay (10); 141 142 /* Now enable the DS1306 to initiate a new write */ 143 immap->im_cpm.cp_pbdat |= PB_SPI_CE; 144 udelay (10); 145 146 /* Next, send the address of the clock time write registers */ 147 soft_spi_send (0x80); /* send address of the first time register */ 148 149 /* Use Burst Mode to send all of the time data to the clock */ 150 bin2bcd (tmp->tm_sec); 151 soft_spi_send (bin2bcd (tmp->tm_sec)); /* Send Seconds */ 152 soft_spi_send (bin2bcd (tmp->tm_min)); /* Send Minutes */ 153 soft_spi_send (bin2bcd (tmp->tm_hour)); /* Send Hour */ 154 soft_spi_send (bin2bcd (tmp->tm_wday)); /* Send Day of the Week */ 155 soft_spi_send (bin2bcd (tmp->tm_mday)); /* Send Day of Month */ 156 soft_spi_send (bin2bcd (tmp->tm_mon)); /* Send Month */ 157 soft_spi_send (bin2bcd (tmp->tm_year - 2000)); /* Send Year */ 158 159 /* Now we can disable the Clock chip to terminate the burst write */ 160 immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */ 161 udelay (10); 162 163 /* Now we can enable the Clock chip to initiate a new write */ 164 immap->im_cpm.cp_pbdat |= PB_SPI_CE; /* Enable DS1306 Chip */ 165 udelay (10); 166 167 /* First we Enable write protect in the clock chip control register */ 168 soft_spi_send (0x8F); /* send address of the control register */ 169 soft_spi_send (0x40); /* send out Control Register contents */ 170 171 /* Now disable the DS1306 */ 172 immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */ 173 udelay (10); 174 175 /* Set standard MPC8xx clock to the same time so Linux will 176 * see the time even if it doesn't have a DS1306 clock driver. 177 * This helps with experimenting with standard kernels. 178 */ 179 { 180 ulong tim; 181 182 tim = rtc_mktime(tmp); 183 184 immap->im_sitk.sitk_rtck = KAPWR_KEY; 185 immap->im_sit.sit_rtc = tim; 186 } 187 188 debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", 189 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, 190 tmp->tm_hour, tmp->tm_min, tmp->tm_sec); 191 192 return 0; 193 } 194 195 /* ------------------------------------------------------------------------- */ 196 197 /* Initialize Port B for software SPI */ 198 static void init_spi (void) 199 { 200 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; 201 202 /* Force output pins to begin at logic 0 */ 203 immap->im_cpm.cp_pbdat &= ~(PB_SPI_CE | PB_SPIMOSI | PB_SPISCK); 204 205 /* Set these 3 signals as outputs */ 206 immap->im_cpm.cp_pbdir |= (PB_SPIMOSI | PB_SPI_CE | PB_SPISCK); 207 208 immap->im_cpm.cp_pbdir &= ~PB_SPIMISO; /* Make MISO pin an input */ 209 udelay (10); 210 } 211 212 /* ------------------------------------------------------------------------- */ 213 214 /* NOTE: soft_spi_send() assumes that the I/O lines are configured already */ 215 static void soft_spi_send (unsigned char n) 216 { 217 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; 218 unsigned char bitpos; /* bit position to receive */ 219 unsigned char i; /* Loop Control */ 220 221 /* bit position to send, start with most significant bit */ 222 bitpos = 0x80; 223 224 /* Send 8 bits to software SPI */ 225 for (i = 0; i < 8; i++) { /* Loop for 8 bits */ 226 immap->im_cpm.cp_pbdat |= PB_SPISCK; /* Raise SCK */ 227 228 if (n & bitpos) 229 immap->im_cpm.cp_pbdat |= PB_SPIMOSI; /* Set MOSI to 1 */ 230 else 231 immap->im_cpm.cp_pbdat &= ~PB_SPIMOSI; /* Set MOSI to 0 */ 232 udelay (10); 233 234 immap->im_cpm.cp_pbdat &= ~PB_SPISCK; /* Lower SCK */ 235 udelay (10); 236 237 bitpos >>= 1; /* Shift for next bit position */ 238 } 239 } 240 241 /* ------------------------------------------------------------------------- */ 242 243 /* NOTE: soft_spi_read() assumes that the I/O lines are configured already */ 244 static unsigned char soft_spi_read (void) 245 { 246 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; 247 248 unsigned char spi_byte = 0; /* Return value, assume success */ 249 unsigned char bitpos; /* bit position to receive */ 250 unsigned char i; /* Loop Control */ 251 252 /* bit position to receive, start with most significant bit */ 253 bitpos = 0x80; 254 255 /* Read 8 bits here */ 256 for (i = 0; i < 8; i++) { /* Do 8 bits in loop */ 257 immap->im_cpm.cp_pbdat |= PB_SPISCK; /* Raise SCK */ 258 udelay (10); 259 if (immap->im_cpm.cp_pbdat & PB_SPIMISO) /* Get a bit of data */ 260 spi_byte |= bitpos; /* Set data accordingly */ 261 immap->im_cpm.cp_pbdat &= ~PB_SPISCK; /* Lower SCK */ 262 udelay (10); 263 bitpos >>= 1; /* Shift for next bit position */ 264 } 265 266 return spi_byte; /* Return the byte read */ 267 } 268 269 /* ------------------------------------------------------------------------- */ 270 271 void rtc_reset (void) 272 { 273 return; /* nothing to do */ 274 } 275 276 #else /* not CONFIG_SXNI855T */ 277 /* ************************************************************************* */ 278 279 static unsigned char rtc_read (unsigned char reg); 280 static void rtc_write (unsigned char reg, unsigned char val); 281 282 static struct spi_slave *slave; 283 284 /* read clock time from DS1306 and return it in *tmp */ 285 int rtc_get (struct rtc_time *tmp) 286 { 287 unsigned char sec, min, hour, mday, wday, mon, year; 288 289 /* 290 * Assuming Vcc = 2.0V (lowest speed) 291 * 292 * REVISIT: If we add an rtc_init() function we can do this 293 * step just once. 294 */ 295 if (!slave) { 296 slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000, 297 SPI_MODE_3 | SPI_CS_HIGH); 298 if (!slave) 299 return; 300 } 301 302 if (spi_claim_bus(slave)) 303 return; 304 305 sec = rtc_read (RTC_SECONDS); 306 min = rtc_read (RTC_MINUTES); 307 hour = rtc_read (RTC_HOURS); 308 mday = rtc_read (RTC_DATE_OF_MONTH); 309 wday = rtc_read (RTC_DAY_OF_WEEK); 310 mon = rtc_read (RTC_MONTH); 311 year = rtc_read (RTC_YEAR); 312 313 spi_release_bus(slave); 314 315 debug ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x " 316 "hr: %02x min: %02x sec: %02x\n", 317 year, mon, mday, wday, hour, min, sec); 318 debug ("Alarms[0]: wday: %02x hour: %02x min: %02x sec: %02x\n", 319 rtc_read (RTC_DAY_OF_WEEK_ALARM0), 320 rtc_read (RTC_HOURS_ALARM0), 321 rtc_read (RTC_MINUTES_ALARM0), rtc_read (RTC_SECONDS_ALARM0)); 322 debug ("Alarms[1]: wday: %02x hour: %02x min: %02x sec: %02x\n", 323 rtc_read (RTC_DAY_OF_WEEK_ALARM1), 324 rtc_read (RTC_HOURS_ALARM1), 325 rtc_read (RTC_MINUTES_ALARM1), rtc_read (RTC_SECONDS_ALARM1)); 326 327 tmp->tm_sec = bcd2bin (sec & 0x7F); /* convert Seconds */ 328 tmp->tm_min = bcd2bin (min & 0x7F); /* convert Minutes */ 329 330 /* convert Hours */ 331 tmp->tm_hour = (hour & 0x40) 332 ? ((hour & 0x20) /* 12 hour mode */ 333 ? bcd2bin (hour & 0x1F) + 11 /* PM */ 334 : bcd2bin (hour & 0x1F) - 1 /* AM */ 335 ) 336 : bcd2bin (hour & 0x3F); /* 24 hour mode */ 337 338 tmp->tm_mday = bcd2bin (mday & 0x3F); /* convert Day of the Month */ 339 tmp->tm_mon = bcd2bin (mon & 0x1F); /* convert Month */ 340 tmp->tm_year = bcd2bin (year) + 2000; /* convert Year */ 341 tmp->tm_wday = bcd2bin (wday & 0x07) - 1; /* convert Day of the Week */ 342 tmp->tm_yday = 0; 343 tmp->tm_isdst = 0; 344 345 debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", 346 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, 347 tmp->tm_hour, tmp->tm_min, tmp->tm_sec); 348 349 return 0; 350 } 351 352 /* ------------------------------------------------------------------------- */ 353 354 /* set clock time from *tmp in DS1306 RTC */ 355 int rtc_set (struct rtc_time *tmp) 356 { 357 /* Assuming Vcc = 2.0V (lowest speed) */ 358 if (!slave) { 359 slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000, 360 SPI_MODE_3 | SPI_CS_HIGH); 361 if (!slave) 362 return; 363 } 364 365 if (spi_claim_bus(slave)) 366 return; 367 368 debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", 369 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, 370 tmp->tm_hour, tmp->tm_min, tmp->tm_sec); 371 372 rtc_write (RTC_SECONDS, bin2bcd (tmp->tm_sec)); 373 rtc_write (RTC_MINUTES, bin2bcd (tmp->tm_min)); 374 rtc_write (RTC_HOURS, bin2bcd (tmp->tm_hour)); 375 rtc_write (RTC_DAY_OF_WEEK, bin2bcd (tmp->tm_wday + 1)); 376 rtc_write (RTC_DATE_OF_MONTH, bin2bcd (tmp->tm_mday)); 377 rtc_write (RTC_MONTH, bin2bcd (tmp->tm_mon)); 378 rtc_write (RTC_YEAR, bin2bcd (tmp->tm_year - 2000)); 379 380 spi_release_bus(slave); 381 } 382 383 /* ------------------------------------------------------------------------- */ 384 385 /* reset the DS1306 */ 386 void rtc_reset (void) 387 { 388 /* Assuming Vcc = 2.0V (lowest speed) */ 389 if (!slave) { 390 slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000, 391 SPI_MODE_3 | SPI_CS_HIGH); 392 if (!slave) 393 return; 394 } 395 396 if (spi_claim_bus(slave)) 397 return; 398 399 /* clear the control register */ 400 rtc_write (RTC_CONTROL, 0x00); /* 1st step: reset WP */ 401 rtc_write (RTC_CONTROL, 0x00); /* 2nd step: reset 1Hz, AIE1, AIE0 */ 402 403 /* reset all alarms */ 404 rtc_write (RTC_SECONDS_ALARM0, 0x00); 405 rtc_write (RTC_SECONDS_ALARM1, 0x00); 406 rtc_write (RTC_MINUTES_ALARM0, 0x00); 407 rtc_write (RTC_MINUTES_ALARM1, 0x00); 408 rtc_write (RTC_HOURS_ALARM0, 0x00); 409 rtc_write (RTC_HOURS_ALARM1, 0x00); 410 rtc_write (RTC_DAY_OF_WEEK_ALARM0, 0x00); 411 rtc_write (RTC_DAY_OF_WEEK_ALARM1, 0x00); 412 413 spi_release_bus(slave); 414 } 415 416 /* ------------------------------------------------------------------------- */ 417 418 static unsigned char rtc_read (unsigned char reg) 419 { 420 int ret; 421 422 ret = spi_w8r8(slave, reg); 423 return ret < 0 ? 0 : ret; 424 } 425 426 /* ------------------------------------------------------------------------- */ 427 428 static void rtc_write (unsigned char reg, unsigned char val) 429 { 430 unsigned char dout[2]; /* SPI Output Data Bytes */ 431 unsigned char din[2]; /* SPI Input Data Bytes */ 432 433 dout[0] = 0x80 | reg; 434 dout[1] = val; 435 436 spi_xfer (slave, 16, dout, din, SPI_XFER_BEGIN | SPI_XFER_END); 437 } 438 439 #endif /* end of code exclusion (see #ifdef CONFIG_SXNI855T above) */ 440 441 #endif 442