xref: /openbmc/u-boot/drivers/reset/stm32-reset.c (revision 8ee59472)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
4  * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
5  */
6 
7 #include <common.h>
8 #include <dm.h>
9 #include <errno.h>
10 #include <reset-uclass.h>
11 #include <asm/io.h>
12 
13 /* reset clear offset for STM32MP RCC */
14 #define RCC_CL 0x4
15 
16 enum rcc_type {
17 	RCC_STM32 = 0,
18 	RCC_STM32MP,
19 };
20 
21 struct stm32_reset_priv {
22 	fdt_addr_t base;
23 };
24 
25 static int stm32_reset_request(struct reset_ctl *reset_ctl)
26 {
27 	return 0;
28 }
29 
30 static int stm32_reset_free(struct reset_ctl *reset_ctl)
31 {
32 	return 0;
33 }
34 
35 static int stm32_reset_assert(struct reset_ctl *reset_ctl)
36 {
37 	struct stm32_reset_priv *priv = dev_get_priv(reset_ctl->dev);
38 	int bank = (reset_ctl->id / BITS_PER_LONG) * 4;
39 	int offset = reset_ctl->id % BITS_PER_LONG;
40 	debug("%s: reset id = %ld bank = %d offset = %d)\n", __func__,
41 	      reset_ctl->id, bank, offset);
42 
43 	if (dev_get_driver_data(reset_ctl->dev) == RCC_STM32MP)
44 		/* reset assert is done in rcc set register */
45 		writel(BIT(offset), priv->base + bank);
46 	else
47 		setbits_le32(priv->base + bank, BIT(offset));
48 
49 	return 0;
50 }
51 
52 static int stm32_reset_deassert(struct reset_ctl *reset_ctl)
53 {
54 	struct stm32_reset_priv *priv = dev_get_priv(reset_ctl->dev);
55 	int bank = (reset_ctl->id / BITS_PER_LONG) * 4;
56 	int offset = reset_ctl->id % BITS_PER_LONG;
57 	debug("%s: reset id = %ld bank = %d offset = %d)\n", __func__,
58 	      reset_ctl->id, bank, offset);
59 
60 	if (dev_get_driver_data(reset_ctl->dev) == RCC_STM32MP)
61 		/* reset deassert is done in rcc clr register */
62 		writel(BIT(offset), priv->base + bank + RCC_CL);
63 	else
64 		clrbits_le32(priv->base + bank, BIT(offset));
65 
66 	return 0;
67 }
68 
69 static const struct reset_ops stm32_reset_ops = {
70 	.request	= stm32_reset_request,
71 	.free		= stm32_reset_free,
72 	.rst_assert	= stm32_reset_assert,
73 	.rst_deassert	= stm32_reset_deassert,
74 };
75 
76 static int stm32_reset_probe(struct udevice *dev)
77 {
78 	struct stm32_reset_priv *priv = dev_get_priv(dev);
79 
80 	priv->base = dev_read_addr(dev);
81 	if (priv->base == FDT_ADDR_T_NONE) {
82 		/* for MFD, get address of parent */
83 		priv->base = dev_read_addr(dev->parent);
84 		if (priv->base == FDT_ADDR_T_NONE)
85 			return -EINVAL;
86 	}
87 
88 	return 0;
89 }
90 
91 static const struct udevice_id stm32_reset_ids[] = {
92 	{ .compatible = "st,stm32mp1-rcc-rst", .data = RCC_STM32MP },
93 	{ }
94 };
95 
96 U_BOOT_DRIVER(stm32_rcc_reset) = {
97 	.name			= "stm32_rcc_reset",
98 	.id			= UCLASS_RESET,
99 	.of_match		= stm32_reset_ids,
100 	.probe			= stm32_reset_probe,
101 	.priv_auto_alloc_size	= sizeof(struct stm32_reset_priv),
102 	.ops			= &stm32_reset_ops,
103 };
104