1*760188c1SElaine Zhang /* 2*760188c1SElaine Zhang * (C) Copyright 2017 Rockchip Electronics Co., Ltd 3*760188c1SElaine Zhang * 4*760188c1SElaine Zhang * SPDX-License-Identifier: GPL-2.0 5*760188c1SElaine Zhang */ 6*760188c1SElaine Zhang 7*760188c1SElaine Zhang #include <common.h> 8*760188c1SElaine Zhang #include <dm.h> 9*760188c1SElaine Zhang #include <reset-uclass.h> 10*760188c1SElaine Zhang #include <linux/io.h> 11*760188c1SElaine Zhang #include <asm/arch/hardware.h> 12*760188c1SElaine Zhang #include <dm/lists.h> 13*760188c1SElaine Zhang /* 14*760188c1SElaine Zhang * Each reg has 16 bits reset signal for devices 15*760188c1SElaine Zhang * Note: Not including rk2818 and older SoCs 16*760188c1SElaine Zhang */ 17*760188c1SElaine Zhang #define ROCKCHIP_RESET_NUM_IN_REG 16 18*760188c1SElaine Zhang 19*760188c1SElaine Zhang struct rockchip_reset_priv { 20*760188c1SElaine Zhang void __iomem *base; 21*760188c1SElaine Zhang /* Rockchip reset reg locate at cru controller */ 22*760188c1SElaine Zhang u32 reset_reg_offset; 23*760188c1SElaine Zhang /* Rockchip reset reg number */ 24*760188c1SElaine Zhang u32 reset_reg_num; 25*760188c1SElaine Zhang }; 26*760188c1SElaine Zhang 27*760188c1SElaine Zhang static int rockchip_reset_request(struct reset_ctl *reset_ctl) 28*760188c1SElaine Zhang { 29*760188c1SElaine Zhang struct rockchip_reset_priv *priv = dev_get_priv(reset_ctl->dev); 30*760188c1SElaine Zhang 31*760188c1SElaine Zhang debug("%s(reset_ctl=%p) (dev=%p, id=%lu) (reg_num=%d)\n", __func__, 32*760188c1SElaine Zhang reset_ctl, reset_ctl->dev, reset_ctl->id, priv->reset_reg_num); 33*760188c1SElaine Zhang 34*760188c1SElaine Zhang if (reset_ctl->id / ROCKCHIP_RESET_NUM_IN_REG >= priv->reset_reg_num) 35*760188c1SElaine Zhang return -EINVAL; 36*760188c1SElaine Zhang 37*760188c1SElaine Zhang return 0; 38*760188c1SElaine Zhang } 39*760188c1SElaine Zhang 40*760188c1SElaine Zhang static int rockchip_reset_free(struct reset_ctl *reset_ctl) 41*760188c1SElaine Zhang { 42*760188c1SElaine Zhang debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, 43*760188c1SElaine Zhang reset_ctl->dev, reset_ctl->id); 44*760188c1SElaine Zhang 45*760188c1SElaine Zhang return 0; 46*760188c1SElaine Zhang } 47*760188c1SElaine Zhang 48*760188c1SElaine Zhang static int rockchip_reset_assert(struct reset_ctl *reset_ctl) 49*760188c1SElaine Zhang { 50*760188c1SElaine Zhang struct rockchip_reset_priv *priv = dev_get_priv(reset_ctl->dev); 51*760188c1SElaine Zhang int bank = reset_ctl->id / ROCKCHIP_RESET_NUM_IN_REG; 52*760188c1SElaine Zhang int offset = reset_ctl->id % ROCKCHIP_RESET_NUM_IN_REG; 53*760188c1SElaine Zhang 54*760188c1SElaine Zhang debug("%s(reset_ctl=%p) (dev=%p, id=%lu) (reg_addr=%p)\n", __func__, 55*760188c1SElaine Zhang reset_ctl, reset_ctl->dev, reset_ctl->id, 56*760188c1SElaine Zhang priv->base + (bank * 4)); 57*760188c1SElaine Zhang 58*760188c1SElaine Zhang rk_setreg(priv->base + (bank * 4), BIT(offset)); 59*760188c1SElaine Zhang 60*760188c1SElaine Zhang return 0; 61*760188c1SElaine Zhang } 62*760188c1SElaine Zhang 63*760188c1SElaine Zhang static int rockchip_reset_deassert(struct reset_ctl *reset_ctl) 64*760188c1SElaine Zhang { 65*760188c1SElaine Zhang struct rockchip_reset_priv *priv = dev_get_priv(reset_ctl->dev); 66*760188c1SElaine Zhang int bank = reset_ctl->id / ROCKCHIP_RESET_NUM_IN_REG; 67*760188c1SElaine Zhang int offset = reset_ctl->id % ROCKCHIP_RESET_NUM_IN_REG; 68*760188c1SElaine Zhang 69*760188c1SElaine Zhang debug("%s(reset_ctl=%p) (dev=%p, id=%lu) (reg_addr=%p)\n", __func__, 70*760188c1SElaine Zhang reset_ctl, reset_ctl->dev, reset_ctl->id, 71*760188c1SElaine Zhang priv->base + (bank * 4)); 72*760188c1SElaine Zhang 73*760188c1SElaine Zhang rk_clrreg(priv->base + (bank * 4), BIT(offset)); 74*760188c1SElaine Zhang 75*760188c1SElaine Zhang return 0; 76*760188c1SElaine Zhang } 77*760188c1SElaine Zhang 78*760188c1SElaine Zhang struct reset_ops rockchip_reset_ops = { 79*760188c1SElaine Zhang .request = rockchip_reset_request, 80*760188c1SElaine Zhang .free = rockchip_reset_free, 81*760188c1SElaine Zhang .rst_assert = rockchip_reset_assert, 82*760188c1SElaine Zhang .rst_deassert = rockchip_reset_deassert, 83*760188c1SElaine Zhang }; 84*760188c1SElaine Zhang 85*760188c1SElaine Zhang static int rockchip_reset_probe(struct udevice *dev) 86*760188c1SElaine Zhang { 87*760188c1SElaine Zhang struct rockchip_reset_priv *priv = dev_get_priv(dev); 88*760188c1SElaine Zhang fdt_addr_t addr; 89*760188c1SElaine Zhang fdt_size_t size; 90*760188c1SElaine Zhang 91*760188c1SElaine Zhang addr = dev_read_addr_size(dev, "reg", &size); 92*760188c1SElaine Zhang if (addr == FDT_ADDR_T_NONE) 93*760188c1SElaine Zhang return -EINVAL; 94*760188c1SElaine Zhang 95*760188c1SElaine Zhang if ((priv->reset_reg_offset == 0) && (priv->reset_reg_num == 0)) 96*760188c1SElaine Zhang return -EINVAL; 97*760188c1SElaine Zhang 98*760188c1SElaine Zhang addr += priv->reset_reg_offset; 99*760188c1SElaine Zhang priv->base = ioremap(addr, size); 100*760188c1SElaine Zhang 101*760188c1SElaine Zhang debug("%s(base=%p) (reg_offset=%x, reg_num=%d)\n", __func__, 102*760188c1SElaine Zhang priv->base, priv->reset_reg_offset, priv->reset_reg_num); 103*760188c1SElaine Zhang 104*760188c1SElaine Zhang return 0; 105*760188c1SElaine Zhang } 106*760188c1SElaine Zhang 107*760188c1SElaine Zhang int rockchip_reset_bind(struct udevice *pdev, u32 reg_offset, u32 reg_number) 108*760188c1SElaine Zhang { 109*760188c1SElaine Zhang struct udevice *rst_dev; 110*760188c1SElaine Zhang struct rockchip_reset_priv *priv; 111*760188c1SElaine Zhang int ret; 112*760188c1SElaine Zhang 113*760188c1SElaine Zhang ret = device_bind_driver_to_node(pdev, "rockchip_reset", "reset", 114*760188c1SElaine Zhang dev_ofnode(pdev), &rst_dev); 115*760188c1SElaine Zhang if (ret) { 116*760188c1SElaine Zhang debug("Warning: No rockchip reset driver: ret=%d\n", ret); 117*760188c1SElaine Zhang return ret; 118*760188c1SElaine Zhang } 119*760188c1SElaine Zhang priv = malloc(sizeof(struct rockchip_reset_priv)); 120*760188c1SElaine Zhang priv->reset_reg_offset = reg_offset; 121*760188c1SElaine Zhang priv->reset_reg_num = reg_number; 122*760188c1SElaine Zhang rst_dev->priv = priv; 123*760188c1SElaine Zhang 124*760188c1SElaine Zhang return 0; 125*760188c1SElaine Zhang } 126*760188c1SElaine Zhang 127*760188c1SElaine Zhang U_BOOT_DRIVER(rockchip_reset) = { 128*760188c1SElaine Zhang .name = "rockchip_reset", 129*760188c1SElaine Zhang .id = UCLASS_RESET, 130*760188c1SElaine Zhang .probe = rockchip_reset_probe, 131*760188c1SElaine Zhang .ops = &rockchip_reset_ops, 132*760188c1SElaine Zhang .priv_auto_alloc_size = sizeof(struct rockchip_reset_priv), 133*760188c1SElaine Zhang }; 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